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bcma: store more alternative addresses
Each core could have more than one alternative address. There are cores with 8 alternative addresses for different functions. The PHY control in the Chip common B core is done through the 2. alternative address and not the first one. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> CC: linux-usb@vger.kernel.org Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -276,7 +276,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
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struct bcma_device *core)
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{
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u32 tmp;
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u8 i, j;
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u8 i, j, k;
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s32 cia, cib;
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u8 ports[2], wrappers[2];
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@ -367,6 +367,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
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core->addr = tmp;
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/* get & parse slave ports */
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k = 0;
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for (i = 0; i < ports[1]; i++) {
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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@ -376,9 +377,9 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
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/* pr_debug("erom: slave port %d "
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* "has %d descriptors\n", i, j); */
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break;
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} else {
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if (i == 0 && j == 0)
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core->addr1 = tmp;
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} else if (k < ARRAY_SIZE(core->addr_s)) {
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core->addr_s[k] = tmp;
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k++;
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}
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}
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}
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@ -237,7 +237,7 @@ static int bcma_hcd_probe(struct bcma_device *dev)
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bcma_hcd_init_chip(dev);
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/* In AI chips EHCI is addrspace 0, OHCI is 1 */
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ohci_addr = dev->addr1;
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ohci_addr = dev->addr_s[0];
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if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
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&& chipinfo->rev == 0)
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ohci_addr = 0x18009000;
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@ -267,7 +267,7 @@ struct bcma_device {
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u8 core_unit;
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u32 addr;
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u32 addr1;
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u32 addr_s[8];
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u32 wrap;
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void __iomem *io_addr;
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