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drm/amd/display: Add documentation for power gate plane

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This commit introduces kernel documentation to some essential functions
related to power gate control over planes. It also adds a macro to make
one part of the code easy to understand.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rodrigo Siqueira 2021-04-15 09:32:57 -04:00 committed by Alex Deucher
parent 980d6042c1
commit 2334470369
1 changed files with 36 additions and 2 deletions
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38
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
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@ -72,6 +72,9 @@
#define GAMMA_HW_POINTS_NUM 256 #define GAMMA_HW_POINTS_NUM 256
#define PGFSM_POWER_ON 0
#define PGFSM_POWER_OFF 2
void print_microsec(struct dc_context *dc_ctx, void print_microsec(struct dc_context *dc_ctx,
struct dc_log_buffer_ctx *log_ctx, struct dc_log_buffer_ctx *log_ctx,
uint32_t ref_cycle) uint32_t ref_cycle)
@ -536,13 +539,22 @@ void dcn10_disable_vga(
REG_UPDATE(VGA_TEST_CONTROL, VGA_TEST_RENDER_START, 1); REG_UPDATE(VGA_TEST_CONTROL, VGA_TEST_RENDER_START, 1);
} }
/**
* dcn10_dpp_pg_control - DPP power gate control.
*
* @hws: dce_hwseq reference.
* @dpp_inst: DPP instance reference.
* @power_on: true if we want to enable power gate, false otherwise.
*
* Enable or disable power gate in the specific DPP instance.
*/
void dcn10_dpp_pg_control( void dcn10_dpp_pg_control(
struct dce_hwseq *hws, struct dce_hwseq *hws,
unsigned int dpp_inst, unsigned int dpp_inst,
bool power_on) bool power_on)
{ {
uint32_t power_gate = power_on ? 0 : 1; uint32_t power_gate = power_on ? 0 : 1;
uint32_t pwr_status = power_on ? 0 : 2; uint32_t pwr_status = power_on ? PGFSM_POWER_ON : PGFSM_POWER_OFF;
if (hws->ctx->dc->debug.disable_dpp_power_gate) if (hws->ctx->dc->debug.disable_dpp_power_gate)
return; return;
@ -588,13 +600,22 @@ void dcn10_dpp_pg_control(
} }
} }
/**
* dcn10_hubp_pg_control - HUBP power gate control.
*
* @hws: dce_hwseq reference.
* @hubp_inst: DPP instance reference.
* @power_on: true if we want to enable power gate, false otherwise.
*
* Enable or disable power gate in the specific HUBP instance.
*/
void dcn10_hubp_pg_control( void dcn10_hubp_pg_control(
struct dce_hwseq *hws, struct dce_hwseq *hws,
unsigned int hubp_inst, unsigned int hubp_inst,
bool power_on) bool power_on)
{ {
uint32_t power_gate = power_on ? 0 : 1; uint32_t power_gate = power_on ? 0 : 1;
uint32_t pwr_status = power_on ? 0 : 2; uint32_t pwr_status = power_on ? PGFSM_POWER_ON : PGFSM_POWER_OFF;
if (hws->ctx->dc->debug.disable_hubp_power_gate) if (hws->ctx->dc->debug.disable_hubp_power_gate)
return; return;
@ -1078,6 +1099,19 @@ void dcn10_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx)
hws->funcs.verify_allow_pstate_change_high(dc); hws->funcs.verify_allow_pstate_change_high(dc);
} }
/**
* dcn10_plane_atomic_power_down - Power down plane components.
*
* @dc: dc struct reference. used for grab hwseq.
* @dpp: dpp struct reference.
* @hubp: hubp struct reference.
*
* Keep in mind that this operation requires a power gate configuration;
* however, requests for switch power gate are precisely controlled to avoid
* problems. For this reason, power gate request is usually disabled. This
* function first needs to enable the power gate request before disabling DPP
* and HUBP. Finally, it disables the power gate request again.
*/
void dcn10_plane_atomic_power_down(struct dc *dc, void dcn10_plane_atomic_power_down(struct dc *dc,
struct dpp *dpp, struct dpp *dpp,
struct hubp *hubp) struct hubp *hubp)