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arm64: dts: stingray: move common board components to stingray-board-base

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Move common board components from base bcm958742 dtsi file to new
stingray-board-base dtsi file so they can be shared between many stingray
boards following common design.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Scott Branden 2018-05-22 11:55:42 -07:00 committed by Florian Fainelli
parent ce397d215c
commit 22f969f351
2 changed files with 52 additions and 34 deletions
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35
arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
View File

@ -30,20 +30,9 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "stingray.dtsi"
#include "stingray-board-base.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &uart1;
serial1 = &uart0;
serial2 = &uart2;
serial3 = &uart3;
};
sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
compatible = "regulator-gpio";
regulator-name = "sdio0_vddo_ctrl_reg";
@ -67,11 +56,6 @@
};
};
&memory { /* Default DRAM banks */
reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
<0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
};
&sata0 {
status = "okay";
};
@ -136,18 +120,6 @@
status = "okay";
};
&mdio_mux_iproc {
mdio@10 {
gphy0: eth-phy@10 {
reg = <0x10>;
};
};
};
&uart1 {
status = "okay";
};
&pwm {
status = "okay";
};
@ -175,8 +147,6 @@
};
&enet {
phy-mode = "rgmii-id";
phy-handle = <&gphy0>;
status = "okay";
};
@ -197,13 +167,10 @@
&sdio0 {
vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
non-removable;
full-pwr-cycle;
status = "okay";
};
&sdio1 {
vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
full-pwr-cycle;
status = "okay";
};

51
arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi Normal file
View File

@ -0,0 +1,51 @@
// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)
/*
* Copyright(c) 2016-2018 Broadcom
*/
#include "stingray.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &uart1;
serial1 = &uart0;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&memory { /* Default DRAM banks */
reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
<0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
};
&enet {
phy-mode = "rgmii-id";
phy-handle = <&gphy0>;
};
&uart1 {
status = "okay";
};
&sdio0 {
non-removable;
full-pwr-cycle;
};
&sdio1 {
full-pwr-cycle;
};
&mdio_mux_iproc {
mdio@10 {
gphy0: eth-phy@10 {
reg = <0x10>;
};
};
};