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x86: msr for AMD Fam 10h mmio
Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -95,6 +95,14 @@
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#define MSR_AMD64_IBSDCPHYSAD 0xc0011039
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#define MSR_AMD64_IBSCTL 0xc001103a
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/* Fam 10h MSRs */
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#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
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#define FAM10H_MMIO_CONF_ENABLE (1<<0)
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#define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf
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#define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2
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#define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff
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#define FAM10H_MMIO_CONF_BASE_SHIFT 20
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/* K8 MSRs */
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#define MSR_K8_TOP_MEM1 0xc001001a
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#define MSR_K8_TOP_MEM2 0xc001001d
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