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Blackfin: punt NFC MMR bits

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Now that the NFC driver has its own defines, scrub the ones from the
global namespace to avoid ugly collisions with common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2009-10-15 03:35:35 +00:00
parent fc1caf6eaf
commit 222f6eb66e
2 changed files with 0 additions and 141 deletions
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81
arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
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@ -1738,85 +1738,4 @@
#define nAFEXIT 0x0
#define SECSTAT 0xe0 /* Secure Status */
/* Bit masks for NFC_CTL */
#define WR_DLY 0xf /* Write Strobe Delay */
#define RD_DLY 0xf0 /* Read Strobe Delay */
#define NWIDTH 0x100 /* NAND Data Width */
#define nNWIDTH 0x0
#define PG_SIZE 0x200 /* Page Size */
#define nPG_SIZE 0x0
/* Bit masks for NFC_STAT */
#define NBUSY 0x1 /* Not Busy */
#define nNBUSY 0x0
#define WB_FULL 0x2 /* Write Buffer Full */
#define nWB_FULL 0x0
#define PG_WR_STAT 0x4 /* Page Write Pending */
#define nPG_WR_STAT 0x0
#define PG_RD_STAT 0x8 /* Page Read Pending */
#define nPG_RD_STAT 0x0
#define WB_EMPTY 0x10 /* Write Buffer Empty */
#define nWB_EMPTY 0x0
/* Bit masks for NFC_IRQSTAT */
#define NBUSYIRQ 0x1 /* Not Busy IRQ */
#define nNBUSYIRQ 0x0
#define WB_OVF 0x2 /* Write Buffer Overflow */
#define nWB_OVF 0x0
#define WB_EDGE 0x4 /* Write Buffer Edge Detect */
#define nWB_EDGE 0x0
#define RD_RDY 0x8 /* Read Data Ready */
#define nRD_RDY 0x0
#define WR_DONE 0x10 /* Page Write Done */
#define nWR_DONE 0x0
/* Bit masks for NFC_IRQMASK */
#define MASK_BUSYIRQ 0x1 /* Mask Not Busy IRQ */
#define nMASK_BUSYIRQ 0x0
#define MASK_WBOVF 0x2 /* Mask Write Buffer Overflow */
#define nMASK_WBOVF 0x0
#define MASK_WBEMPTY 0x4 /* Mask Write Buffer Empty */
#define nMASK_WBEMPTY 0x0
#define MASK_RDRDY 0x8 /* Mask Read Data Ready */
#define nMASK_RDRDY 0x0
#define MASK_WRDONE 0x10 /* Mask Write Done */
#define nMASK_WRDONE 0x0
/* Bit masks for NFC_RST */
#define ECC_RST 0x1 /* ECC (and NFC counters) Reset */
#define nECC_RST 0x0
/* Bit masks for NFC_PGCTL */
#define PG_RD_START 0x1 /* Page Read Start */
#define nPG_RD_START 0x0
#define PG_WR_START 0x2 /* Page Write Start */
#define nPG_WR_START 0x0
/* Bit masks for NFC_ECC0 */
#define ECC0 0x7ff /* Parity Calculation Result0 */
/* Bit masks for NFC_ECC1 */
#define ECC1 0x7ff /* Parity Calculation Result1 */
/* Bit masks for NFC_ECC2 */
#define ECC2 0x7ff /* Parity Calculation Result2 */
/* Bit masks for NFC_ECC3 */
#define ECC3 0x7ff /* Parity Calculation Result3 */
/* Bit masks for NFC_COUNT */
#define ECCCNT 0x3ff /* Transfer Count */
#endif /* _DEF_BF52X_H */

60
arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
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@ -2044,66 +2044,6 @@
#define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */
#define RESET_SOFTWARE 0x8000 /* SW Reset Occurred Since Last Read Of SWRST */
/* Bit masks for NFC_CTL */
#define WR_DLY 0xf /* Write Strobe Delay */
#define RD_DLY 0xf0 /* Read Strobe Delay */
#define NWIDTH 0x100 /* NAND Data Width */
#define PG_SIZE 0x200 /* Page Size */
/* Bit masks for NFC_STAT */
#define NBUSY 0x1 /* Not Busy */
#define WB_FULL 0x2 /* Write Buffer Full */
#define PG_WR_STAT 0x4 /* Page Write Pending */
#define PG_RD_STAT 0x8 /* Page Read Pending */
#define WB_EMPTY 0x10 /* Write Buffer Empty */
/* Bit masks for NFC_IRQSTAT */
#define NBUSYIRQ 0x1 /* Not Busy IRQ */
#define WB_OVF 0x2 /* Write Buffer Overflow */
#define WB_EDGE 0x4 /* Write Buffer Edge Detect */
#define RD_RDY 0x8 /* Read Data Ready */
#define WR_DONE 0x10 /* Page Write Done */
/* Bit masks for NFC_IRQMASK */
#define MASK_BUSYIRQ 0x1 /* Mask Not Busy IRQ */
#define MASK_WBOVF 0x2 /* Mask Write Buffer Overflow */
#define MASK_WBEMPTY 0x4 /* Mask Write Buffer Empty */
#define MASK_RDRDY 0x8 /* Mask Read Data Ready */
#define MASK_WRDONE 0x10 /* Mask Write Done */
/* Bit masks for NFC_RST */
#define ECC_RST 0x1 /* ECC (and NFC counters) Reset */
/* Bit masks for NFC_PGCTL */
#define PG_RD_START 0x1 /* Page Read Start */
#define PG_WR_START 0x2 /* Page Write Start */
/* Bit masks for NFC_ECC0 */
#define ECC0 0x7ff /* Parity Calculation Result0 */
/* Bit masks for NFC_ECC1 */
#define ECC1 0x7ff /* Parity Calculation Result1 */
/* Bit masks for NFC_ECC2 */
#define ECC2 0x7ff /* Parity Calculation Result2 */
/* Bit masks for NFC_ECC3 */
#define ECC3 0x7ff /* Parity Calculation Result3 */
/* Bit masks for NFC_COUNT */
#define ECCCNT 0x3ff /* Transfer Count */
/* Bit masks for EPPIx_STATUS */
#define CFIFO_ERR 0x1 /* Chroma FIFO Error */