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sh/cpu: Switch to arch_cpu_finalize_init()
commit 01eb454e9b
upstream
check_bugs() is about to be phased out. Switch over to the new
arch_cpu_finalize_init() implementation.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20230613224545.371697797@linutronix.de
Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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@ -7,6 +7,7 @@ config SUPERH
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select ARCH_HAVE_CUSTOM_GPIO_H
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select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
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select ARCH_HAS_BINFMT_FLAT if !MMU
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select ARCH_HAS_CPU_FINALIZE_INIT
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select ARCH_HAS_GIGANTIC_PAGE
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_PTE_SPECIAL
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@ -1,74 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SH_BUGS_H
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#define __ASM_SH_BUGS_H
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/*
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* This is included by init/main.c to check for architecture-dependent bugs.
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*
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* Needs:
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* void check_bugs(void);
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*/
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/*
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* I don't know of any Super-H bugs yet.
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*/
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#include <asm/processor.h>
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extern void select_idle_routine(void);
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static void __init check_bugs(void)
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{
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extern unsigned long loops_per_jiffy;
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char *p = &init_utsname()->machine[2]; /* "sh" */
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select_idle_routine();
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current_cpu_data.loops_per_jiffy = loops_per_jiffy;
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switch (current_cpu_data.family) {
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case CPU_FAMILY_SH2:
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*p++ = '2';
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break;
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case CPU_FAMILY_SH2A:
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*p++ = '2';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH3:
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*p++ = '3';
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break;
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case CPU_FAMILY_SH4:
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*p++ = '4';
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break;
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case CPU_FAMILY_SH4A:
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*p++ = '4';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH4AL_DSP:
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*p++ = '4';
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*p++ = 'a';
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*p++ = 'l';
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*p++ = '-';
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*p++ = 'd';
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*p++ = 's';
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*p++ = 'p';
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break;
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case CPU_FAMILY_UNKNOWN:
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/*
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* Specifically use CPU_FAMILY_UNKNOWN rather than
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* default:, so we're able to have the compiler whine
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* about unhandled enumerations.
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*/
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break;
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}
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printk("CPU: %s\n", get_cpu_subtype(¤t_cpu_data));
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#ifndef __LITTLE_ENDIAN__
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/* 'eb' means 'Endian Big' */
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*p++ = 'e';
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*p++ = 'b';
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#endif
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*p = '\0';
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}
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#endif /* __ASM_SH_BUGS_H */
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@ -167,6 +167,8 @@ extern unsigned int instruction_size(unsigned int insn);
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#define instruction_size(insn) (2)
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#endif
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void select_idle_routine(void);
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#endif /* __ASSEMBLY__ */
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#include <asm/processor_32.h>
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@ -14,6 +14,7 @@
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#include <linux/irqflags.h>
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#include <linux/smp.h>
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#include <linux/atomic.h>
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#include <asm/processor.h>
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#include <asm/smp.h>
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#include <asm/bl_bit.h>
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@ -43,6 +43,7 @@
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#include <asm/smp.h>
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#include <asm/mmu_context.h>
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#include <asm/mmzone.h>
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#include <asm/processor.h>
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#include <asm/sparsemem.h>
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#include <asm/platform_early.h>
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@ -354,3 +355,57 @@ int test_mode_pin(int pin)
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{
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return sh_mv.mv_mode_pins() & pin;
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}
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void __init arch_cpu_finalize_init(void)
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{
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char *p = &init_utsname()->machine[2]; /* "sh" */
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select_idle_routine();
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current_cpu_data.loops_per_jiffy = loops_per_jiffy;
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switch (current_cpu_data.family) {
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case CPU_FAMILY_SH2:
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*p++ = '2';
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break;
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case CPU_FAMILY_SH2A:
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*p++ = '2';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH3:
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*p++ = '3';
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break;
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case CPU_FAMILY_SH4:
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*p++ = '4';
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break;
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case CPU_FAMILY_SH4A:
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*p++ = '4';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH4AL_DSP:
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*p++ = '4';
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*p++ = 'a';
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*p++ = 'l';
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*p++ = '-';
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*p++ = 'd';
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*p++ = 's';
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*p++ = 'p';
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break;
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case CPU_FAMILY_UNKNOWN:
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/*
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* Specifically use CPU_FAMILY_UNKNOWN rather than
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* default:, so we're able to have the compiler whine
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* about unhandled enumerations.
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*/
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break;
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}
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pr_info("CPU: %s\n", get_cpu_subtype(¤t_cpu_data));
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#ifndef __LITTLE_ENDIAN__
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/* 'eb' means 'Endian Big' */
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*p++ = 'e';
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*p++ = 'b';
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#endif
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*p = '\0';
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}
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