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r8169: make room for more specific 8168 hardware start procedure
Broadly speaking the 8168c* share some common code which will be factored in __rtl_hw_start_8168cp. The 8168b* share some code too but it will be a bit different. Any change of behavior should be confined to the currently unidentified 8168 chipsets. They will not be applied the Tx performance tweak and will emit a warning instead. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
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b836390159
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219a1e9d46
@ -1387,7 +1387,7 @@ static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
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rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
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}
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static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
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static void rtl8168c_1_hw_phy_config(void __iomem *ioaddr)
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{
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struct phy_reg phy_reg_init[] = {
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{ 0x1f, 0x0001 },
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@ -1416,7 +1416,7 @@ static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
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mdio_write(ioaddr, 0x1f, 0x0000);
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}
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static void rtl8168cx_hw_phy_config(void __iomem *ioaddr)
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static void rtl8168c_2_hw_phy_config(void __iomem *ioaddr)
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{
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struct phy_reg phy_reg_init[] = {
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{ 0x1f, 0x0001 },
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@ -1495,10 +1495,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
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rtl8168cp_hw_phy_config(ioaddr);
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break;
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case RTL_GIGA_MAC_VER_19:
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rtl8168c_hw_phy_config(ioaddr);
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rtl8168c_1_hw_phy_config(ioaddr);
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break;
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case RTL_GIGA_MAC_VER_20:
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rtl8168cx_hw_phy_config(ioaddr);
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rtl8168c_2_hw_phy_config(ioaddr);
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break;
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default:
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break;
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@ -2384,6 +2384,36 @@ static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len)
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}
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}
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static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
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}
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static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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rtl_hw_start_8168bb(ioaddr, pdev);
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}
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static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
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}
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static void rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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__rtl_hw_start_8168cp(ioaddr, pdev);
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}
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static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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__rtl_hw_start_8168cp(ioaddr, pdev);
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}
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static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
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{
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__rtl_hw_start_8168cp(ioaddr, pdev);
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}
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static void rtl_hw_start_8168(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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@ -2417,7 +2447,33 @@ static void rtl_hw_start_8168(struct net_device *dev)
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RTL_R8(IntrMask);
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rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_11:
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rtl_hw_start_8168bb(ioaddr, pdev);
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break;
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case RTL_GIGA_MAC_VER_12:
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case RTL_GIGA_MAC_VER_17:
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rtl_hw_start_8168bef(ioaddr, pdev);
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break;
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case RTL_GIGA_MAC_VER_18:
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rtl_hw_start_8168cp(ioaddr, pdev);
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break;
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case RTL_GIGA_MAC_VER_19:
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rtl_hw_start_8168c_1(ioaddr, pdev);
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break;
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case RTL_GIGA_MAC_VER_20:
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rtl_hw_start_8168c_2(ioaddr, pdev);
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break;
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default:
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printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
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dev->name, tp->mac_version);
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break;
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}
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RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
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