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i40e: Add new PHY types for 25G AOC and ACC support
This patch adds support for 25G Active Optical Cables (AOC) and Active Copper Cables (ACC) PHY types. Signed-off-by: Sudheer Mogilappagari <sudheer.mogilappagari@intel.com> Signed-off-by: Krzysztof Malek <krzysztof.malek@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1771,6 +1771,8 @@ enum i40e_aq_phy_type {
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I40E_PHY_TYPE_25GBASE_CR = 0x20,
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I40E_PHY_TYPE_25GBASE_SR = 0x21,
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I40E_PHY_TYPE_25GBASE_LR = 0x22,
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I40E_PHY_TYPE_25GBASE_AOC = 0x23,
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I40E_PHY_TYPE_25GBASE_ACC = 0x24,
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I40E_PHY_TYPE_MAX,
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I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP = 0xFD,
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I40E_PHY_TYPE_EMPTY = 0xFE,
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@ -1831,6 +1833,8 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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#define I40E_AQ_PHY_TYPE_EXT_25G_AOC 0x10
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#define I40E_AQ_PHY_TYPE_EXT_25G_ACC 0x20
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u8 fec_cfg_curr_mod_ext_info;
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#define I40E_AQ_ENABLE_FEC_KR 0x01
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#define I40E_AQ_ENABLE_FEC_RS 0x02
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@ -1180,6 +1180,8 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
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case I40E_PHY_TYPE_40GBASE_AOC:
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case I40E_PHY_TYPE_10GBASE_AOC:
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case I40E_PHY_TYPE_25GBASE_CR:
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case I40E_PHY_TYPE_25GBASE_AOC:
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case I40E_PHY_TYPE_25GBASE_ACC:
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media = I40E_MEDIA_TYPE_DA;
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break;
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case I40E_PHY_TYPE_1000BASE_KX:
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@ -502,6 +502,8 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,
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case I40E_PHY_TYPE_25GBASE_CR:
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case I40E_PHY_TYPE_25GBASE_SR:
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case I40E_PHY_TYPE_25GBASE_LR:
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case I40E_PHY_TYPE_25GBASE_AOC:
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case I40E_PHY_TYPE_25GBASE_ACC:
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supported = SUPPORTED_Autoneg;
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advertising = ADVERTISED_Autoneg;
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/* TODO: add speeds when ethtool is ready to support*/
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@ -271,6 +271,10 @@ struct i40e_phy_info {
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I40E_PHY_TYPE_OFFSET)
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#define I40E_CAP_PHY_TYPE_25GBASE_LR BIT_ULL(I40E_PHY_TYPE_25GBASE_LR + \
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I40E_PHY_TYPE_OFFSET)
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#define I40E_CAP_PHY_TYPE_25GBASE_AOC BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC + \
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I40E_PHY_TYPE_OFFSET)
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#define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \
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I40E_PHY_TYPE_OFFSET)
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#define I40E_HW_CAP_MAX_GPIO 30
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/* Capabilities of a PF or a VF or the whole device */
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struct i40e_hw_capabilities {
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@ -1767,6 +1767,8 @@ enum i40e_aq_phy_type {
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I40E_PHY_TYPE_25GBASE_CR = 0x20,
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I40E_PHY_TYPE_25GBASE_SR = 0x21,
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I40E_PHY_TYPE_25GBASE_LR = 0x22,
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I40E_PHY_TYPE_25GBASE_AOC = 0x23,
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I40E_PHY_TYPE_25GBASE_ACC = 0x24,
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I40E_PHY_TYPE_MAX,
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I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP = 0xFD,
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I40E_PHY_TYPE_EMPTY = 0xFE,
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@ -1827,6 +1829,8 @@ struct i40e_aq_get_phy_abilities_resp {
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#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
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#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
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#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
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#define I40E_AQ_PHY_TYPE_EXT_25G_AOC 0x10
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#define I40E_AQ_PHY_TYPE_EXT_25G_ACC 0x20
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u8 fec_cfg_curr_mod_ext_info;
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#define I40E_AQ_ENABLE_FEC_KR 0x01
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#define I40E_AQ_ENABLE_FEC_RS 0x02
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