korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-25 21:24:08 +08:00
Code Issues Packages Projects Releases Wiki Activity

clk: x86: Fix clk_gate_flags for RV_CLK_GATE

Browse Source 
In newer SoC we have to clear bit for disabling 48MHz oscillator
clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
and disable of 48MHz clock.

Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com>
Link: https://lore.kernel.org/r/20211212180527.1641362-6-AjitKumar.Pandey@amd.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Ajit Kumar Pandey 2021-12-12 23:35:27 +05:30 committed by Stephen Boyd
parent c33917b439
commit 1fdaaa13b4
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/x86/clk-fch.c
View File

@ -82,7 +82,7 @@ static int fch_clk_probe(struct platform_device *pdev)
hws[CLK_GATE_FIXED] = clk_hw_register_gate(NULL, "oscout1",
"clk48MHz", 0, fch_data->base + MISCCLKCNTL1,
OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);
OSCCLKENB, 0, NULL);
devm_clk_hw_register_clkdev(&pdev->dev, hws[CLK_GATE_FIXED],
fch_data->name, NULL);