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Documentation: ABI + trace: hisi_ptt: update paths to bus/event_source
To allow for assigning a suitable parent to the struct pmu device update the documentation to describe the device via the event_source bus where it will remain accessible. For the ABI documention file also rename the file as it is named after the path. Reviewed-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20240412161057.14099-30-Jonathan.Cameron@huawei.com
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@ -1,4 +1,4 @@
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -8,7 +8,7 @@ Description: This directory contains files for tuning the PCIe link
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See Documentation/trace/hisi-ptt.rst for more information.
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See Documentation/trace/hisi-ptt.rst for more information.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -18,7 +18,7 @@ Description: (RW) Controls the weight of Tx completion TLPs, which influence
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will return an error, and out of range values will be converted
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -28,7 +28,7 @@ Description: (RW) Controls the weight of Tx non-posted TLPs, which influence
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will return an error, and out of range values will be converted
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -38,7 +38,7 @@ Description: (RW) Controls the weight of Tx posted TLPs, which influence the
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will return an error, and out of range values will be converted
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -49,7 +49,7 @@ Description: (RW) Control the allocated buffer watermark for inbound packets.
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will return an error, and out of range values will be converted
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will return an error, and out of range values will be converted
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to 2. The value indicates a probable level of the event.
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to 2. The value indicates a probable level of the event.
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What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level
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What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level
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Date: October 2022
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Date: October 2022
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KernelVersion: 6.1
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KernelVersion: 6.1
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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Contact: Yicong Yang <yangyicong@hisilicon.com>
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@ -40,7 +40,7 @@ IO dies (SICL, Super I/O Cluster), where there's one PCIe Root
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Complex for each SICL.
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Complex for each SICL.
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::
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::
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/sys/devices/hisi_ptt<sicl_id>_<core_id>
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/sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>
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Tune
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Tune
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====
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====
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@ -53,7 +53,7 @@ Each event is presented as a file under $(PTT PMU dir)/tune, and
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a simple open/read/write/close cycle will be used to tune the event.
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a simple open/read/write/close cycle will be used to tune the event.
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::
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::
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$ cd /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune
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$ cd /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
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$ ls
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$ ls
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qos_tx_cpl qos_tx_np qos_tx_p
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qos_tx_cpl qos_tx_np qos_tx_p
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tx_path_rx_req_alloc_buf_level
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tx_path_rx_req_alloc_buf_level
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@ -9790,7 +9790,7 @@ M: Yicong Yang <yangyicong@hisilicon.com>
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M: Jonathan Cameron <jonathan.cameron@huawei.com>
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M: Jonathan Cameron <jonathan.cameron@huawei.com>
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L: linux-kernel@vger.kernel.org
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L: linux-kernel@vger.kernel.org
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S: Maintained
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S: Maintained
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F: Documentation/ABI/testing/sysfs-devices-hisi_ptt
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F: Documentation/ABI/testing/sysfs-bus-event_source-devices-hisi_ptt
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F: Documentation/trace/hisi-ptt.rst
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F: Documentation/trace/hisi-ptt.rst
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F: drivers/hwtracing/ptt/
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F: drivers/hwtracing/ptt/
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F: tools/perf/arch/arm64/util/hisi-ptt.c
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F: tools/perf/arch/arm64/util/hisi-ptt.c
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