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ARM: dts: keystone-k2g-evm: add bindings for SPI NOR flash

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K2G EVM has n25q128a13 SPI NOR flash on SPI1. Enable SPI1 in the DT
node as well as add a subnode for the SPI NOR.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This commit is contained in:
Murali Karicheri 2017-10-09 09:42:01 -07:00 committed by Santosh Shilimkar
parent 729ce96967
commit 1efed4072c
1 changed files with 36 additions and 0 deletions
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36
arch/arm/boot/dts/keystone-k2g-evm.dts
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@ -51,6 +51,16 @@
K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x11a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_scs0.spi1_scs0 */
K2G_CORE_IOPAD(0x11ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_clk.spi1_clk */
K2G_CORE_IOPAD(0x11b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_miso.spi1_miso */
K2G_CORE_IOPAD(0x11b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* spi1_mosi.spi1_mosi */
>;
};
};
&k2g_pinctrl {
@ -169,3 +179,29 @@
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
spi_nor: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <5000000>;
m25p,fast-read;
reg = <0>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x100000>;
read-only;
};
partition@1 {
label = "misc";
reg = <0x100000 0xf00000>;
};
};
};