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powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Kumar Gala
Scott Wood
parent
cb5915e71f
commit
1e8ed06d34
@ -1,7 +1,7 @@
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/*
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* B4420DS Device Tree Source
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*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -97,10 +97,25 @@
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device_type = "memory";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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bman_fbpr: bman-fbpr {
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size = <0 0x1000000>;
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alignment = <0 0x1000000>;
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};
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};
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dcsr: dcsr@f00000000 {
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ranges = <0x00000000 0xf 0x00000000 0x01052000>;
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};
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bportals: bman-portals@ff4000000 {
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ranges = <0x0 0xf 0xf4000000 0x2000000>;
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};
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soc: soc@ffe000000 {
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ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
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reg = <0xf 0xfe000000 0 0x00001000>;
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@ -1,7 +1,7 @@
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/*
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* B4860 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2012 Freescale Semiconductor Inc.
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* Copyright 2012 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -109,6 +109,64 @@
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};
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};
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&bportals {
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bman-portal@38000 {
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compatible = "fsl,bman-portal";
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reg = <0x38000 0x4000>, <0x100e000 0x1000>;
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interrupts = <133 2 0 0>;
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};
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bman-portal@3c000 {
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compatible = "fsl,bman-portal";
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reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
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interrupts = <135 2 0 0>;
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};
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bman-portal@40000 {
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compatible = "fsl,bman-portal";
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reg = <0x40000 0x4000>, <0x1010000 0x1000>;
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interrupts = <137 2 0 0>;
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};
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bman-portal@44000 {
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compatible = "fsl,bman-portal";
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reg = <0x44000 0x4000>, <0x1011000 0x1000>;
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interrupts = <139 2 0 0>;
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};
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bman-portal@48000 {
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compatible = "fsl,bman-portal";
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reg = <0x48000 0x4000>, <0x1012000 0x1000>;
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interrupts = <141 2 0 0>;
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};
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bman-portal@4c000 {
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compatible = "fsl,bman-portal";
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reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
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interrupts = <143 2 0 0>;
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};
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bman-portal@50000 {
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compatible = "fsl,bman-portal";
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reg = <0x50000 0x4000>, <0x1014000 0x1000>;
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interrupts = <145 2 0 0>;
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};
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bman-portal@54000 {
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compatible = "fsl,bman-portal";
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reg = <0x54000 0x4000>, <0x1015000 0x1000>;
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interrupts = <147 2 0 0>;
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};
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bman-portal@58000 {
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compatible = "fsl,bman-portal";
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reg = <0x58000 0x4000>, <0x1016000 0x1000>;
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interrupts = <149 2 0 0>;
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};
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bman-portal@5c000 {
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compatible = "fsl,bman-portal";
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reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
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interrupts = <151 2 0 0>;
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};
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bman-portal@60000 {
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compatible = "fsl,bman-portal";
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reg = <0x60000 0x4000>, <0x1018000 0x1000>;
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interrupts = <153 2 0 0>;
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};
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};
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&soc {
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ddr2: memory-controller@9000 {
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compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
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@ -1,7 +1,7 @@
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/*
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* B4420 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* this software, even if advised of the possibility of such damage.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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@ -128,6 +133,83 @@
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};
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};
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&bportals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "simple-bus";
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bman-portal@0 {
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compatible = "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x1000000 0x1000>;
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interrupts = <105 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x1001000 0x1000>;
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interrupts = <107 2 0 0>;
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};
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bman-portal@8000 {
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compatible = "fsl,bman-portal";
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reg = <0x8000 0x4000>, <0x1002000 0x1000>;
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interrupts = <109 2 0 0>;
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};
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bman-portal@c000 {
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compatible = "fsl,bman-portal";
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reg = <0xc000 0x4000>, <0x1003000 0x1000>;
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interrupts = <111 2 0 0>;
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};
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bman-portal@10000 {
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compatible = "fsl,bman-portal";
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reg = <0x10000 0x4000>, <0x1004000 0x1000>;
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interrupts = <113 2 0 0>;
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};
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bman-portal@14000 {
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compatible = "fsl,bman-portal";
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reg = <0x14000 0x4000>, <0x1005000 0x1000>;
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interrupts = <115 2 0 0>;
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};
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bman-portal@18000 {
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compatible = "fsl,bman-portal";
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reg = <0x18000 0x4000>, <0x1006000 0x1000>;
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interrupts = <117 2 0 0>;
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};
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bman-portal@1c000 {
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compatible = "fsl,bman-portal";
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reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
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interrupts = <119 2 0 0>;
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};
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bman-portal@20000 {
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compatible = "fsl,bman-portal";
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reg = <0x20000 0x4000>, <0x1008000 0x1000>;
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interrupts = <121 2 0 0>;
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};
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bman-portal@24000 {
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compatible = "fsl,bman-portal";
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reg = <0x24000 0x4000>, <0x1009000 0x1000>;
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interrupts = <123 2 0 0>;
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};
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bman-portal@28000 {
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compatible = "fsl,bman-portal";
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reg = <0x28000 0x4000>, <0x100a000 0x1000>;
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interrupts = <125 2 0 0>;
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};
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bman-portal@2c000 {
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compatible = "fsl,bman-portal";
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reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
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interrupts = <127 2 0 0>;
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};
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bman-portal@30000 {
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compatible = "fsl,bman-portal";
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reg = <0x30000 0x4000>, <0x100c000 0x1000>;
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interrupts = <129 2 0 0>;
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};
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bman-portal@34000 {
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compatible = "fsl,bman-portal";
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reg = <0x34000 0x4000>, <0x100d000 0x1000>;
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interrupts = <131 2 0 0>;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -261,6 +343,11 @@
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/include/ "qoriq-duart-1.dtsi"
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/include/ "qoriq-sec5.3-0.dtsi"
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/include/ "qoriq-bman1.dtsi"
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bman: bman@31a000 {
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interrupts = <16 2 1 29>;
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};
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L2: l2-cache-controller@c20000 {
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compatible = "fsl,b4-l2-cache-controller";
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reg = <0xc20000 0x1000>;
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@ -1,7 +1,7 @@
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/*
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* P1023/P1017 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10 0>;
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};
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&lbc {
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#address-cells = <2>;
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#size-cells = <1>;
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@ -97,6 +102,28 @@
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};
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};
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&bportals {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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bman-portal@0 {
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compatible = "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x100000 0x1000>;
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interrupts = <30 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x101000 0x1000>;
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interrupts = <32 2 0 0>;
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};
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bman-portal@8000 {
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compatible = "fsl,bman-portal";
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reg = <0x8000 0x4000>, <0x102000 0x1000>;
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interrupts = <34 2 0 0>;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -221,6 +248,14 @@
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/include/ "pq3-mpic.dtsi"
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/include/ "pq3-mpic-timer-B.dtsi"
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bman: bman@8a000 {
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compatible = "fsl,bman";
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reg = <0x8a000 0x1000>;
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interrupts = <16 2 0 0>;
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fsl,bman-portals = <&bportals>;
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memory-region = <&bman_fbpr>;
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};
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global-utilities@e0000 {
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compatible = "fsl,p1023-guts";
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reg = <0xe0000 0x1000>;
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@ -1,7 +1,7 @@
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/*
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* P2041/P2040 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10 0>;
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};
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&lbc {
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compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
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interrupts = <25 2 0 0>;
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@ -216,6 +221,8 @@
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};
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};
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/include/ "qoriq-bman1-portals.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -407,4 +414,6 @@
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crypto: crypto@300000 {
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fsl,iommu-parent = <&pamu1>;
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};
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/include/ "qoriq-bman1.dtsi"
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};
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@ -1,7 +1,7 @@
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/*
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* P3041 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10 0>;
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};
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&lbc {
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compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
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interrupts = <25 2 0 0>;
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@ -243,6 +248,8 @@
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};
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};
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/include/ "qoriq-bman1-portals.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -434,4 +441,6 @@
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crypto: crypto@300000 {
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fsl,iommu-parent = <&pamu1>;
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};
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/include/ "qoriq-bman1.dtsi"
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};
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@ -1,7 +1,7 @@
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/*
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* P4080/P4040 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10 0>;
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};
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&lbc {
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compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
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interrupts = <25 2 0 0>;
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@ -243,6 +248,8 @@
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};
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/include/ "qoriq-bman1-portals.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -490,4 +497,6 @@
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crypto: crypto@300000 {
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fsl,iommu-parent = <&pamu1>;
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};
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/include/ "qoriq-bman1.dtsi"
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};
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@ -1,7 +1,7 @@
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/*
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* P5020/5010 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2011 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -32,6 +32,11 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&lbc {
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compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
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interrupts = <25 2 0 0>;
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@ -240,6 +245,8 @@
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};
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};
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/include/ "qoriq-bman1-portals.dtsi"
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -421,6 +428,8 @@
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fsl,iommu-parent = <&pamu1>;
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};
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/include/ "qoriq-bman1.dtsi"
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/include/ "qoriq-raid1.0-0.dtsi"
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raideng@320000 {
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fsl,iommu-parent = <&pamu1>;
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@ -1,7 +1,7 @@
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/*
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* P5040 Silicon/SoC Device Tree Source (post include)
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*
|
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* Copyright 2012 Freescale Semiconductor Inc.
|
||||
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -32,6 +32,11 @@
|
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* software, even if advised of the possibility of such damage.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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||||
};
|
||||
|
||||
&lbc {
|
||||
compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
@ -195,6 +200,8 @@
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "qoriq-bman1-portals.dtsi"
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -399,4 +406,6 @@
|
||||
crypto@300000 {
|
||||
fsl,iommu-parent = <&pamu4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-bman1.dtsi"
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T1040 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -32,6 +32,11 @@
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&bman_fbpr {
|
||||
compatible = "fsl,bman-fbpr";
|
||||
alloc-ranges = <0 0 0x10000 0>;
|
||||
};
|
||||
|
||||
&ifc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
@ -218,6 +223,63 @@
|
||||
};
|
||||
};
|
||||
|
||||
&bportals {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
bman-portal@0 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x0 0x4000>, <0x1000000 0x1000>;
|
||||
interrupts = <105 2 0 0>;
|
||||
};
|
||||
bman-portal@4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
|
||||
interrupts = <107 2 0 0>;
|
||||
};
|
||||
bman-portal@8000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
|
||||
interrupts = <109 2 0 0>;
|
||||
};
|
||||
bman-portal@c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
|
||||
interrupts = <111 2 0 0>;
|
||||
};
|
||||
bman-portal@10000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
|
||||
interrupts = <113 2 0 0>;
|
||||
};
|
||||
bman-portal@14000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
|
||||
interrupts = <115 2 0 0>;
|
||||
};
|
||||
bman-portal@18000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
|
||||
interrupts = <117 2 0 0>;
|
||||
};
|
||||
bman-portal@1c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
|
||||
interrupts = <119 2 0 0>;
|
||||
};
|
||||
bman-portal@20000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
|
||||
interrupts = <121 2 0 0>;
|
||||
};
|
||||
bman-portal@24000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
|
||||
interrupts = <123 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -401,4 +463,5 @@
|
||||
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
|
||||
};
|
||||
/include/ "qoriq-sec5.0-0.dtsi"
|
||||
/include/ "qoriq-bman1.dtsi"
|
||||
};
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T2081 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -32,6 +32,11 @@
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&bman_fbpr {
|
||||
compatible = "fsl,bman-fbpr";
|
||||
alloc-ranges = <0 0 0x10000 0>;
|
||||
};
|
||||
|
||||
&ifc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
@ -224,6 +229,103 @@
|
||||
};
|
||||
};
|
||||
|
||||
&bportals {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
bman-portal@0 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x0 0x4000>, <0x1000000 0x1000>;
|
||||
interrupts = <105 2 0 0>;
|
||||
};
|
||||
bman-portal@4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
|
||||
interrupts = <107 2 0 0>;
|
||||
};
|
||||
bman-portal@8000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
|
||||
interrupts = <109 2 0 0>;
|
||||
};
|
||||
bman-portal@c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
|
||||
interrupts = <111 2 0 0>;
|
||||
};
|
||||
bman-portal@10000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
|
||||
interrupts = <113 2 0 0>;
|
||||
};
|
||||
bman-portal@14000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
|
||||
interrupts = <115 2 0 0>;
|
||||
};
|
||||
bman-portal@18000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
|
||||
interrupts = <117 2 0 0>;
|
||||
};
|
||||
bman-portal@1c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
|
||||
interrupts = <119 2 0 0>;
|
||||
};
|
||||
bman-portal@20000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
|
||||
interrupts = <121 2 0 0>;
|
||||
};
|
||||
bman-portal@24000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
|
||||
interrupts = <123 2 0 0>;
|
||||
};
|
||||
bman-portal@28000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
|
||||
interrupts = <125 2 0 0>;
|
||||
};
|
||||
bman-portal@2c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
|
||||
interrupts = <127 2 0 0>;
|
||||
};
|
||||
bman-portal@30000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
|
||||
interrupts = <129 2 0 0>;
|
||||
};
|
||||
bman-portal@34000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
|
||||
interrupts = <131 2 0 0>;
|
||||
};
|
||||
bman-portal@38000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
|
||||
interrupts = <133 2 0 0>;
|
||||
};
|
||||
bman-portal@3c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
|
||||
interrupts = <135 2 0 0>;
|
||||
};
|
||||
bman-portal@40000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
|
||||
interrupts = <137 2 0 0>;
|
||||
};
|
||||
bman-portal@44000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
|
||||
interrupts = <139 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -400,6 +502,7 @@
|
||||
phy_type = "utmi";
|
||||
};
|
||||
/include/ "qoriq-sec5.2-0.dtsi"
|
||||
/include/ "qoriq-bman1.dtsi"
|
||||
|
||||
L2_1: l2-cache-controller@c20000 {
|
||||
/* Cluster 0 L2 cache */
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T4240 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -32,6 +32,11 @@
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
&bman_fbpr {
|
||||
compatible = "fsl,bman-fbpr";
|
||||
alloc-ranges = <0 0 0x10000 0>;
|
||||
};
|
||||
|
||||
&ifc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
@ -294,6 +299,263 @@
|
||||
};
|
||||
};
|
||||
|
||||
&bportals {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
bman-portal@0 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x0 0x4000>, <0x1000000 0x1000>;
|
||||
interrupts = <105 2 0 0>;
|
||||
};
|
||||
bman-portal@4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
|
||||
interrupts = <107 2 0 0>;
|
||||
};
|
||||
bman-portal@8000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
|
||||
interrupts = <109 2 0 0>;
|
||||
};
|
||||
bman-portal@c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
|
||||
interrupts = <111 2 0 0>;
|
||||
};
|
||||
bman-portal@10000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
|
||||
interrupts = <113 2 0 0>;
|
||||
};
|
||||
bman-portal@14000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
|
||||
interrupts = <115 2 0 0>;
|
||||
};
|
||||
bman-portal@18000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
|
||||
interrupts = <117 2 0 0>;
|
||||
};
|
||||
bman-portal@1c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
|
||||
interrupts = <119 2 0 0>;
|
||||
};
|
||||
bman-portal@20000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
|
||||
interrupts = <121 2 0 0>;
|
||||
};
|
||||
bman-portal@24000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
|
||||
interrupts = <123 2 0 0>;
|
||||
};
|
||||
bman-portal@28000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
|
||||
interrupts = <125 2 0 0>;
|
||||
};
|
||||
bman-portal@2c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
|
||||
interrupts = <127 2 0 0>;
|
||||
};
|
||||
bman-portal@30000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
|
||||
interrupts = <129 2 0 0>;
|
||||
};
|
||||
bman-portal@34000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
|
||||
interrupts = <131 2 0 0>;
|
||||
};
|
||||
bman-portal@38000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
|
||||
interrupts = <133 2 0 0>;
|
||||
};
|
||||
bman-portal@3c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
|
||||
interrupts = <135 2 0 0>;
|
||||
};
|
||||
bman-portal@40000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
|
||||
interrupts = <137 2 0 0>;
|
||||
};
|
||||
bman-portal@44000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
|
||||
interrupts = <139 2 0 0>;
|
||||
};
|
||||
bman-portal@48000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x48000 0x4000>, <0x1012000 0x1000>;
|
||||
interrupts = <141 2 0 0>;
|
||||
};
|
||||
bman-portal@4c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
|
||||
interrupts = <143 2 0 0>;
|
||||
};
|
||||
bman-portal@50000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x50000 0x4000>, <0x1014000 0x1000>;
|
||||
interrupts = <145 2 0 0>;
|
||||
};
|
||||
bman-portal@54000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x54000 0x4000>, <0x1015000 0x1000>;
|
||||
interrupts = <147 2 0 0>;
|
||||
};
|
||||
bman-portal@58000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x58000 0x4000>, <0x1016000 0x1000>;
|
||||
interrupts = <149 2 0 0>;
|
||||
};
|
||||
bman-portal@5c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
|
||||
interrupts = <151 2 0 0>;
|
||||
};
|
||||
bman-portal@60000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x60000 0x4000>, <0x1018000 0x1000>;
|
||||
interrupts = <153 2 0 0>;
|
||||
};
|
||||
bman-portal@64000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x64000 0x4000>, <0x1019000 0x1000>;
|
||||
interrupts = <155 2 0 0>;
|
||||
};
|
||||
bman-portal@68000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x68000 0x4000>, <0x101a000 0x1000>;
|
||||
interrupts = <157 2 0 0>;
|
||||
};
|
||||
bman-portal@6c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
|
||||
interrupts = <159 2 0 0>;
|
||||
};
|
||||
bman-portal@70000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x70000 0x4000>, <0x101c000 0x1000>;
|
||||
interrupts = <161 2 0 0>;
|
||||
};
|
||||
bman-portal@74000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x74000 0x4000>, <0x101d000 0x1000>;
|
||||
interrupts = <163 2 0 0>;
|
||||
};
|
||||
bman-portal@78000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x78000 0x4000>, <0x101e000 0x1000>;
|
||||
interrupts = <165 2 0 0>;
|
||||
};
|
||||
bman-portal@7c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
|
||||
interrupts = <167 2 0 0>;
|
||||
};
|
||||
bman-portal@80000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x80000 0x4000>, <0x1020000 0x1000>;
|
||||
interrupts = <169 2 0 0>;
|
||||
};
|
||||
bman-portal@84000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x84000 0x4000>, <0x1021000 0x1000>;
|
||||
interrupts = <171 2 0 0>;
|
||||
};
|
||||
bman-portal@88000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x88000 0x4000>, <0x1022000 0x1000>;
|
||||
interrupts = <173 2 0 0>;
|
||||
};
|
||||
bman-portal@8c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
|
||||
interrupts = <175 2 0 0>;
|
||||
};
|
||||
bman-portal@90000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x90000 0x4000>, <0x1024000 0x1000>;
|
||||
interrupts = <385 2 0 0>;
|
||||
};
|
||||
bman-portal@94000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x94000 0x4000>, <0x1025000 0x1000>;
|
||||
interrupts = <387 2 0 0>;
|
||||
};
|
||||
bman-portal@98000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x98000 0x4000>, <0x1026000 0x1000>;
|
||||
interrupts = <389 2 0 0>;
|
||||
};
|
||||
bman-portal@9c000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
|
||||
interrupts = <391 2 0 0>;
|
||||
};
|
||||
bman-portal@a0000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
|
||||
interrupts = <393 2 0 0>;
|
||||
};
|
||||
bman-portal@a4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
|
||||
interrupts = <395 2 0 0>;
|
||||
};
|
||||
bman-portal@a8000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
|
||||
interrupts = <397 2 0 0>;
|
||||
};
|
||||
bman-portal@ac000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xac000 0x4000>, <0x102b000 0x1000>;
|
||||
interrupts = <399 2 0 0>;
|
||||
};
|
||||
bman-portal@b0000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
|
||||
interrupts = <401 2 0 0>;
|
||||
};
|
||||
bman-portal@b4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
|
||||
interrupts = <403 2 0 0>;
|
||||
};
|
||||
bman-portal@b8000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
|
||||
interrupts = <405 2 0 0>;
|
||||
};
|
||||
bman-portal@bc000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
|
||||
interrupts = <407 2 0 0>;
|
||||
};
|
||||
bman-portal@c0000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
|
||||
interrupts = <409 2 0 0>;
|
||||
};
|
||||
bman-portal@c4000 {
|
||||
compatible = "fsl,bman-portal";
|
||||
reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
|
||||
interrupts = <411 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -486,6 +748,7 @@
|
||||
/include/ "qoriq-sata2-0.dtsi"
|
||||
/include/ "qoriq-sata2-1.dtsi"
|
||||
/include/ "qoriq-sec5.0-0.dtsi"
|
||||
/include/ "qoriq-bman1.dtsi"
|
||||
|
||||
L2_1: l2-cache-controller@c20000 {
|
||||
compatible = "fsl,t4240-l2-cache-controller";
|
||||
|
||||
@ -25,10 +25,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -49,10 +49,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P1023 RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
|
||||
*
|
||||
@ -47,6 +47,21 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff200000 {
|
||||
ranges = <0x0 0xf 0xff200000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ff600000 {
|
||||
ranges = <0x0 0x0 0xff600000 0x200000>;
|
||||
|
||||
@ -228,7 +243,6 @@
|
||||
0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "fsl/p1023si-post.dtsi"
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P2041RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -45,10 +45,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P3041DS Device Tree Source
|
||||
*
|
||||
* Copyright 2010-2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2010 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -45,10 +45,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P4080DS Device Tree Source
|
||||
*
|
||||
* Copyright 2009-2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2009 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -45,10 +45,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P5020DS Device Tree Source
|
||||
*
|
||||
* Copyright 2010-2011 Freescale Semiconductor Inc.
|
||||
* Copyright 2010 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -45,10 +45,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* P5040DS Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -45,10 +45,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x200000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T104xQDS Device Tree Source
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -38,6 +38,17 @@
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x2000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
@ -77,6 +88,10 @@
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -33,6 +33,16 @@
|
||||
*/
|
||||
|
||||
/ {
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x2000>;
|
||||
@ -69,6 +79,10 @@
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T2080/T2081 QDS Device Tree Source
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -39,6 +39,17 @@
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x2000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
@ -78,6 +89,10 @@
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -39,6 +39,17 @@
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x2000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
@ -79,6 +90,10 @@
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* T4240QDS Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
@ -100,10 +100,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
@ -69,10 +69,25 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
bman_fbpr: bman-fbpr {
|
||||
size = <0 0x1000000>;
|
||||
alignment = <0 0x1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
|
||||
};
|
||||
|
||||
bportals: bman-portals@ff4000000 {
|
||||
ranges = <0x0 0xf 0xf4000000 0x2000000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user