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TTY/Serial driver fixes for 6.8-rc6
Here are 3 small serial/tty driver fixes for 6.8-rc6 that resolve the following reported errors: - riscv hvc console driver fix that was reported by many - amba-pl011 serial driver fix for RS485 mode - stm32 serial driver fix for RS485 mode All of these have been in linux-next all week with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZdtGnA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymrqwCfSIsUj9GLazXJTTTgMz1I94HXLrQAnjq9QOtg EFt6xmUGcF4zFhnfSLal =/k5+ -----END PGP SIGNATURE----- Merge tag 'tty-6.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial driver fixes from Greg KH: "Here are three small serial/tty driver fixes for 6.8-rc6 that resolve the following reported errors: - riscv hvc console driver fix that was reported by many - amba-pl011 serial driver fix for RS485 mode - stm32 serial driver fix for RS485 mode All of these have been in linux-next all week with no reported problems" * tag 'tty-6.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: serial: amba-pl011: Fix DMA transmission in RS485 mode serial: stm32: do not always set SER_RS485_RX_DURING_TX if RS485 is enabled tty: hvc: Don't enable the RISC-V SBI console by default
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commit
1e592e9536
@ -108,13 +108,15 @@ config HVC_DCC_SERIALIZE_SMP
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config HVC_RISCV_SBI
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bool "RISC-V SBI console support"
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depends on RISCV_SBI
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depends on RISCV_SBI && NONPORTABLE
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select HVC_DRIVER
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help
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This enables support for console output via RISC-V SBI calls, which
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is normally used only during boot to output printk.
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is normally used only during boot to output printk. This driver
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conflicts with real console drivers and should not be enabled on
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systems that directly access the console.
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If you don't know what do to here, say Y.
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If you don't know what do to here, say N.
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config HVCS
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tristate "IBM Hypervisor Virtual Console Server support"
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@ -1339,11 +1339,41 @@ static void pl011_start_tx_pio(struct uart_amba_port *uap)
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}
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}
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static void pl011_rs485_tx_start(struct uart_amba_port *uap)
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{
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struct uart_port *port = &uap->port;
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u32 cr;
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/* Enable transmitter */
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cr = pl011_read(uap, REG_CR);
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cr |= UART011_CR_TXE;
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/* Disable receiver if half-duplex */
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if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
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cr &= ~UART011_CR_RXE;
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if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
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cr &= ~UART011_CR_RTS;
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else
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cr |= UART011_CR_RTS;
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pl011_write(cr, uap, REG_CR);
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if (port->rs485.delay_rts_before_send)
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mdelay(port->rs485.delay_rts_before_send);
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uap->rs485_tx_started = true;
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}
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static void pl011_start_tx(struct uart_port *port)
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{
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struct uart_amba_port *uap =
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container_of(port, struct uart_amba_port, port);
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if ((uap->port.rs485.flags & SER_RS485_ENABLED) &&
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!uap->rs485_tx_started)
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pl011_rs485_tx_start(uap);
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if (!pl011_dma_tx_start(uap))
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pl011_start_tx_pio(uap);
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}
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@ -1424,42 +1454,12 @@ static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,
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return true;
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}
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static void pl011_rs485_tx_start(struct uart_amba_port *uap)
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{
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struct uart_port *port = &uap->port;
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u32 cr;
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/* Enable transmitter */
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cr = pl011_read(uap, REG_CR);
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cr |= UART011_CR_TXE;
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/* Disable receiver if half-duplex */
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if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
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cr &= ~UART011_CR_RXE;
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if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
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cr &= ~UART011_CR_RTS;
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else
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cr |= UART011_CR_RTS;
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pl011_write(cr, uap, REG_CR);
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if (port->rs485.delay_rts_before_send)
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mdelay(port->rs485.delay_rts_before_send);
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uap->rs485_tx_started = true;
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}
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/* Returns true if tx interrupts have to be (kept) enabled */
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static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq)
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{
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struct circ_buf *xmit = &uap->port.state->xmit;
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int count = uap->fifosize >> 1;
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if ((uap->port.rs485.flags & SER_RS485_ENABLED) &&
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!uap->rs485_tx_started)
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pl011_rs485_tx_start(uap);
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if (uap->port.x_char) {
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if (!pl011_tx_char(uap, uap->port.x_char, from_irq))
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return true;
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@ -251,7 +251,9 @@ static int stm32_usart_config_rs485(struct uart_port *port, struct ktermios *ter
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writel_relaxed(cr3, port->membase + ofs->cr3);
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writel_relaxed(cr1, port->membase + ofs->cr1);
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rs485conf->flags |= SER_RS485_RX_DURING_TX;
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if (!port->rs485_rx_during_tx_gpio)
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rs485conf->flags |= SER_RS485_RX_DURING_TX;
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} else {
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stm32_usart_clr_bits(port, ofs->cr3,
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USART_CR3_DEM | USART_CR3_DEP);
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