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PCI: Add defines for Designated Vendor-Specific Extended Capability
Add PCIe Designated Vendor-Specific Extended Capability (DVSEC) and defines for the header offsets. Defined in PCIe r5.0, sec 7.9.6. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -723,6 +723,7 @@
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#define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */
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#define PCI_EXT_CAP_ID_L1SS 0x1E /* L1 PM Substates */
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#define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */
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#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
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#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
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#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
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#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT
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@ -1066,6 +1067,10 @@
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#define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000 /* LTR_L1.2_THRESHOLD_Scale */
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#define PCI_L1SS_CTL2 0x0c /* Control 2 Register */
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/* Designated Vendor-Specific (DVSEC, PCI_EXT_CAP_ID_DVSEC) */
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#define PCI_DVSEC_HEADER1 0x4 /* Designated Vendor-Specific Header1 */
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#define PCI_DVSEC_HEADER2 0x8 /* Designated Vendor-Specific Header2 */
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/* Data Link Feature */
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#define PCI_DLF_CAP 0x04 /* Capabilities Register */
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#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */
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