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pinctrl: renesas: rzg2l: Avoid configuring ISEL in gpio_irq_{en,dis}able*(
Currently on irq_disable(), we are disabling gpio interrupt enable(ISEL). That means the pin is just gpio input and not gpio input interrupt any more. So, move configuring ISEL in rzg2l_gpio_child_to_parent_hwirq()/ rzg2l_gpio_irq_domain_free() so that the pin will be gpioint always even during irq_disable(). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240206135318.165426-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -1836,22 +1836,18 @@ static void rzg2l_gpio_irq_endisable(struct rzg2l_pinctrl *pctrl,
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static void rzg2l_gpio_irq_disable(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);
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unsigned int hwirq = irqd_to_hwirq(d);
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irq_chip_disable_parent(d);
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rzg2l_gpio_irq_endisable(pctrl, hwirq, false);
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gpiochip_disable_irq(gc, hwirq);
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}
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static void rzg2l_gpio_irq_enable(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip);
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unsigned int hwirq = irqd_to_hwirq(d);
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gpiochip_enable_irq(gc, hwirq);
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rzg2l_gpio_irq_endisable(pctrl, hwirq, true);
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irq_chip_enable_parent(d);
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}
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@ -1933,6 +1929,7 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
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goto err;
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}
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rzg2l_gpio_irq_endisable(pctrl, child, true);
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pctrl->hwirq[irq] = child;
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irq += RZG2L_TINT_IRQ_START_INDEX;
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@ -1976,6 +1973,7 @@ static void rzg2l_gpio_irq_domain_free(struct irq_domain *domain, unsigned int v
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for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) {
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if (pctrl->hwirq[i] == hwirq) {
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rzg2l_gpio_irq_endisable(pctrl, hwirq, false);
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rzg2l_gpio_free(gc, hwirq);
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spin_lock_irqsave(&pctrl->bitmap_lock, flags);
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bitmap_release_region(pctrl->tint_slot, i, get_order(1));
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