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hwspinlock: remove sirf driver
The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210120132537.2285157-1-arnd@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -1,28 +0,0 @@
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SIRF Hardware spinlock device Binding
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-----------------------------------------------
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Required properties :
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- compatible : shall contain only one of the following:
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"sirf,hwspinlock"
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- reg : the register address of hwspinlock
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- #hwlock-cells : hwlock users only use the hwlock id to represent a specific
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hwlock, so the number of cells should be <1> here.
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Please look at the generic hwlock binding for usage information for consumers,
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"Documentation/devicetree/bindings/hwlock/hwlock.txt"
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Example of hwlock provider:
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hwlock {
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compatible = "sirf,hwspinlock";
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reg = <0x13240000 0x00010000>;
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#hwlock-cells = <1>;
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};
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Example of hwlock users:
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node {
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...
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hwlocks = <&hwlock 2>;
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...
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};
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@ -28,17 +28,6 @@ config HWSPINLOCK_QCOM
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If unsure, say N.
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If unsure, say N.
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config HWSPINLOCK_SIRF
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tristate "SIRF Hardware Spinlock device"
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depends on ARCH_SIRF || COMPILE_TEST
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help
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Say y here to support the SIRF Hardware Spinlock device, which
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provides a synchronisation mechanism for the various processors
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on the SoC.
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It's safe to say n here if you're not interested in SIRF hardware
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spinlock or just want a bare minimum kernel.
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config HWSPINLOCK_SPRD
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config HWSPINLOCK_SPRD
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tristate "SPRD Hardware Spinlock device"
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tristate "SPRD Hardware Spinlock device"
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depends on ARCH_SPRD || COMPILE_TEST
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depends on ARCH_SPRD || COMPILE_TEST
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@ -6,7 +6,6 @@
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obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o
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obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o
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obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_SIRF) += sirf_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_SPRD) += sprd_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_SPRD) += sprd_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_STM32) += stm32_hwspinlock.o
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obj-$(CONFIG_HWSPINLOCK_STM32) += stm32_hwspinlock.o
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obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o
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obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o
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@ -1,105 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* SIRF hardware spinlock driver
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*
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* Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/hwspinlock.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "hwspinlock_internal.h"
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struct sirf_hwspinlock {
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void __iomem *io_base;
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struct hwspinlock_device bank;
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};
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/* Number of Hardware Spinlocks*/
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#define HW_SPINLOCK_NUMBER 30
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/* Hardware spinlock register offsets */
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#define HW_SPINLOCK_BASE 0x404
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#define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x))
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static int sirf_hwspinlock_trylock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* attempt to acquire the lock by reading value == 1 from it */
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return !!readl(lock_addr);
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}
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static void sirf_hwspinlock_unlock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* release the lock by writing 0 to it */
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writel(0, lock_addr);
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}
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static const struct hwspinlock_ops sirf_hwspinlock_ops = {
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.trylock = sirf_hwspinlock_trylock,
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.unlock = sirf_hwspinlock_unlock,
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};
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static int sirf_hwspinlock_probe(struct platform_device *pdev)
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{
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struct sirf_hwspinlock *hwspin;
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struct hwspinlock *hwlock;
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int idx;
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if (!pdev->dev.of_node)
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return -ENODEV;
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hwspin = devm_kzalloc(&pdev->dev,
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struct_size(hwspin, bank.lock,
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HW_SPINLOCK_NUMBER),
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GFP_KERNEL);
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if (!hwspin)
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return -ENOMEM;
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/* retrieve io base */
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hwspin->io_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(hwspin->io_base))
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return PTR_ERR(hwspin->io_base);
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for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) {
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hwlock = &hwspin->bank.lock[idx];
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hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx);
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}
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platform_set_drvdata(pdev, hwspin);
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return devm_hwspin_lock_register(&pdev->dev, &hwspin->bank,
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&sirf_hwspinlock_ops, 0,
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HW_SPINLOCK_NUMBER);
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}
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static const struct of_device_id sirf_hwpinlock_ids[] = {
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{ .compatible = "sirf,hwspinlock", },
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{},
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};
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MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids);
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static struct platform_driver sirf_hwspinlock_driver = {
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.probe = sirf_hwspinlock_probe,
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.driver = {
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.name = "atlas7_hwspinlock",
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.of_match_table = sirf_hwpinlock_ids,
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},
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};
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module_platform_driver(sirf_hwspinlock_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("SIRF Hardware spinlock driver");
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MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>");
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