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hwspinlock: remove sirf driver

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The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.

Cc: Barry Song <baohua@kernel.org>
Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120132537.2285157-1-arnd@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Arnd Bergmann 2021-01-20 14:25:37 +01:00 committed by Bjorn Andersson
parent a38fd87484
commit 1cb8f3e2d8
4 changed files with 0 additions and 145 deletions
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28
Documentation/devicetree/bindings/hwlock/sirf,hwspinlock.txt
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@ -1,28 +0,0 @@
SIRF Hardware spinlock device Binding
-----------------------------------------------
Required properties :
- compatible : shall contain only one of the following:
"sirf,hwspinlock"
- reg : the register address of hwspinlock
- #hwlock-cells : hwlock users only use the hwlock id to represent a specific
hwlock, so the number of cells should be <1> here.
Please look at the generic hwlock binding for usage information for consumers,
"Documentation/devicetree/bindings/hwlock/hwlock.txt"
Example of hwlock provider:
hwlock {
compatible = "sirf,hwspinlock";
reg = <0x13240000 0x00010000>;
#hwlock-cells = <1>;
};
Example of hwlock users:
node {
...
hwlocks = <&hwlock 2>;
...
};

11
drivers/hwspinlock/Kconfig
View File

@ -28,17 +28,6 @@ config HWSPINLOCK_QCOM
If unsure, say N.
config HWSPINLOCK_SIRF
tristate "SIRF Hardware Spinlock device"
depends on ARCH_SIRF || COMPILE_TEST
help
Say y here to support the SIRF Hardware Spinlock device, which
provides a synchronisation mechanism for the various processors
on the SoC.
It's safe to say n here if you're not interested in SIRF hardware
spinlock or just want a bare minimum kernel.
config HWSPINLOCK_SPRD
tristate "SPRD Hardware Spinlock device"
depends on ARCH_SPRD || COMPILE_TEST

1
drivers/hwspinlock/Makefile
View File

@ -6,7 +6,6 @@
obj-$(CONFIG_HWSPINLOCK) += hwspinlock_core.o
obj-$(CONFIG_HWSPINLOCK_OMAP) += omap_hwspinlock.o
obj-$(CONFIG_HWSPINLOCK_QCOM) += qcom_hwspinlock.o
obj-$(CONFIG_HWSPINLOCK_SIRF) += sirf_hwspinlock.o
obj-$(CONFIG_HWSPINLOCK_SPRD) += sprd_hwspinlock.o
obj-$(CONFIG_HWSPINLOCK_STM32) += stm32_hwspinlock.o
obj-$(CONFIG_HSEM_U8500) += u8500_hsem.o

105
drivers/hwspinlock/sirf_hwspinlock.c
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@ -1,105 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* SIRF hardware spinlock driver
*
* Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/hwspinlock.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "hwspinlock_internal.h"
struct sirf_hwspinlock {
void __iomem *io_base;
struct hwspinlock_device bank;
};
/* Number of Hardware Spinlocks*/
#define HW_SPINLOCK_NUMBER 30
/* Hardware spinlock register offsets */
#define HW_SPINLOCK_BASE 0x404
#define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x))
static int sirf_hwspinlock_trylock(struct hwspinlock *lock)
{
void __iomem *lock_addr = lock->priv;
/* attempt to acquire the lock by reading value == 1 from it */
return !!readl(lock_addr);
}
static void sirf_hwspinlock_unlock(struct hwspinlock *lock)
{
void __iomem *lock_addr = lock->priv;
/* release the lock by writing 0 to it */
writel(0, lock_addr);
}
static const struct hwspinlock_ops sirf_hwspinlock_ops = {
.trylock = sirf_hwspinlock_trylock,
.unlock = sirf_hwspinlock_unlock,
};
static int sirf_hwspinlock_probe(struct platform_device *pdev)
{
struct sirf_hwspinlock *hwspin;
struct hwspinlock *hwlock;
int idx;
if (!pdev->dev.of_node)
return -ENODEV;
hwspin = devm_kzalloc(&pdev->dev,
struct_size(hwspin, bank.lock,
HW_SPINLOCK_NUMBER),
GFP_KERNEL);
if (!hwspin)
return -ENOMEM;
/* retrieve io base */
hwspin->io_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(hwspin->io_base))
return PTR_ERR(hwspin->io_base);
for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) {
hwlock = &hwspin->bank.lock[idx];
hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx);
}
platform_set_drvdata(pdev, hwspin);
return devm_hwspin_lock_register(&pdev->dev, &hwspin->bank,
&sirf_hwspinlock_ops, 0,
HW_SPINLOCK_NUMBER);
}
static const struct of_device_id sirf_hwpinlock_ids[] = {
{ .compatible = "sirf,hwspinlock", },
{},
};
MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids);
static struct platform_driver sirf_hwspinlock_driver = {
.probe = sirf_hwspinlock_probe,
.driver = {
.name = "atlas7_hwspinlock",
.of_match_table = sirf_hwpinlock_ids,
},
};
module_platform_driver(sirf_hwspinlock_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("SIRF Hardware spinlock driver");
MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>");