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Qualcomm ARM64 Updates for v4.5

Browse Source 
* Add fixed rate oscillators to dts
 * Fixup PMIC alias and properties
 * Change 8916-MTP compatible to be compliant with new scheme
 * Fix 8x16 UART pinctrl configuration
 * Add SMEM, RPM/SMD, and PM8916 support on MSM8916
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWckTvAAoJEFKiBbHx2RXVAH0QAIOVo46P/LtOQk8J+A8lUyM3
 eui/kuJG5H9iKf+r7maPCnWQbkdRfAevHFBixDfqq3WLK6muNAsWlAeTWasBG2AR
 mMqg/0pkVCJHHxJ9xeMqdo7RkAPDgmk/CiR+kD+SA19N+OegU+fExI7RyEd9LQ/B
 sQgbebZxB5VBQPIPlJorFP4UPG6T/sbV4FjsQ65GMGxZ321EV4OsApJHbEK9bzO7
 8fFAU6OX9wRcqkQ9K5aLTo312ZzE1TvgyPLfSfZmAVAmgrWSC99nqKzd3u1qeCOC
 jAzcv9yGMx4bfCMZcTuHp2OIGHbxFE9S0vBHfZrlzYxn8gniKBepGIr8w09TZgEq
 TfDl2pzzfOsLF2sh1UAA3Is/i88zgf/EXt4q+1qgSZAGG66BvNUHDZP3uXVItRcY
 GvugxN/96v5eszrG/0d+0IYQzYvFqXAbFfuYi5ax4+B4eah5YNPjSufJnWbHKogt
 Eg3DVnvlilMBDpqc8zMCR5AnLsFFxGZEtsd8WTofE3Gd8wtkqCMS95Hh5PkNxkyC
 bp1WXKEarMPjJ0X3YtAhQo7M5eFMYsZPxblhCr1CPmuVFzbwlyMkpqdaX23H93Ni
 it+geo3aRKFdtxIX11bqCO6S6f2en7ZGg1bsychxqk+oN309EAqJkQAyNGYpo2h3
 aWGLpsxVEC3/NHNh9aRg
 =mu4g
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Qualcomm ARM64 Updates for v4.5

* Add fixed rate oscillators to dts
* Fixup PMIC alias and properties
* Change 8916-MTP compatible to be compliant with new scheme
* Fix 8x16 UART pinctrl configuration
* Add SMEM, RPM/SMD, and PM8916 support on MSM8916

* tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: Add PM8916 support on MSM8916
  arm64: dts: qcom: Add RPM/SMD support on MSM8916
  arm64: dts: qcom: Add MSM8916 SMEM nodes
  arm64: dts: set the default i2c pin drive strength to 16mA
  arm64: dts: fix the i2c aliasing to match to schematics.
  arm64: dts: qcom: msm8916: Add fixed rate on-board oscillators
  arm64: dts: qcom: Alias pm8916 on msm8916 devices
  arm64: dts: qcom: Make msm8916-mtp compatible string compliant
  arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
  arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-12-22 12:20:54 -08:00
commit 1c5d795704
6 changed files with 128 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
View File

@ -20,6 +20,10 @@
aliases {
serial0 = &blsp1_uart2;
serial1 = &blsp1_uart1;
usid0 = &pm8916_0;
i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4;
};
chosen {

2
arch/arm64/boot/dts/qcom/msm8916-mtp.dts
View File

@ -17,6 +17,6 @@
/ {
model = "Qualcomm Technologies, Inc. MSM 8916 MTP";
compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp-smb1360",
compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp/1",
"qcom,msm8916", "qcom,mtp";
};

1
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
View File

@ -17,6 +17,7 @@
/ {
aliases {
serial0 = &blsp1_uart2;
usid0 = &pm8916_0;
};
chosen {

19
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
View File

@ -16,10 +16,13 @@
blsp1_uart1_default: blsp1_uart1_default {
pinmux {
function = "blsp_uart1";
pins = "gpio0", "gpio1";
// TX, RX, CTS_N, RTS_N
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
pinconf {
pins = "gpio0", "gpio1";
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <16>;
bias-disable;
};
@ -28,10 +31,12 @@
blsp1_uart1_sleep: blsp1_uart1_sleep {
pinmux {
function = "gpio";
pins = "gpio0", "gpio1";
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
pinconf {
pins = "gpio0", "gpio1";
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
drive-strength = <2>;
bias-pull-down;
};
@ -272,7 +277,7 @@
};
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
drive-strength = <16>;
bias-disable = <0>;
};
};
@ -296,7 +301,7 @@
};
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <2>;
drive-strength = <16>;
bias-disable = <0>;
};
};
@ -320,7 +325,7 @@
};
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
drive-strength = <16>;
bias-disable = <0>;
};
};

107
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -37,6 +37,22 @@
reg = <0 0 0 0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
reserve_aligned@86000000 {
reg = <0x0 0x86000000 0x0 0x0300000>;
no-map;
};
smem_mem: smem_region@86300000 {
reg = <0x0 0x86300000 0x0 0x0100000>;
no-map;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -74,6 +90,29 @@
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
clocks {
xo_board: xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
sleep_clk: sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
hwlocks = <&tcsr_mutex 3>;
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@ -103,21 +142,46 @@
reg = <0x1800000 0x80000>;
};
tcsr_mutex_regs: syscon@1905000 {
compatible = "syscon";
reg = <0x1905000 0x20000>;
};
tcsr_mutex: hwlock {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_regs 0 0x1000>;
#hwlock-cells = <1>;
};
rpm_msg_ram: memory@60000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x60000 0x8000>;
};
blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78af000 0x200>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 1>, <&blsp_dma 0>;
dma-names = "rx", "tx";
status = "disabled";
};
apcs: syscon@b011000 {
compatible = "syscon";
reg = <0x0b011000 0x1000>;
};
blsp1_uart2: serial@78b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b0000 0x200>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 3>, <&blsp_dma 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -438,6 +502,49 @@
clock-names = "core";
};
};
smd {
compatible = "qcom,smd";
rpm {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests {
compatible = "qcom,rpm-msm8916";
qcom,smd-channels = "rpm_requests";
pm8916-regulators {
compatible = "qcom,rpm-pm8916-regulators";
pm8916_s1: s1 {};
pm8916_s2: s2 {};
pm8916_s3: s3 {};
pm8916_s4: s4 {};
pm8916_l1: l1 {};
pm8916_l2: l2 {};
pm8916_l3: l3 {};
pm8916_l4: l4 {};
pm8916_l5: l5 {};
pm8916_l6: l6 {};
pm8916_l7: l7 {};
pm8916_l8: l8 {};
pm8916_l9: l9 {};
pm8916_l10: l10 {};
pm8916_l11: l11 {};
pm8916_l12: l12 {};
pm8916_l13: l13 {};
pm8916_l14: l14 {};
pm8916_l15: l15 {};
pm8916_l16: l16 {};
pm8916_l17: l17 {};
pm8916_l18: l18 {};
};
};
};
};
};
#include "msm8916-pins.dtsi"

6
arch/arm64/boot/dts/qcom/pm8916.dtsi
View File

@ -4,8 +4,8 @@
&spmi_bus {
usid0: pm8916@0 {
compatible = "qcom,spmi-pmic";
pm8916_0: pm8916@0 {
compatible = "qcom,pm8916", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
@ -90,7 +90,7 @@
};
};
usid1: pm8916@1 {
pm8916_1: pm8916@1 {
compatible = "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;