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iommu: Remove SVA related callbacks from iommu ops
These ops'es have been deprecated. There's no need for them anymore. Remove them to avoid dead code. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Tony Zhu <tony.zhu@intel.com> Link: https://lore.kernel.org/r/20221031005917.45690-11-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -344,11 +344,6 @@ __arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm)
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if (!bond)
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return ERR_PTR(-ENOMEM);
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/* Allocate a PASID for this mm if necessary */
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ret = iommu_sva_alloc_pasid(mm, 1, (1U << master->ssid_bits) - 1);
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if (ret)
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goto err_free_bond;
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bond->mm = mm;
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bond->sva.dev = dev;
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refcount_set(&bond->refs, 1);
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@ -367,41 +362,6 @@ err_free_bond:
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return ERR_PTR(ret);
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}
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struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm)
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{
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struct iommu_sva *handle;
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
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if (smmu_domain->stage != ARM_SMMU_DOMAIN_S1)
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return ERR_PTR(-EINVAL);
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mutex_lock(&sva_lock);
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handle = __arm_smmu_sva_bind(dev, mm);
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mutex_unlock(&sva_lock);
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return handle;
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}
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void arm_smmu_sva_unbind(struct iommu_sva *handle)
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{
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struct arm_smmu_bond *bond = sva_to_bond(handle);
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mutex_lock(&sva_lock);
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if (refcount_dec_and_test(&bond->refs)) {
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list_del(&bond->list);
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arm_smmu_mmu_notifier_put(bond->smmu_mn);
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kfree(bond);
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}
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mutex_unlock(&sva_lock);
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}
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u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle)
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{
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struct arm_smmu_bond *bond = sva_to_bond(handle);
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return bond->mm->pasid;
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}
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bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
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{
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unsigned long reg, fld;
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@ -2863,9 +2863,6 @@ static struct iommu_ops arm_smmu_ops = {
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.remove_dev_pasid = arm_smmu_remove_dev_pasid,
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.dev_enable_feat = arm_smmu_dev_enable_feature,
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.dev_disable_feat = arm_smmu_dev_disable_feature,
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.sva_bind = arm_smmu_sva_bind,
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.sva_unbind = arm_smmu_sva_unbind,
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.sva_get_pasid = arm_smmu_sva_get_pasid,
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.page_response = arm_smmu_page_response,
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.def_domain_type = arm_smmu_def_domain_type,
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.pgsize_bitmap = -1UL, /* Restricted during device attach */
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@ -754,9 +754,6 @@ bool arm_smmu_master_sva_enabled(struct arm_smmu_master *master);
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int arm_smmu_master_enable_sva(struct arm_smmu_master *master);
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int arm_smmu_master_disable_sva(struct arm_smmu_master *master);
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bool arm_smmu_master_iopf_supported(struct arm_smmu_master *master);
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struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm);
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void arm_smmu_sva_unbind(struct iommu_sva *handle);
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u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle);
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void arm_smmu_sva_notifier_synchronize(void);
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struct iommu_domain *arm_smmu_sva_domain_alloc(void);
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void arm_smmu_sva_remove_dev_pasid(struct iommu_domain *domain,
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@ -792,19 +789,6 @@ static inline bool arm_smmu_master_iopf_supported(struct arm_smmu_master *master
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return false;
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}
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static inline struct iommu_sva *
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arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline void arm_smmu_sva_unbind(struct iommu_sva *handle) {}
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static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle)
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{
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return IOMMU_PASID_INVALID;
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}
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static inline void arm_smmu_sva_notifier_synchronize(void) {}
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static inline struct iommu_domain *arm_smmu_sva_domain_alloc(void)
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@ -4751,9 +4751,6 @@ const struct iommu_ops intel_iommu_ops = {
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.remove_dev_pasid = intel_iommu_remove_dev_pasid,
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.pgsize_bitmap = SZ_4K,
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#ifdef CONFIG_INTEL_IOMMU_SVM
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.sva_bind = intel_svm_bind,
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.sva_unbind = intel_svm_unbind,
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.sva_get_pasid = intel_svm_get_pasid,
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.page_response = intel_svm_page_response,
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#endif
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.default_domain_ops = &(const struct iommu_domain_ops) {
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@ -748,9 +748,6 @@ struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn);
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extern void intel_svm_check(struct intel_iommu *iommu);
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extern int intel_svm_enable_prq(struct intel_iommu *iommu);
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extern int intel_svm_finish_prq(struct intel_iommu *iommu);
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struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm);
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void intel_svm_unbind(struct iommu_sva *handle);
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u32 intel_svm_get_pasid(struct iommu_sva *handle);
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int intel_svm_page_response(struct device *dev, struct iommu_fault_event *evt,
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struct iommu_page_response *msg);
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struct iommu_domain *intel_svm_domain_alloc(void);
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@ -296,14 +296,6 @@ out:
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return 0;
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}
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static int intel_svm_alloc_pasid(struct device *dev, struct mm_struct *mm)
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{
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ioasid_t max_pasid = dev_is_pci(dev) ?
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pci_max_pasids(to_pci_dev(dev)) : intel_pasid_max_id;
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return iommu_sva_alloc_pasid(mm, PASID_MIN, max_pasid - 1);
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}
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static struct iommu_sva *intel_svm_bind_mm(struct intel_iommu *iommu,
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struct device *dev,
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struct mm_struct *mm)
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@ -771,47 +763,6 @@ prq_advance:
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return IRQ_RETVAL(handled);
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}
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struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm)
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{
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struct intel_iommu *iommu = device_to_iommu(dev, NULL, NULL);
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struct iommu_sva *sva;
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int ret;
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mutex_lock(&pasid_mutex);
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ret = intel_svm_alloc_pasid(dev, mm);
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if (ret) {
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mutex_unlock(&pasid_mutex);
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return ERR_PTR(ret);
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}
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sva = intel_svm_bind_mm(iommu, dev, mm);
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mutex_unlock(&pasid_mutex);
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return sva;
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}
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void intel_svm_unbind(struct iommu_sva *sva)
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{
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struct intel_svm_dev *sdev = to_intel_svm_dev(sva);
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mutex_lock(&pasid_mutex);
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intel_svm_unbind_mm(sdev->dev, sdev->pasid);
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mutex_unlock(&pasid_mutex);
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}
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u32 intel_svm_get_pasid(struct iommu_sva *sva)
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{
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struct intel_svm_dev *sdev;
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u32 pasid;
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mutex_lock(&pasid_mutex);
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sdev = to_intel_svm_dev(sva);
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pasid = sdev->pasid;
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mutex_unlock(&pasid_mutex);
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return pasid;
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}
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int intel_svm_page_response(struct device *dev,
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struct iommu_fault_event *evt,
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struct iommu_page_response *msg)
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@ -227,9 +227,6 @@ struct iommu_iotlb_gather {
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* driver init to device driver init (default no)
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* @dev_enable/disable_feat: per device entries to enable/disable
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* iommu specific features.
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* @sva_bind: Bind process address space to device
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* @sva_unbind: Unbind process address space from device
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* @sva_get_pasid: Get PASID associated to a SVA handle
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* @page_response: handle page request response
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* @def_domain_type: device default domain type, return value:
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* - IOMMU_DOMAIN_IDENTITY: must use an identity domain
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@ -263,10 +260,6 @@ struct iommu_ops {
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int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
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int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
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struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm);
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void (*sva_unbind)(struct iommu_sva *handle);
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u32 (*sva_get_pasid)(struct iommu_sva *handle);
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int (*page_response)(struct device *dev,
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struct iommu_fault_event *evt,
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struct iommu_page_response *msg);
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