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ASoC: jz4740-i2s: Remove .set_sysclk()

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.set_sysclk() is effectively unused here. No machine drivers use
jz4740-i2s; and JZ4740_I2S_CLKSRC_EXT is the only selectable clock
source with simple-card, but that is also the default source and
has a fixed frequency, so configuring it would be redundant.

simple-card ignores -ENOTSUPP error codes when setting the sysclock,
so any device trees that do set the sysclock for some reason should
still work.

It's still possible to configure the clock parent manually in the
device tree and control frequency using other simple-card options,
so at the end of the day there's no real loss in functionality.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20221028103418.17578-4-aidanmacdonald.0x0@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Aidan MacDonald 2022-10-28 11:34:18 +01:00 committed by Mark Brown
parent cf4484a0e6
commit 1c0036e03e
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 0 additions and 42 deletions
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32
sound/soc/jz4740/jz4740-i2s.c
View File

@ -23,8 +23,6 @@
#include <sound/initval.h>
#include <sound/dmaengine_pcm.h>
#include "jz4740-i2s.h"
#define JZ_REG_AIC_CONF 0x00
#define JZ_REG_AIC_CTRL 0x04
#define JZ_REG_AIC_I2S_FMT 0x10
@ -273,35 +271,6 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
struct clk *parent;
int ret = 0;
switch (clk_id) {
case JZ4740_I2S_CLKSRC_EXT:
parent = clk_get(NULL, "ext");
if (IS_ERR(parent))
return PTR_ERR(parent);
clk_set_parent(i2s->clk_i2s, parent);
break;
case JZ4740_I2S_CLKSRC_PLL:
parent = clk_get(NULL, "pll half");
if (IS_ERR(parent))
return PTR_ERR(parent);
clk_set_parent(i2s->clk_i2s, parent);
ret = clk_set_rate(i2s->clk_i2s, freq);
break;
default:
return -EINVAL;
}
clk_put(parent);
return ret;
}
static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
@ -318,7 +287,6 @@ static const struct snd_soc_dai_ops jz4740_i2s_dai_ops = {
.trigger = jz4740_i2s_trigger,
.hw_params = jz4740_i2s_hw_params,
.set_fmt = jz4740_i2s_set_fmt,
.set_sysclk = jz4740_i2s_set_sysclk,
};
#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \

10
sound/soc/jz4740/jz4740-i2s.h
View File

@ -1,10 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _JZ4740_I2S_H
#define _JZ4740_I2S_H
/* I2S clock source */
#define JZ4740_I2S_CLKSRC_EXT 0
#define JZ4740_I2S_CLKSRC_PLL 1
#endif