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Networking changes for 6.10.
Core & protocols ---------------- - Complete rework of garbage collection of AF_UNIX sockets. AF_UNIX is prone to forming reference count cycles due to fd passing functionality. New method based on Tarjan's Strongly Connected Components algorithm should be both faster and remove a lot of workarounds we accumulated over the years. - Add TCP fraglist GRO support, allowing chaining multiple TCP packets and forwarding them together. Useful for small switches / routers which lack basic checksum offload in some scenarios (e.g. PPPoE). - Support using SMP threads for handling packet backlog i.e. packet processing from software interfaces and old drivers which don't use NAPI. This helps move the processing out of the softirq jumble. - Continue work of converting from rtnl lock to RCU protection. Don't require rtnl lock when reading: IPv6 routing FIB, IPv6 address labels, netdev threaded NAPI sysfs files, bonding driver's sysfs files, MPLS devconf, IPv4 FIB rules, netns IDs, tcp metrics, TC Qdiscs, neighbor entries, ARP entries via ioctl(SIOCGARP), a lot of the link information available via rtnetlink. - Small optimizations from Eric to UDP wake up handling, memory accounting, RPS/RFS implementation, TCP packet sizing etc. - Allow direct page recycling in the bulk API used by XDP, for +2% PPS. - Support peek with an offset on TCP sockets. - Add MPTCP APIs for querying last time packets were received/sent/acked, and whether MPTCP "upgrade" succeeded on a TCP socket. - Add intra-node communication shortcut to improve SMC performance. - Add IPv6 (and IPv{4,6}-over-IPv{4,6}) support to the GTP protocol driver. - Add HSR-SAN (RedBOX) mode of operation to the HSR protocol driver. - Add reset reasons for tracing what caused a TCP reset to be sent. - Introduce direction attribute for xfrm (IPSec) states. State can be used either for input or output packet processing. Things we sprinkled into general kernel code -------------------------------------------- - Add bitmap_{read,write}(), bitmap_size(), expose BYTES_TO_BITS(). This required touch-ups and renaming of a few existing users. - Add Endian-dependent __counted_by_{le,be} annotations. - Make building selftests "quieter" by printing summaries like "CC object.o" rather than full commands with all the arguments. Netfilter --------- - Use GFP_KERNEL to clone elements, to deal better with OOM situations and avoid failures in the .commit step. BPF --- - Add eBPF JIT for ARCv2 CPUs. - Support attaching kprobe BPF programs through kprobe_multi link in a session mode, meaning, a BPF program is attached to both function entry and return, the entry program can decide if the return program gets executed and the entry program can share u64 cookie value with return program. "Session mode" is a common use-case for tetragon and bpftrace. - Add the ability to specify and retrieve BPF cookie for raw tracepoint programs in order to ease migration from classic to raw tracepoints. - Add an internal-only BPF per-CPU instruction for resolving per-CPU memory addresses and implement support in x86, ARM64 and RISC-V JITs. This allows inlining functions which need to access per-CPU state. - Optimize x86 BPF JIT's emit_mov_imm64, and add support for various atomics in bpf_arena which can be JITed as a single x86 instruction. Support BPF arena on ARM64. - Add a new bpf_wq API for deferring events and refactor process-context bpf_timer code to keep common code where possible. - Harden the BPF verifier's and/or/xor value tracking. - Introduce crypto kfuncs to let BPF programs call kernel crypto APIs. - Support bpf_tail_call_static() helper for BPF programs with GCC 13. - Add bpf_preempt_{disable,enable}() kfuncs in order to allow a BPF program to have code sections where preemption is disabled. Driver API ---------- - Skip software TC processing completely if all installed rules are marked as HW-only, instead of checking the HW-only flag rule by rule. - Add support for configuring PoE (Power over Ethernet), similar to the already existing support for PoDL (Power over Data Line) config. - Initial bits of a queue control API, for now allowing a single queue to be reset without disturbing packet flow to other queues. - Common (ethtool) statistics for hardware timestamping. Tests and tooling ----------------- - Remove the need to create a config file to run the net forwarding tests so that a naive "make run_tests" can exercise them. - Define a method of writing tests which require an external endpoint to communicate with (to send/receive data towards the test machine). Add a few such tests. - Create a shared code library for writing Python tests. Expose the YAML Netlink library from tools/ to the tests for easy Netlink access. - Move netfilter tests under net/, extend them, separate performance tests from correctness tests, and iron out issues found by running them "on every commit". - Refactor BPF selftests to use common network helpers. - Further work filling in YAML definitions of Netlink messages for: nftables, team driver, bonding interfaces, vlan interfaces, VF info, TC u32 mark, TC police action. - Teach Python YAML Netlink to decode attribute policies. - Extend the definition of the "indexed array" construct in the specs to cover arrays of scalars rather than just nests. - Add hyperlinks between definitions in generated Netlink docs. Drivers ------- - Make sure unsupported flower control flags are rejected by drivers, and make more drivers report errors directly to the application rather than dmesg (large number of driver changes from Asbjørn Sloth Tønnesen). - Ethernet high-speed NICs: - Broadcom (bnxt): - support multiple RSS contexts and steering traffic to them - support XDP metadata - make page pool allocations more NUMA aware - Intel (100G, ice, idpf): - extract datapath code common among Intel drivers into a library - use fewer resources in switchdev by sharing queues with the PF - add PFCP filter support - add Ethernet filter support - use a spinlock instead of HW lock in PTP clock ops - support 5 layer Tx scheduler topology - nVidia/Mellanox: - 800G link modes and 100G SerDes speeds - per-queue IRQ coalescing configuration - Marvell Octeon: - support offloading TC packet mark action - Ethernet NICs consumer, embedded and virtual: - stop lying about skb->truesize in USB Ethernet drivers, it messes up TCP memory calculations - Google cloud vNIC: - support changing ring size via ethtool - support ring reset using the queue control API - VirtIO net: - expose flow hash from RSS to XDP - per-queue statistics - add selftests - Synopsys (stmmac): - support controllers which require an RX clock signal from the MII bus to perform their hardware initialization - TI: - icssg_prueth: support ICSSG-based Ethernet on AM65x SR1.0 devices - icssg_prueth: add SW TX / RX Coalescing based on hrtimers - cpsw: minimal XDP support - Renesas (ravb): - support describing the MDIO bus - Realtek (r8169): - add support for RTL8168M - Microchip Sparx5: - matchall and flower actions mirred and redirect - Ethernet switches: - nVidia/Mellanox: - improve events processing performance - Marvell: - add support for MV88E6250 family internal PHYs - Microchip: - add DCB and DSCP mapping support for KSZ switches - vsc73xx: convert to PHYLINK - Realtek: - rtl8226b/rtl8221b: add C45 instances and SerDes switching - Many driver changes related to PHYLIB and PHYLINK deprecated API cleanup. - Ethernet PHYs: - Add a new driver for Airoha EN8811H 2.5 Gigabit PHY. - micrel: lan8814: add support for PPS out and external timestamp trigger - WiFi: - Disable Wireless Extensions (WEXT) in all Wi-Fi 7 devices drivers. Modern devices can only be configured using nl80211. - mac80211/cfg80211 - handle color change per link for WiFi 7 Multi-Link Operation - Intel (iwlwifi): - don't support puncturing in 5 GHz - support monitor mode on passive channels - BZ-W device support - P2P with HE/EHT support - re-add support for firmware API 90 - provide channel survey information for Automatic Channel Selection - MediaTek (mt76): - mt7921 LED control - mt7925 EHT radiotap support - mt7920e PCI support - Qualcomm (ath11k): - P2P support for QCA6390, WCN6855 and QCA2066 - support hibernation - ieee80211-freq-limit Device Tree property support - Qualcomm (ath12k): - refactoring in preparation of multi-link support - suspend and hibernation support - ACPI support - debugfs support, including dfs_simulate_radar support - RealTek: - rtw88: RTL8723CS SDIO device support - rtw89: RTL8922AE Wi-Fi 7 PCI device support - rtw89: complete features of new WiFi 7 chip 8922AE including BT-coexistence and Wake-on-WLAN - rtw89: use BIOS ACPI settings to set TX power and channels - rtl8xxxu: enable Management Frame Protection (MFP) support - Bluetooth: - support for Intel BlazarI and Filmore Peak2 (BE201) - support for MediaTek MT7921S SDIO - initial support for Intel PCIe BT driver - remove HCI_AMP support Signed-off-by: Jakub Kicinski <kuba@kernel.org> -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE6jPA+I1ugmIBA4hXMUZtbf5SIrsFAmZD6sQACgkQMUZtbf5S IrtLYw/+I73ePGIye37o2jpbodcLAUZVfF3r6uYUzK8hokEcKD0QVJa9w7PizLZ3 UO45ClOXFLJCkfP4reFenLfxGCel2AJI+F7VFl2xaO2XgrcH/lnVrHqKZEAEXjls KoYMnShIolv7h2MKP6hHtyTi2j1wvQUKsZC71o9/fuW+4fUT8gECx1YtYcL73wrw gEMdlUgBYC3jiiCUHJIFX6iPJ2t/TC+q1eIIF2K/Osrk2kIqQhzoozcL4vpuAZQT 99ljx/qRelXa8oppDb7nM5eulg7WY8ZqxEfFZphTMC5nLEGzClxuOTTl2kDYI/D/ UZmTWZDY+F5F0xvNk2gH84qVJXBOVDoobpT7hVA/tDuybobc/kvGDzRayEVqVzKj Q0tPlJs+xBZpkK5TVnxaFLJVOM+p1Xosxy3kNVXmuYNBvT/R89UbJiCrUKqKZF+L z/1mOYUv8UklHqYAeuJSptHvqJjTGa/fsEYP7dAUBbc1N2eVB8mzZ4mgU5rYXbtC E6UXXiWnoSRm8bmco9QmcWWoXt5UGEizHSJLz6t1R5Df/YmXhWlytll5aCwY1ksf FNoL7S4u7AZThL1Nwi7yUs4CAjhk/N4aOsk+41S0sALCx30BJuI6UdesAxJ0lu+Z fwCQYbs27y4p7mBLbkYwcQNxAxGm7PSK4yeyRIy2njiyV4qnLf8= =EsC2 -----END PGP SIGNATURE----- Merge tag 'net-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Jakub Kicinski: "Core & protocols: - Complete rework of garbage collection of AF_UNIX sockets. AF_UNIX is prone to forming reference count cycles due to fd passing functionality. New method based on Tarjan's Strongly Connected Components algorithm should be both faster and remove a lot of workarounds we accumulated over the years. - Add TCP fraglist GRO support, allowing chaining multiple TCP packets and forwarding them together. Useful for small switches / routers which lack basic checksum offload in some scenarios (e.g. PPPoE). - Support using SMP threads for handling packet backlog i.e. packet processing from software interfaces and old drivers which don't use NAPI. This helps move the processing out of the softirq jumble. - Continue work of converting from rtnl lock to RCU protection. Don't require rtnl lock when reading: IPv6 routing FIB, IPv6 address labels, netdev threaded NAPI sysfs files, bonding driver's sysfs files, MPLS devconf, IPv4 FIB rules, netns IDs, tcp metrics, TC Qdiscs, neighbor entries, ARP entries via ioctl(SIOCGARP), a lot of the link information available via rtnetlink. - Small optimizations from Eric to UDP wake up handling, memory accounting, RPS/RFS implementation, TCP packet sizing etc. - Allow direct page recycling in the bulk API used by XDP, for +2% PPS. - Support peek with an offset on TCP sockets. - Add MPTCP APIs for querying last time packets were received/sent/acked and whether MPTCP "upgrade" succeeded on a TCP socket. - Add intra-node communication shortcut to improve SMC performance. - Add IPv6 (and IPv{4,6}-over-IPv{4,6}) support to the GTP protocol driver. - Add HSR-SAN (RedBOX) mode of operation to the HSR protocol driver. - Add reset reasons for tracing what caused a TCP reset to be sent. - Introduce direction attribute for xfrm (IPSec) states. State can be used either for input or output packet processing. Things we sprinkled into general kernel code: - Add bitmap_{read,write}(), bitmap_size(), expose BYTES_TO_BITS(). This required touch-ups and renaming of a few existing users. - Add Endian-dependent __counted_by_{le,be} annotations. - Make building selftests "quieter" by printing summaries like "CC object.o" rather than full commands with all the arguments. Netfilter: - Use GFP_KERNEL to clone elements, to deal better with OOM situations and avoid failures in the .commit step. BPF: - Add eBPF JIT for ARCv2 CPUs. - Support attaching kprobe BPF programs through kprobe_multi link in a session mode, meaning, a BPF program is attached to both function entry and return, the entry program can decide if the return program gets executed and the entry program can share u64 cookie value with return program. "Session mode" is a common use-case for tetragon and bpftrace. - Add the ability to specify and retrieve BPF cookie for raw tracepoint programs in order to ease migration from classic to raw tracepoints. - Add an internal-only BPF per-CPU instruction for resolving per-CPU memory addresses and implement support in x86, ARM64 and RISC-V JITs. This allows inlining functions which need to access per-CPU state. - Optimize x86 BPF JIT's emit_mov_imm64, and add support for various atomics in bpf_arena which can be JITed as a single x86 instruction. Support BPF arena on ARM64. - Add a new bpf_wq API for deferring events and refactor process-context bpf_timer code to keep common code where possible. - Harden the BPF verifier's and/or/xor value tracking. - Introduce crypto kfuncs to let BPF programs call kernel crypto APIs. - Support bpf_tail_call_static() helper for BPF programs with GCC 13. - Add bpf_preempt_{disable,enable}() kfuncs in order to allow a BPF program to have code sections where preemption is disabled. Driver API: - Skip software TC processing completely if all installed rules are marked as HW-only, instead of checking the HW-only flag rule by rule. - Add support for configuring PoE (Power over Ethernet), similar to the already existing support for PoDL (Power over Data Line) config. - Initial bits of a queue control API, for now allowing a single queue to be reset without disturbing packet flow to other queues. - Common (ethtool) statistics for hardware timestamping. Tests and tooling: - Remove the need to create a config file to run the net forwarding tests so that a naive "make run_tests" can exercise them. - Define a method of writing tests which require an external endpoint to communicate with (to send/receive data towards the test machine). Add a few such tests. - Create a shared code library for writing Python tests. Expose the YAML Netlink library from tools/ to the tests for easy Netlink access. - Move netfilter tests under net/, extend them, separate performance tests from correctness tests, and iron out issues found by running them "on every commit". - Refactor BPF selftests to use common network helpers. - Further work filling in YAML definitions of Netlink messages for: nftables, team driver, bonding interfaces, vlan interfaces, VF info, TC u32 mark, TC police action. - Teach Python YAML Netlink to decode attribute policies. - Extend the definition of the "indexed array" construct in the specs to cover arrays of scalars rather than just nests. - Add hyperlinks between definitions in generated Netlink docs. Drivers: - Make sure unsupported flower control flags are rejected by drivers, and make more drivers report errors directly to the application rather than dmesg (large number of driver changes from Asbjørn Sloth Tønnesen). - Ethernet high-speed NICs: - Broadcom (bnxt): - support multiple RSS contexts and steering traffic to them - support XDP metadata - make page pool allocations more NUMA aware - Intel (100G, ice, idpf): - extract datapath code common among Intel drivers into a library - use fewer resources in switchdev by sharing queues with the PF - add PFCP filter support - add Ethernet filter support - use a spinlock instead of HW lock in PTP clock ops - support 5 layer Tx scheduler topology - nVidia/Mellanox: - 800G link modes and 100G SerDes speeds - per-queue IRQ coalescing configuration - Marvell Octeon: - support offloading TC packet mark action - Ethernet NICs consumer, embedded and virtual: - stop lying about skb->truesize in USB Ethernet drivers, it messes up TCP memory calculations - Google cloud vNIC: - support changing ring size via ethtool - support ring reset using the queue control API - VirtIO net: - expose flow hash from RSS to XDP - per-queue statistics - add selftests - Synopsys (stmmac): - support controllers which require an RX clock signal from the MII bus to perform their hardware initialization - TI: - icssg_prueth: support ICSSG-based Ethernet on AM65x SR1.0 devices - icssg_prueth: add SW TX / RX Coalescing based on hrtimers - cpsw: minimal XDP support - Renesas (ravb): - support describing the MDIO bus - Realtek (r8169): - add support for RTL8168M - Microchip Sparx5: - matchall and flower actions mirred and redirect - Ethernet switches: - nVidia/Mellanox: - improve events processing performance - Marvell: - add support for MV88E6250 family internal PHYs - Microchip: - add DCB and DSCP mapping support for KSZ switches - vsc73xx: convert to PHYLINK - Realtek: - rtl8226b/rtl8221b: add C45 instances and SerDes switching - Many driver changes related to PHYLIB and PHYLINK deprecated API cleanup - Ethernet PHYs: - Add a new driver for Airoha EN8811H 2.5 Gigabit PHY. - micrel: lan8814: add support for PPS out and external timestamp trigger - WiFi: - Disable Wireless Extensions (WEXT) in all Wi-Fi 7 devices drivers. Modern devices can only be configured using nl80211. - mac80211/cfg80211 - handle color change per link for WiFi 7 Multi-Link Operation - Intel (iwlwifi): - don't support puncturing in 5 GHz - support monitor mode on passive channels - BZ-W device support - P2P with HE/EHT support - re-add support for firmware API 90 - provide channel survey information for Automatic Channel Selection - MediaTek (mt76): - mt7921 LED control - mt7925 EHT radiotap support - mt7920e PCI support - Qualcomm (ath11k): - P2P support for QCA6390, WCN6855 and QCA2066 - support hibernation - ieee80211-freq-limit Device Tree property support - Qualcomm (ath12k): - refactoring in preparation of multi-link support - suspend and hibernation support - ACPI support - debugfs support, including dfs_simulate_radar support - RealTek: - rtw88: RTL8723CS SDIO device support - rtw89: RTL8922AE Wi-Fi 7 PCI device support - rtw89: complete features of new WiFi 7 chip 8922AE including BT-coexistence and Wake-on-WLAN - rtw89: use BIOS ACPI settings to set TX power and channels - rtl8xxxu: enable Management Frame Protection (MFP) support - Bluetooth: - support for Intel BlazarI and Filmore Peak2 (BE201) - support for MediaTek MT7921S SDIO - initial support for Intel PCIe BT driver - remove HCI_AMP support" * tag 'net-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1827 commits) selftests: netfilter: fix packetdrill conntrack testcase net: gro: fix napi_gro_cb zeroed alignment Bluetooth: btintel_pcie: Refactor and code cleanup Bluetooth: btintel_pcie: Fix warning reported by sparse Bluetooth: hci_core: Fix not handling hdev->le_num_of_adv_sets=1 Bluetooth: btintel: Fix compiler warning for multi_v7_defconfig config Bluetooth: btintel_pcie: Fix compiler warnings Bluetooth: btintel_pcie: Add *setup* function to download firmware Bluetooth: btintel_pcie: Add support for PCIe transport Bluetooth: btintel: Export few static functions Bluetooth: HCI: Remove HCI_AMP support Bluetooth: L2CAP: Fix div-by-zero in l2cap_le_flowctl_init() Bluetooth: qca: Fix error code in qca_read_fw_build_info() Bluetooth: hci_conn: Use __counted_by() and avoid -Wfamnae warning Bluetooth: btintel: Add support for Filmore Peak2 (BE201) Bluetooth: btintel: Add support for BlazarI LE Create Connection command timeout increased to 20 secs dt-bindings: net: bluetooth: Add MediaTek MT7921S SDIO Bluetooth Bluetooth: compute LE flow credits based on recvbuf space Bluetooth: hci_sync: Use cmd->num_cis instead of magic number ...
This commit is contained in:
commit
1b294a1f35
@ -72,6 +72,7 @@ two flavors of JITs, the newer eBPF JIT currently supported on:
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- riscv64
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- riscv32
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- loongarch64
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- arc
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And the older cBPF JIT supported on the following archs:
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@ -5,7 +5,11 @@
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BPF Instruction Set Architecture (ISA)
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======================================
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This document specifies the BPF instruction set architecture (ISA).
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eBPF (which is no longer an acronym for anything), also commonly
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referred to as BPF, is a technology with origins in the Linux kernel
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that can run untrusted programs in a privileged context such as an
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operating system kernel. This document specifies the BPF instruction
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set architecture (ISA).
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Documentation conventions
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=========================
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@ -43,7 +47,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.
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===== =========
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For example, `u32` is a type whose valid values are all the 32-bit unsigned
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numbers and `s16` is a types whose valid values are all the 16-bit signed
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numbers and `s16` is a type whose valid values are all the 16-bit signed
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numbers.
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Functions
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@ -108,7 +112,7 @@ conformance group means it must support all instructions in that conformance
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group.
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The use of named conformance groups enables interoperability between a runtime
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that executes instructions, and tools as such compilers that generate
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that executes instructions, and tools such as compilers that generate
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instructions for the runtime. Thus, capability discovery in terms of
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conformance groups might be done manually by users or automatically by tools.
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@ -181,10 +185,13 @@ A basic instruction is encoded as follows::
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(`64-bit immediate instructions`_ reuse this field for other purposes)
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**dst_reg**
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destination register number (0-10)
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destination register number (0-10), unless otherwise specified
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(future instructions might reuse this field for other purposes)
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, except where
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otherwise specified (some arithmetic instructions reuse this field
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for other purposes)
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**imm**
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signed integer immediate value
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@ -228,10 +235,12 @@ This is depicted in the following figure::
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operation to perform, encoded as explained above
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**regs**
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The source and destination register numbers, encoded as explained above
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The source and destination register numbers (unless otherwise
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specified), encoded as explained above
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**offset**
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signed integer offset used with pointer arithmetic
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signed integer offset used with pointer arithmetic, unless
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otherwise specified
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**imm**
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signed integer immediate value
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@ -342,8 +351,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed.
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dst = dst ^ imm
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Note that most instructions have instruction offset of 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero offset.
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Note that most arithmetic instructions have 'offset' set to 0. Only three instructions
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(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.
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Division, multiplication, and modulo operations for ``ALU`` are part
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of the "divmul32" conformance group, and division, multiplication, and
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@ -365,15 +374,15 @@ Note that there are varying definitions of the signed modulo operation
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when the dividend or divisor are negative, where implementations often
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vary by language such that Python, Ruby, etc. differ from C, Go, Java,
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etc. This specification requires that signed modulo use truncated division
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(where -13 % 3 == -1) as implemented in C, Go, etc.:
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(where -13 % 3 == -1) as implemented in C, Go, etc.::
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a % n = a - n * trunc(a / n)
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The ``MOVSX`` instruction does a move operation with sign extension.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32
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bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
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32-bit operands, and zeroes the remaining upper 32 bits.
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``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
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operands into 64 bit operands. Unlike other arithmetic instructions,
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operands into 64-bit operands. Unlike other arithmetic instructions,
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``MOVSX`` is only defined for register source operands (``X``).
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The ``NEG`` instruction is only defined when the source bit is clear
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@ -411,19 +420,19 @@ conformance group.
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Examples:
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``{END, TO_LE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htole16(dst)
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dst = htole32(dst)
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dst = htole64(dst)
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``{END, TO_BE, ALU}`` with imm = 16/32/64 means::
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``{END, TO_BE, ALU}`` with 'imm' = 16/32/64 means::
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dst = htobe16(dst)
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dst = htobe32(dst)
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dst = htobe64(dst)
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``{END, TO_LE, ALU64}`` with imm = 16/32/64 means::
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``{END, TO_LE, ALU64}`` with 'imm' = 16/32/64 means::
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dst = bswap16(dst)
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dst = bswap32(dst)
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@ -438,27 +447,33 @@ otherwise identical operations, and indicates the base64 conformance
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group unless otherwise specified.
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The 'code' field encodes the operation as below:
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======== ===== ======= =============================== ===================================================
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code value src_reg description notes
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======== ===== ======= =============================== ===================================================
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JA 0x0 0x0 PC += offset {JA, K, JMP} only
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JA 0x0 0x0 PC += imm {JA, K, JMP32} only
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======== ===== ======= ================================= ===================================================
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code value src_reg description notes
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======== ===== ======= ================================= ===================================================
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JA 0x0 0x0 PC += offset {JA, K, JMP} only
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JA 0x0 0x0 PC += imm {JA, K, JMP32} only
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JEQ 0x1 any PC += offset if dst == src
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JGT 0x2 any PC += offset if dst > src unsigned
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JGE 0x3 any PC += offset if dst >= src unsigned
|
||||
JGT 0x2 any PC += offset if dst > src unsigned
|
||||
JGE 0x3 any PC += offset if dst >= src unsigned
|
||||
JSET 0x4 any PC += offset if dst & src
|
||||
JNE 0x5 any PC += offset if dst != src
|
||||
JSGT 0x6 any PC += offset if dst > src signed
|
||||
JSGE 0x7 any PC += offset if dst >= src signed
|
||||
CALL 0x8 0x0 call helper function by address {CALL, K, JMP} only, see `Helper functions`_
|
||||
CALL 0x8 0x1 call PC += imm {CALL, K, JMP} only, see `Program-local functions`_
|
||||
CALL 0x8 0x2 call helper function by BTF ID {CALL, K, JMP} only, see `Helper functions`_
|
||||
EXIT 0x9 0x0 return {CALL, K, JMP} only
|
||||
JLT 0xa any PC += offset if dst < src unsigned
|
||||
JLE 0xb any PC += offset if dst <= src unsigned
|
||||
JSLT 0xc any PC += offset if dst < src signed
|
||||
JSLE 0xd any PC += offset if dst <= src signed
|
||||
======== ===== ======= =============================== ===================================================
|
||||
JSGT 0x6 any PC += offset if dst > src signed
|
||||
JSGE 0x7 any PC += offset if dst >= src signed
|
||||
CALL 0x8 0x0 call helper function by static ID {CALL, K, JMP} only, see `Helper functions`_
|
||||
CALL 0x8 0x1 call PC += imm {CALL, K, JMP} only, see `Program-local functions`_
|
||||
CALL 0x8 0x2 call helper function by BTF ID {CALL, K, JMP} only, see `Helper functions`_
|
||||
EXIT 0x9 0x0 return {CALL, K, JMP} only
|
||||
JLT 0xa any PC += offset if dst < src unsigned
|
||||
JLE 0xb any PC += offset if dst <= src unsigned
|
||||
JSLT 0xc any PC += offset if dst < src signed
|
||||
JSLE 0xd any PC += offset if dst <= src signed
|
||||
======== ===== ======= ================================= ===================================================
|
||||
|
||||
where 'PC' denotes the program counter, and the offset to increment by
|
||||
is in units of 64-bit instructions relative to the instruction following
|
||||
the jump instruction. Thus 'PC += 1' skips execution of the next
|
||||
instruction if it's a basic instruction or results in undefined behavior
|
||||
if the next instruction is a 128-bit wide instruction.
|
||||
|
||||
The BPF program needs to store the return value into register R0 before doing an
|
||||
``EXIT``.
|
||||
@ -475,7 +490,7 @@ where 's>=' indicates a signed '>=' comparison.
|
||||
|
||||
gotol +imm
|
||||
|
||||
where 'imm' means the branch offset comes from insn 'imm' field.
|
||||
where 'imm' means the branch offset comes from the 'imm' field.
|
||||
|
||||
Note that there are two flavors of ``JA`` instructions. The
|
||||
``JMP`` class permits a 16-bit jump offset specified by the 'offset'
|
||||
@ -493,26 +508,26 @@ Helper functions
|
||||
Helper functions are a concept whereby BPF programs can call into a
|
||||
set of function calls exposed by the underlying platform.
|
||||
|
||||
Historically, each helper function was identified by an address
|
||||
encoded in the imm field. The available helper functions may differ
|
||||
for each program type, but address values are unique across all program types.
|
||||
Historically, each helper function was identified by a static ID
|
||||
encoded in the 'imm' field. The available helper functions may differ
|
||||
for each program type, but static IDs are unique across all program types.
|
||||
|
||||
Platforms that support the BPF Type Format (BTF) support identifying
|
||||
a helper function by a BTF ID encoded in the imm field, where the BTF ID
|
||||
a helper function by a BTF ID encoded in the 'imm' field, where the BTF ID
|
||||
identifies the helper name and type.
|
||||
|
||||
Program-local functions
|
||||
~~~~~~~~~~~~~~~~~~~~~~~
|
||||
Program-local functions are functions exposed by the same BPF program as the
|
||||
caller, and are referenced by offset from the call instruction, similar to
|
||||
``JA``. The offset is encoded in the imm field of the call instruction.
|
||||
A ``EXIT`` within the program-local function will return to the caller.
|
||||
``JA``. The offset is encoded in the 'imm' field of the call instruction.
|
||||
An ``EXIT`` within the program-local function will return to the caller.
|
||||
|
||||
Load and store instructions
|
||||
===========================
|
||||
|
||||
For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
|
||||
8-bit 'opcode' field is divided as::
|
||||
8-bit 'opcode' field is divided as follows::
|
||||
|
||||
+-+-+-+-+-+-+-+-+
|
||||
|mode |sz |class|
|
||||
@ -580,7 +595,7 @@ instructions that transfer data between a register and memory.
|
||||
|
||||
dst = *(signed size *) (src + offset)
|
||||
|
||||
Where size is one of: ``B``, ``H``, or ``W``, and
|
||||
Where '<size>' is one of: ``B``, ``H``, or ``W``, and
|
||||
'signed size' is one of: s8, s16, or s32.
|
||||
|
||||
Atomic operations
|
||||
@ -662,11 +677,11 @@ src_reg pseudocode imm type dst type
|
||||
======= ========================================= =========== ==============
|
||||
0x0 dst = (next_imm << 32) | imm integer integer
|
||||
0x1 dst = map_by_fd(imm) map fd map
|
||||
0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
|
||||
0x3 dst = var_addr(imm) variable id data pointer
|
||||
0x4 dst = code_addr(imm) integer code pointer
|
||||
0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data address
|
||||
0x3 dst = var_addr(imm) variable id data address
|
||||
0x4 dst = code_addr(imm) integer code address
|
||||
0x5 dst = map_by_idx(imm) map index map
|
||||
0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
|
||||
0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data address
|
||||
======= ========================================= =========== ==============
|
||||
|
||||
where
|
||||
|
@ -75,6 +75,8 @@ if major >= 3:
|
||||
"__rcu",
|
||||
"__user",
|
||||
"__force",
|
||||
"__counted_by_le",
|
||||
"__counted_by_be",
|
||||
|
||||
# include/linux/compiler_attributes.h:
|
||||
"__alias",
|
||||
|
56
Documentation/devicetree/bindings/net/airoha,en8811h.yaml
Normal file
56
Documentation/devicetree/bindings/net/airoha,en8811h.yaml
Normal file
@ -0,0 +1,56 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/airoha,en8811h.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Airoha EN8811H PHY
|
||||
|
||||
maintainers:
|
||||
- Eric Woudstra <ericwouds@gmail.com>
|
||||
|
||||
description:
|
||||
The Airoha EN8811H PHY has the ability to reverse polarity
|
||||
on the lines to and/or from the MAC. It is reversed by
|
||||
the booleans in the devicetree node of the phy.
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-phy.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ethernet-phy-id03a2.a411
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
airoha,pnswap-rx:
|
||||
type: boolean
|
||||
description:
|
||||
Reverse rx polarity of the SERDES. This is the receiving
|
||||
side of the lines from the MAC towards the EN881H.
|
||||
|
||||
airoha,pnswap-tx:
|
||||
type: boolean
|
||||
description:
|
||||
Reverse tx polarity of SERDES. This is the transmitting
|
||||
side of the lines from EN8811H towards the MAC.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id03a2.a411";
|
||||
reg = <1>;
|
||||
airoha,pnswap-rx;
|
||||
};
|
||||
};
|
@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7921s-bluetooth.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek MT7921S Bluetooth
|
||||
|
||||
maintainers:
|
||||
- Sean Wang <sean.wang@mediatek.com>
|
||||
|
||||
description:
|
||||
MT7921S is an SDIO-attached dual-radio WiFi+Bluetooth Combo chip; each
|
||||
function is its own SDIO function on a shared SDIO interface. The chip
|
||||
has two dedicated reset lines, one for each function core.
|
||||
This binding only covers the Bluetooth SDIO function, with one device
|
||||
node describing only this SDIO function.
|
||||
|
||||
allOf:
|
||||
- $ref: bluetooth-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt7921s-bluetooth
|
||||
|
||||
reg:
|
||||
const: 2
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
An active-low reset line for the Bluetooth core; on typical M.2
|
||||
key E modules this is the W_DISABLE2# pin.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
mmc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bluetooth@2 {
|
||||
compatible = "mediatek,mt7921s-bluetooth";
|
||||
reg = <2>;
|
||||
reset-gpios = <&pio 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
@ -14,20 +14,25 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
- brcm,bcm4334-bt
|
||||
- brcm,bcm43430a0-bt
|
||||
- brcm,bcm43430a1-bt
|
||||
- brcm,bcm43438-bt
|
||||
- brcm,bcm4345c5
|
||||
- brcm,bcm43540-bt
|
||||
- brcm,bcm4335a0
|
||||
- brcm,bcm4349-bt
|
||||
- cypress,cyw4373a0-bt
|
||||
- infineon,cyw55572-bt
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- infineon,cyw43439-bt
|
||||
- const: brcm,bcm4329-bt
|
||||
- enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
- brcm,bcm4334-bt
|
||||
- brcm,bcm43430a0-bt
|
||||
- brcm,bcm43430a1-bt
|
||||
- brcm,bcm43438-bt
|
||||
- brcm,bcm4345c5
|
||||
- brcm,bcm43540-bt
|
||||
- brcm,bcm4335a0
|
||||
- brcm,bcm4349-bt
|
||||
- cypress,cyw4373a0-bt
|
||||
- infineon,cyw55572-bt
|
||||
|
||||
shutdown-gpios:
|
||||
maxItems: 1
|
||||
|
@ -66,6 +66,10 @@ properties:
|
||||
Should be phandle/offset pair. The phandle to the syscon node which
|
||||
encompases the GPR register, and the offset of the GPR register.
|
||||
|
||||
nvmem-cells: true
|
||||
|
||||
nvmem-cell-names: true
|
||||
|
||||
snps,rmii_refclk_ext:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
|
@ -0,0 +1,169 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip PD692x0 Power Sourcing Equipment controller
|
||||
|
||||
maintainers:
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: pse-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- microchip,pd69200
|
||||
- microchip,pd69210
|
||||
- microchip,pd69220
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
managers:
|
||||
type: object
|
||||
description:
|
||||
List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager
|
||||
have 4 or 8 physical ports according to the chip version. No need to
|
||||
specify the SPI chip select as it is automatically detected by the
|
||||
PD692x0 PSE controller. The PSE managers have to be described from
|
||||
the lowest chip select to the greatest one, which is the detection
|
||||
behavior of the PD692x0 PSE controller. The PD692x0 support up to
|
||||
12 PSE managers which can expose up to 96 physical ports. All
|
||||
physical ports available on a manager have to be described in the
|
||||
incremental order even if they are not used.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
patternProperties:
|
||||
"^manager@0[0-9a-b]$":
|
||||
type: object
|
||||
description:
|
||||
PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical
|
||||
ports.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Incremental index of the PSE manager starting from 0, ranging
|
||||
from lowest to highest chip select, up to 11.
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^port@[0-7]$':
|
||||
type: object
|
||||
required:
|
||||
- reg
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- pse-pis
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-pse@3c {
|
||||
compatible = "microchip,pd69200";
|
||||
reg = <0x3c>;
|
||||
|
||||
managers {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
manager@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys0: port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys1: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys2: port@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phys3: port@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
manager@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys4: port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys5: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys6: port@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
phys7: port@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pse-pis {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pse_pi0: pse-pi@0 {
|
||||
reg = <0>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a", "alternative-b";
|
||||
pairsets = <&phys0>, <&phys1>;
|
||||
polarity-supported = "MDI", "S";
|
||||
vpwr-supply = <&vpwr1>;
|
||||
};
|
||||
pse_pi1: pse-pi@1 {
|
||||
reg = <1>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a";
|
||||
pairsets = <&phys2>;
|
||||
polarity-supported = "MDI";
|
||||
vpwr-supply = <&vpwr2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -13,6 +13,7 @@ description: Binding for the Power Sourcing Equipment (PSE) as defined in the
|
||||
|
||||
maintainers:
|
||||
- Oleksij Rempel <o.rempel@pengutronix.de>
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
@ -22,11 +23,105 @@ properties:
|
||||
description:
|
||||
Used to uniquely identify a PSE instance within an IC. Will be
|
||||
0 on PSE nodes with only a single output and at least 1 on nodes
|
||||
controlling several outputs.
|
||||
controlling several outputs which are not described in the pse-pis
|
||||
subnode. This property is deprecated, please use pse-pis instead.
|
||||
enum: [0, 1]
|
||||
|
||||
required:
|
||||
- "#pse-cells"
|
||||
pse-pis:
|
||||
type: object
|
||||
description:
|
||||
Overview of the PSE PIs provided by the controller.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
patternProperties:
|
||||
"^pse-pi@[0-9a-f]+$":
|
||||
type: object
|
||||
description:
|
||||
PSE PI for power delivery via pairsets, compliant with IEEE
|
||||
802.3-2022, Section 145.2.4. Each pairset comprises a positive and
|
||||
a negative VPSE pair, adhering to the pinout configurations
|
||||
detailed in the standard.
|
||||
See Documentation/networking/pse-pd/pse-pi.rst for details.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Address describing the PSE PI index.
|
||||
maxItems: 1
|
||||
|
||||
"#pse-cells":
|
||||
const: 0
|
||||
|
||||
pairset-names:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
Names of the pairsets as per IEEE 802.3-2022, Section 145.2.4.
|
||||
Each name should correspond to a phandle in the 'pairset'
|
||||
property pointing to the power supply for that pairset.
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- alternative-a
|
||||
- alternative-b
|
||||
|
||||
pairsets:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
List of phandles, each pointing to the power supply for the
|
||||
corresponding pairset named in 'pairset-names'. This property
|
||||
aligns with IEEE 802.3-2022, Section 33.2.3 and 145.2.4.
|
||||
PSE Pinout Alternatives (as per IEEE 802.3-2022 Table 145\u20133)
|
||||
|-----------|---------------|---------------|---------------|---------------|
|
||||
| Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
|
||||
| | (MDI-X) | (MDI) | (X) | (S) |
|
||||
|-----------|---------------|---------------|---------------|---------------|
|
||||
| 1 | Negative VPSE | Positive VPSE | - | - |
|
||||
| 2 | Negative VPSE | Positive VPSE | - | - |
|
||||
| 3 | Positive VPSE | Negative VPSE | - | - |
|
||||
| 4 | - | - | Negative VPSE | Positive VPSE |
|
||||
| 5 | - | - | Negative VPSE | Positive VPSE |
|
||||
| 6 | Positive VPSE | Negative VPSE | - | - |
|
||||
| 7 | - | - | Positive VPSE | Negative VPSE |
|
||||
| 8 | - | - | Positive VPSE | Negative VPSE |
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
polarity-supported:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
Polarity configuration supported by the PSE PI pairsets.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
enum:
|
||||
- MDI-X
|
||||
- MDI
|
||||
- X
|
||||
- S
|
||||
|
||||
vpwr-supply:
|
||||
description: Regulator power supply for the PSE PI.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#pse-cells"
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- "#pse-cells"
|
||||
- required:
|
||||
- pse-pis
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
|
@ -0,0 +1,95 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/pse-pd/ti,tps23881.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI TPS23881 Power Sourcing Equipment controller
|
||||
|
||||
maintainers:
|
||||
- Kory Maincent <kory.maincent@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: pse-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tps23881
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#pse-cells':
|
||||
const: 1
|
||||
|
||||
channels:
|
||||
description: each set of 8 ports can be assigned to one physical
|
||||
channels or two for PoE4. This parameter describes the configuration
|
||||
of the ports conversion matrix that establishes relationship between
|
||||
the logical ports and the physical channels.
|
||||
type: object
|
||||
|
||||
patternProperties:
|
||||
'^channel@[0-7]$':
|
||||
type: object
|
||||
required:
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-pse@20 {
|
||||
compatible = "ti,tps23881";
|
||||
reg = <0x20>;
|
||||
|
||||
channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phys0: channel@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
phys1: channel@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
phys2: channel@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
pse-pis {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pse_pi0: pse-pi@0 {
|
||||
reg = <0>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a", "alternative-b";
|
||||
pairsets = <&phys0>, <&phys1>;
|
||||
polarity-supported = "MDI", "S";
|
||||
vpwr-supply = <&vpwr1>;
|
||||
};
|
||||
|
||||
pse_pi1: pse-pi@1 {
|
||||
reg = <1>;
|
||||
#pse-cells = <0>;
|
||||
pairset-names = "alternative-a";
|
||||
pairsets = <&phys2>;
|
||||
polarity-supported = "MDI";
|
||||
vpwr-supply = <&vpwr2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -20,6 +20,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,ipq6018-mdio
|
||||
- qcom,ipq8074-mdio
|
||||
- qcom,ipq9574-mdio
|
||||
- const: qcom,ipq4019-mdio
|
||||
|
||||
"#address-cells":
|
||||
@ -76,6 +77,7 @@ allOf:
|
||||
- qcom,ipq5018-mdio
|
||||
- qcom,ipq6018-mdio
|
||||
- qcom,ipq8074-mdio
|
||||
- qcom,ipq9574-mdio
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
@ -88,10 +88,16 @@ properties:
|
||||
'#address-cells':
|
||||
description: Number of address cells for the MDIO bus.
|
||||
const: 1
|
||||
deprecated: true
|
||||
|
||||
'#size-cells':
|
||||
description: Number of size cells on the MDIO bus.
|
||||
const: 0
|
||||
deprecated: true
|
||||
|
||||
mdio:
|
||||
$ref: /schemas/net/mdio.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
renesas,no-ether-link:
|
||||
type: boolean
|
||||
@ -110,9 +116,13 @@ properties:
|
||||
tx-internal-delay-ps:
|
||||
enum: [0, 2000]
|
||||
|
||||
# In older bindings there where no mdio child-node to describe the MDIO bus
|
||||
# and the PHY. To not fail older bindings accept any node with an address. New
|
||||
# users should describe the PHY inside the mdio child-node.
|
||||
patternProperties:
|
||||
"@[0-9a-f]$":
|
||||
type: object
|
||||
deprecated: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -123,8 +133,6 @@ required:
|
||||
- resets
|
||||
- phy-mode
|
||||
- phy-handle
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-controller.yaml#
|
||||
|
@ -71,16 +71,8 @@ properties:
|
||||
enum: [0, 2000]
|
||||
default: 0
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^ethernet-phy@[0-9a-f]$":
|
||||
type: object
|
||||
$ref: ethernet-phy.yaml#
|
||||
mdio:
|
||||
$ref: /schemas/net/mdio.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
@ -94,8 +86,7 @@ required:
|
||||
- resets
|
||||
- phy-mode
|
||||
- phy-handle
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- mdio
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@ -122,14 +113,18 @@ examples:
|
||||
tx-internal-delay-ps = <2000>;
|
||||
phy-handle = <&phy3>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phy3: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
reset-post-delay-us = <4000>;
|
||||
|
||||
phy3: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
66
Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
Normal file
66
Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
Normal file
@ -0,0 +1,66 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas GMAC
|
||||
|
||||
maintainers:
|
||||
- Romain Gantois <romain.gantois@bootlin.com>
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a06g032-gmac
|
||||
- renesas,rzn1-gmac
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwmac.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a06g032-gmac
|
||||
- const: renesas,rzn1-gmac
|
||||
- const: snps,dwmac
|
||||
|
||||
pcs-handle:
|
||||
description:
|
||||
phandle pointing to a PCS sub-node compatible with
|
||||
renesas,rzn1-miic.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
ethernet@44000000 {
|
||||
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
|
||||
reg = <0x44000000 0x2000>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
|
||||
power-domains = <&sysctrl>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
snps,perfect-filter-entries = <128>;
|
||||
tx-fifo-depth = <2048>;
|
||||
rx-fifo-depth = <4096>;
|
||||
pcs-handle = <&mii_conv1>;
|
||||
phy-mode = "mii";
|
||||
};
|
||||
|
||||
...
|
@ -137,8 +137,6 @@ examples:
|
||||
assigned-clock-parents = <&ext_gmac>;
|
||||
|
||||
rockchip,grf = <&grf>;
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
clock_in_out = "input";
|
||||
tx_delay = <0x30>;
|
||||
rx_delay = <0x10>;
|
||||
};
|
||||
|
@ -242,7 +242,8 @@ properties:
|
||||
type: boolean
|
||||
description: Multicast & Broadcast Packets
|
||||
snps,priority:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 1
|
||||
description: Bitmask of the tagged frames priorities assigned to the queue
|
||||
allOf:
|
||||
- if:
|
||||
@ -327,9 +328,6 @@ properties:
|
||||
snps,tx-sched-dwrr:
|
||||
type: boolean
|
||||
description: Deficit Weighted Round Robin
|
||||
snps,tx-sched-sp:
|
||||
type: boolean
|
||||
description: Strict priority
|
||||
allOf:
|
||||
- if:
|
||||
required:
|
||||
@ -338,7 +336,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-dwrr: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-wfq
|
||||
@ -346,7 +343,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-dwrr: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-dwrr
|
||||
@ -354,15 +350,6 @@ properties:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-sp: false
|
||||
- if:
|
||||
required:
|
||||
- snps,tx-sched-sp
|
||||
then:
|
||||
properties:
|
||||
snps,tx-sched-wrr: false
|
||||
snps,tx-sched-wfq: false
|
||||
snps,tx-sched-dwrr: false
|
||||
patternProperties:
|
||||
"^queue[0-9]$":
|
||||
description: Each subnode represents a queue.
|
||||
@ -393,7 +380,8 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: max read outstanding req. limit
|
||||
snps,priority:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 1
|
||||
description:
|
||||
Bitmask of the tagged frames priorities assigned to the queue.
|
||||
When a PFC frame is received with priorities matching the bitmask,
|
||||
|
@ -30,6 +30,10 @@ properties:
|
||||
- items:
|
||||
- const: starfive,jh7110-dwmac
|
||||
- const: snps,dwmac-5.20
|
||||
- items:
|
||||
- const: starfive,jh8100-dwmac
|
||||
- const: starfive,jh7110-dwmac
|
||||
- const: snps,dwmac-5.20
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -116,11 +120,25 @@ allOf:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
resets:
|
||||
minItems: 2
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: starfive,jh8100-dwmac
|
||||
then:
|
||||
properties:
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
minItems: 2
|
||||
reset-names:
|
||||
const: stmmaceth
|
||||
else:
|
||||
properties:
|
||||
resets:
|
||||
minItems: 2
|
||||
|
||||
reset-names:
|
||||
minItems: 2
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
@ -82,6 +82,13 @@ properties:
|
||||
Should be phandle/offset pair. The phandle to the syscon node which
|
||||
encompases the glue register, and the offset of the control register
|
||||
|
||||
st,ext-phyclk:
|
||||
description:
|
||||
set this property in RMII mode when you have PHY without crystal 50MHz and want to
|
||||
select RCC clock instead of ETH_REF_CLK. OR in RGMII mode when you want to select
|
||||
RCC clock instead of ETH_CLK125.
|
||||
type: boolean
|
||||
|
||||
st,eth-clk-sel:
|
||||
description:
|
||||
set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
|
||||
|
@ -13,14 +13,12 @@ description:
|
||||
Ethernet based on the Programmable Real-Time Unit and Industrial
|
||||
Communication Subsystem.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,am642-icssg-prueth # for AM64x SoC family
|
||||
- ti,am654-icssg-prueth # for AM65x SoC family
|
||||
- ti,am642-icssg-prueth # for AM64x SoC family
|
||||
- ti,am654-icssg-prueth # for AM65x SoC family
|
||||
- ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
|
||||
|
||||
sram:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
@ -28,9 +26,11 @@ properties:
|
||||
phandle to MSMC SRAM node
|
||||
|
||||
dmas:
|
||||
maxItems: 10
|
||||
minItems: 10
|
||||
maxItems: 12
|
||||
|
||||
dma-names:
|
||||
minItems: 10
|
||||
items:
|
||||
- const: tx0-0
|
||||
- const: tx0-1
|
||||
@ -42,6 +42,8 @@ properties:
|
||||
- const: tx1-3
|
||||
- const: rx0
|
||||
- const: rx1
|
||||
- const: rxmgm0
|
||||
- const: rxmgm1
|
||||
|
||||
ti,mii-g-rt:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
@ -132,6 +134,27 @@ required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: ti,am654-sr1-icssg-prueth
|
||||
then:
|
||||
properties:
|
||||
dmas:
|
||||
minItems: 12
|
||||
dma-names:
|
||||
minItems: 12
|
||||
else:
|
||||
properties:
|
||||
dmas:
|
||||
maxItems: 10
|
||||
dma-names:
|
||||
maxItems: 10
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
@ -44,6 +44,7 @@ properties:
|
||||
- brcm,bcm4366-fmac
|
||||
- cypress,cyw4373-fmac
|
||||
- cypress,cyw43012-fmac
|
||||
- infineon,cyw43439-fmac
|
||||
- const: brcm,bcm4329-fmac
|
||||
- enum:
|
||||
- brcm,bcm4329-fmac
|
||||
|
@ -73,6 +73,12 @@ properties:
|
||||
- sky85703-11
|
||||
- sky85803
|
||||
|
||||
firmware-name:
|
||||
maxItems: 1
|
||||
description:
|
||||
If present, a board or platform specific string used to lookup firmware
|
||||
files for the device.
|
||||
|
||||
wifi-firmware:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
@ -59,6 +59,8 @@ properties:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
ieee80211-freq-limit: true
|
||||
|
||||
wifi-firmware:
|
||||
type: object
|
||||
description: |
|
||||
@ -88,6 +90,7 @@ required:
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: ieee80211.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
@ -25,7 +25,7 @@ to be disabled when executing the fragment allocation.
|
||||
The network stack uses two separate caches per CPU to handle fragment
|
||||
allocation. The netdev_alloc_cache is used by callers making use of the
|
||||
netdev_alloc_frag and __netdev_alloc_skb calls. The napi_alloc_cache is
|
||||
used by callers of the __napi_alloc_frag and __napi_alloc_skb calls. The
|
||||
used by callers of the __napi_alloc_frag and napi_alloc_skb calls. The
|
||||
main difference between these two calls is the context in which they may be
|
||||
called. The "netdev" prefixed functions are usable in any context as these
|
||||
functions will disable interrupts, while the "napi" prefixed functions are
|
||||
|
@ -158,7 +158,7 @@ properties:
|
||||
type: &attr-type
|
||||
enum: [ unused, pad, flag, binary,
|
||||
uint, sint, u8, u16, u32, u64, s32, s64,
|
||||
string, nest, array-nest, nest-type-value ]
|
||||
string, nest, indexed-array, nest-type-value ]
|
||||
doc:
|
||||
description: Documentation of the attribute.
|
||||
type: string
|
||||
|
@ -201,7 +201,7 @@ properties:
|
||||
description: The netlink attribute type
|
||||
enum: [ unused, pad, flag, binary, bitfield32,
|
||||
uint, sint, u8, u16, u32, u64, s32, s64,
|
||||
string, nest, array-nest, nest-type-value ]
|
||||
string, nest, indexed-array, nest-type-value ]
|
||||
doc:
|
||||
description: Documentation of the attribute.
|
||||
type: string
|
||||
|
@ -124,7 +124,7 @@ properties:
|
||||
type: &attr-type
|
||||
enum: [ unused, pad, flag, binary,
|
||||
uint, sint, u8, u16, u32, u64, s32, s64,
|
||||
string, nest, array-nest, nest-type-value ]
|
||||
string, nest, indexed-array, nest-type-value ]
|
||||
doc:
|
||||
description: Documentation of the attribute.
|
||||
type: string
|
||||
|
@ -222,7 +222,7 @@ properties:
|
||||
description: The netlink attribute type
|
||||
enum: [ unused, pad, flag, binary, bitfield32,
|
||||
u8, u16, u32, u64, s8, s16, s32, s64,
|
||||
string, nest, array-nest, nest-type-value,
|
||||
string, nest, indexed-array, nest-type-value,
|
||||
sub-message ]
|
||||
doc:
|
||||
description: Documentation of the attribute.
|
||||
|
@ -16,6 +16,10 @@ definitions:
|
||||
name: stringset
|
||||
type: enum
|
||||
entries: []
|
||||
-
|
||||
name: header-flags
|
||||
type: flags
|
||||
entries: [ compact-bitsets, omit-reply, stats ]
|
||||
|
||||
attribute-sets:
|
||||
-
|
||||
@ -30,6 +34,7 @@ attribute-sets:
|
||||
-
|
||||
name: flags
|
||||
type: u32
|
||||
enum: header-flags
|
||||
|
||||
-
|
||||
name: bitset-bit
|
||||
@ -559,6 +564,18 @@ attribute-sets:
|
||||
-
|
||||
name: tx-lpi-timer
|
||||
type: u32
|
||||
-
|
||||
name: ts-stat
|
||||
attributes:
|
||||
-
|
||||
name: tx-pkts
|
||||
type: uint
|
||||
-
|
||||
name: tx-lost
|
||||
type: uint
|
||||
-
|
||||
name: tx-err
|
||||
type: uint
|
||||
-
|
||||
name: tsinfo
|
||||
attributes:
|
||||
@ -581,6 +598,10 @@ attribute-sets:
|
||||
-
|
||||
name: phc-index
|
||||
type: u32
|
||||
-
|
||||
name: stats
|
||||
type: nest
|
||||
nested-attributes: ts-stat
|
||||
-
|
||||
name: cable-result
|
||||
attributes:
|
||||
@ -878,17 +899,29 @@ attribute-sets:
|
||||
type: nest
|
||||
nested-attributes: header
|
||||
-
|
||||
name: admin-state
|
||||
name: podl-pse-admin-state
|
||||
type: u32
|
||||
name-prefix: ethtool-a-podl-pse-
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: admin-control
|
||||
name: podl-pse-admin-control
|
||||
type: u32
|
||||
name-prefix: ethtool-a-podl-pse-
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: pw-d-status
|
||||
name: podl-pse-pw-d-status
|
||||
type: u32
|
||||
name-prefix: ethtool-a-podl-pse-
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: c33-pse-admin-state
|
||||
type: u32
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: c33-pse-admin-control
|
||||
type: u32
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: c33-pse-pw-d-status
|
||||
type: u32
|
||||
name-prefix: ethtool-a-
|
||||
-
|
||||
name: rss
|
||||
attributes:
|
||||
@ -1388,6 +1421,7 @@ operations:
|
||||
- tx-types
|
||||
- rx-filters
|
||||
- phc-index
|
||||
- stats
|
||||
dump: *tsinfo-get-op
|
||||
-
|
||||
name: cable-test-act
|
||||
@ -1571,9 +1605,12 @@ operations:
|
||||
reply:
|
||||
attributes: &pse
|
||||
- header
|
||||
- admin-state
|
||||
- admin-control
|
||||
- pw-d-status
|
||||
- podl-pse-admin-state
|
||||
- podl-pse-admin-control
|
||||
- podl-pse-pw-d-status
|
||||
- c33-pse-admin-state
|
||||
- c33-pse-admin-control
|
||||
- c33-pse-pw-d-status
|
||||
dump: *pse-get-op
|
||||
-
|
||||
name: pse-set
|
||||
|
@ -335,6 +335,124 @@ attribute-sets:
|
||||
Allocation failure may, or may not result in a packet drop, depending
|
||||
on driver implementation and whether system recovers quickly.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-drops
|
||||
doc: |
|
||||
Number of all packets which entered the device, but never left it,
|
||||
including but not limited to: packets dropped due to lack of buffer
|
||||
space, processing errors, explicit or implicit policies and packet
|
||||
filters.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-drop-overruns
|
||||
doc: |
|
||||
Number of packets dropped due to transient lack of resources, such as
|
||||
buffer space, host descriptors etc.
|
||||
type: uint
|
||||
-
|
||||
name: rx-csum-unnecessary
|
||||
doc: Number of packets that were marked as CHECKSUM_UNNECESSARY.
|
||||
type: uint
|
||||
-
|
||||
name: rx-csum-none
|
||||
doc: Number of packets that were not checksummed by device.
|
||||
type: uint
|
||||
-
|
||||
name: rx-csum-bad
|
||||
doc: |
|
||||
Number of packets with bad checksum. The packets are not discarded,
|
||||
but still delivered to the stack.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-gro-packets
|
||||
doc: |
|
||||
Number of packets that were coalesced from smaller packets by the device.
|
||||
Counts only packets coalesced with the HW-GRO netdevice feature,
|
||||
LRO-coalesced packets are not counted.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-gro-bytes
|
||||
doc: See `rx-hw-gro-packets`.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-gro-wire-packets
|
||||
doc: |
|
||||
Number of packets that were coalesced to bigger packetss with the HW-GRO
|
||||
netdevice feature. LRO-coalesced packets are not counted.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-gro-wire-bytes
|
||||
doc: See `rx-hw-gro-wire-packets`.
|
||||
type: uint
|
||||
-
|
||||
name: rx-hw-drop-ratelimits
|
||||
doc: |
|
||||
Number of the packets dropped by the device due to the received
|
||||
packets bitrate exceeding the device rate limit.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-drops
|
||||
doc: |
|
||||
Number of packets that arrived at the device but never left it,
|
||||
encompassing packets dropped for reasons such as processing errors, as
|
||||
well as those affected by explicitly defined policies and packet
|
||||
filtering criteria.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-drop-errors
|
||||
doc: Number of packets dropped because they were invalid or malformed.
|
||||
type: uint
|
||||
-
|
||||
name: tx-csum-none
|
||||
doc: |
|
||||
Number of packets that did not require the device to calculate the
|
||||
checksum.
|
||||
type: uint
|
||||
-
|
||||
name: tx-needs-csum
|
||||
doc: |
|
||||
Number of packets that required the device to calculate the checksum.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-gso-packets
|
||||
doc: |
|
||||
Number of packets that necessitated segmentation into smaller packets
|
||||
by the device.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-gso-bytes
|
||||
doc: See `tx-hw-gso-packets`.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-gso-wire-packets
|
||||
doc: |
|
||||
Number of wire-sized packets generated by processing
|
||||
`tx-hw-gso-packets`
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-gso-wire-bytes
|
||||
doc: See `tx-hw-gso-wire-packets`.
|
||||
type: uint
|
||||
-
|
||||
name: tx-hw-drop-ratelimits
|
||||
doc: |
|
||||
Number of the packets dropped by the device due to the transmit
|
||||
packets bitrate exceeding the device rate limit.
|
||||
type: uint
|
||||
-
|
||||
name: tx-stop
|
||||
doc: |
|
||||
Number of times driver paused accepting new tx packets
|
||||
from the stack to this queue, because the queue was full.
|
||||
Note that if BQL is supported and enabled on the device
|
||||
the networking stack will avoid queuing a lot of data at once.
|
||||
type: uint
|
||||
-
|
||||
name: tx-wake
|
||||
doc: |
|
||||
Number of times driver re-started accepting send
|
||||
requests to this queue from the stack.
|
||||
type: uint
|
||||
|
||||
operations:
|
||||
list:
|
||||
@ -486,6 +604,7 @@ operations:
|
||||
dump:
|
||||
request:
|
||||
attributes:
|
||||
- ifindex
|
||||
- scope
|
||||
reply:
|
||||
attributes:
|
||||
|
1264
Documentation/netlink/specs/nftables.yaml
Normal file
1264
Documentation/netlink/specs/nftables.yaml
Normal file
File diff suppressed because it is too large
Load Diff
@ -65,11 +65,13 @@ attribute-sets:
|
||||
type: u32
|
||||
-
|
||||
name: ops
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: op-attrs
|
||||
-
|
||||
name: mcast-groups
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: mcast-group-attrs
|
||||
-
|
||||
name: policy
|
||||
|
@ -50,7 +50,16 @@ definitions:
|
||||
name: dormant
|
||||
-
|
||||
name: echo
|
||||
|
||||
-
|
||||
name: vlan-protocols
|
||||
type: enum
|
||||
entries:
|
||||
-
|
||||
name: 8021q
|
||||
value: 33024
|
||||
-
|
||||
name: 8021ad
|
||||
value: 34984
|
||||
-
|
||||
name: rtgenmsg
|
||||
type: struct
|
||||
@ -729,7 +738,171 @@ definitions:
|
||||
-
|
||||
name: filter-mask
|
||||
type: u32
|
||||
|
||||
-
|
||||
name: ifla-vlan-flags
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: flags
|
||||
type: u32
|
||||
enum: vlan-flags
|
||||
enum-as-flags: true
|
||||
-
|
||||
name: mask
|
||||
type: u32
|
||||
display-hint: hex
|
||||
-
|
||||
name: vlan-flags
|
||||
type: flags
|
||||
entries:
|
||||
- reorder-hdr
|
||||
- gvrp
|
||||
- loose-binding
|
||||
- mvrp
|
||||
- bridge-binding
|
||||
-
|
||||
name: ifla-vlan-qos-mapping
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: from
|
||||
type: u32
|
||||
-
|
||||
name: to
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-mac
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: mac
|
||||
type: binary
|
||||
len: 32
|
||||
-
|
||||
name: ifla-vf-vlan
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: vlan
|
||||
type: u32
|
||||
-
|
||||
name: qos
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-tx-rate
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: rate
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-spoofchk
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: setting
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-link-state
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: link-state
|
||||
type: u32
|
||||
enum: ifla-vf-link-state-enum
|
||||
-
|
||||
name: ifla-vf-link-state-enum
|
||||
type: enum
|
||||
entries:
|
||||
- auto
|
||||
- enable
|
||||
- disable
|
||||
-
|
||||
name: ifla-vf-rate
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: min-tx-rate
|
||||
type: u32
|
||||
-
|
||||
name: max-tx-rate
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-rss-query-en
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: setting
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-trust
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: setting
|
||||
type: u32
|
||||
-
|
||||
name: ifla-vf-guid
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: guid
|
||||
type: u64
|
||||
-
|
||||
name: ifla-vf-vlan-info
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: vf
|
||||
type: u32
|
||||
-
|
||||
name: vlan
|
||||
type: u32
|
||||
-
|
||||
name: qos
|
||||
type: u32
|
||||
-
|
||||
name: vlan-proto
|
||||
type: u32
|
||||
-
|
||||
name: rtext-filter
|
||||
type: flags
|
||||
entries:
|
||||
- vf
|
||||
- brvlan
|
||||
- brvlan-compressed
|
||||
- skip-stats
|
||||
- mrp
|
||||
- cfm-config
|
||||
- cfm-status
|
||||
- mst
|
||||
|
||||
attribute-sets:
|
||||
-
|
||||
@ -807,7 +980,7 @@ attribute-sets:
|
||||
-
|
||||
name: vfinfo-list
|
||||
type: nest
|
||||
nested-attributes: vfinfo-attrs
|
||||
nested-attributes: vfinfo-list-attrs
|
||||
-
|
||||
name: stats64
|
||||
type: binary
|
||||
@ -833,6 +1006,8 @@ attribute-sets:
|
||||
-
|
||||
name: ext-mask
|
||||
type: u32
|
||||
enum: rtext-filter
|
||||
enum-as-flags: true
|
||||
-
|
||||
name: promiscuity
|
||||
type: u32
|
||||
@ -964,9 +1139,107 @@ attribute-sets:
|
||||
type: nest
|
||||
value: 45
|
||||
nested-attributes: mctp-attrs
|
||||
-
|
||||
name: vfinfo-list-attrs
|
||||
attributes:
|
||||
-
|
||||
name: info
|
||||
type: nest
|
||||
nested-attributes: vfinfo-attrs
|
||||
multi-attr: true
|
||||
-
|
||||
name: vfinfo-attrs
|
||||
attributes: []
|
||||
attributes:
|
||||
-
|
||||
name: mac
|
||||
type: binary
|
||||
struct: ifla-vf-mac
|
||||
-
|
||||
name: vlan
|
||||
type: binary
|
||||
struct: ifla-vf-vlan
|
||||
-
|
||||
name: tx-rate
|
||||
type: binary
|
||||
struct: ifla-vf-tx-rate
|
||||
-
|
||||
name: spoofchk
|
||||
type: binary
|
||||
struct: ifla-vf-spoofchk
|
||||
-
|
||||
name: link-state
|
||||
type: binary
|
||||
struct: ifla-vf-link-state
|
||||
-
|
||||
name: rate
|
||||
type: binary
|
||||
struct: ifla-vf-rate
|
||||
-
|
||||
name: rss-query-en
|
||||
type: binary
|
||||
struct: ifla-vf-rss-query-en
|
||||
-
|
||||
name: stats
|
||||
type: nest
|
||||
nested-attributes: vf-stats-attrs
|
||||
-
|
||||
name: trust
|
||||
type: binary
|
||||
struct: ifla-vf-trust
|
||||
-
|
||||
name: ib-node-guid
|
||||
type: binary
|
||||
struct: ifla-vf-guid
|
||||
-
|
||||
name: ib-port-guid
|
||||
type: binary
|
||||
struct: ifla-vf-guid
|
||||
-
|
||||
name: vlan-list
|
||||
type: nest
|
||||
nested-attributes: vf-vlan-attrs
|
||||
-
|
||||
name: broadcast
|
||||
type: binary
|
||||
-
|
||||
name: vf-stats-attrs
|
||||
attributes:
|
||||
-
|
||||
name: rx-packets
|
||||
type: u64
|
||||
value: 0
|
||||
-
|
||||
name: tx-packets
|
||||
type: u64
|
||||
-
|
||||
name: rx-bytes
|
||||
type: u64
|
||||
-
|
||||
name: tx-bytes
|
||||
type: u64
|
||||
-
|
||||
name: broadcast
|
||||
type: u64
|
||||
-
|
||||
name: multicast
|
||||
type: u64
|
||||
-
|
||||
name: pad
|
||||
type: pad
|
||||
-
|
||||
name: rx-dropped
|
||||
type: u64
|
||||
-
|
||||
name: tx-dropped
|
||||
type: u64
|
||||
-
|
||||
name: vf-vlan-attrs
|
||||
attributes:
|
||||
-
|
||||
name: info
|
||||
type: binary
|
||||
struct: ifla-vf-vlan-info
|
||||
multi-attr: true
|
||||
-
|
||||
name: vf-ports-attrs
|
||||
attributes: []
|
||||
@ -995,6 +1268,165 @@ attribute-sets:
|
||||
type: sub-message
|
||||
sub-message: linkinfo-member-data-msg
|
||||
selector: slave-kind
|
||||
-
|
||||
name: linkinfo-bond-attrs
|
||||
name-prefix: ifla-bond-
|
||||
attributes:
|
||||
-
|
||||
name: mode
|
||||
type: u8
|
||||
-
|
||||
name: active-slave
|
||||
type: u32
|
||||
-
|
||||
name: miimon
|
||||
type: u32
|
||||
-
|
||||
name: updelay
|
||||
type: u32
|
||||
-
|
||||
name: downdelay
|
||||
type: u32
|
||||
-
|
||||
name: use-carrier
|
||||
type: u8
|
||||
-
|
||||
name: arp-interval
|
||||
type: u32
|
||||
-
|
||||
name: arp-ip-target
|
||||
type: indexed-array
|
||||
sub-type: u32
|
||||
byte-order: big-endian
|
||||
display-hint: ipv4
|
||||
-
|
||||
name: arp-validate
|
||||
type: u32
|
||||
-
|
||||
name: arp-all-targets
|
||||
type: u32
|
||||
-
|
||||
name: primary
|
||||
type: u32
|
||||
-
|
||||
name: primary-reselect
|
||||
type: u8
|
||||
-
|
||||
name: fail-over-mac
|
||||
type: u8
|
||||
-
|
||||
name: xmit-hash-policy
|
||||
type: u8
|
||||
-
|
||||
name: resend-igmp
|
||||
type: u32
|
||||
-
|
||||
name: num-peer-notif
|
||||
type: u8
|
||||
-
|
||||
name: all-slaves-active
|
||||
type: u8
|
||||
-
|
||||
name: min-links
|
||||
type: u32
|
||||
-
|
||||
name: lp-interval
|
||||
type: u32
|
||||
-
|
||||
name: packets-per-slave
|
||||
type: u32
|
||||
-
|
||||
name: ad-lacp-rate
|
||||
type: u8
|
||||
-
|
||||
name: ad-select
|
||||
type: u8
|
||||
-
|
||||
name: ad-info
|
||||
type: nest
|
||||
nested-attributes: bond-ad-info-attrs
|
||||
-
|
||||
name: ad-actor-sys-prio
|
||||
type: u16
|
||||
-
|
||||
name: ad-user-port-key
|
||||
type: u16
|
||||
-
|
||||
name: ad-actor-system
|
||||
type: binary
|
||||
display-hint: mac
|
||||
-
|
||||
name: tlb-dynamic-lb
|
||||
type: u8
|
||||
-
|
||||
name: peer-notif-delay
|
||||
type: u32
|
||||
-
|
||||
name: ad-lacp-active
|
||||
type: u8
|
||||
-
|
||||
name: missed-max
|
||||
type: u8
|
||||
-
|
||||
name: ns-ip6-target
|
||||
type: indexed-array
|
||||
sub-type: binary
|
||||
display-hint: ipv6
|
||||
-
|
||||
name: coupled-control
|
||||
type: u8
|
||||
-
|
||||
name: bond-ad-info-attrs
|
||||
name-prefix: ifla-bond-ad-info-
|
||||
attributes:
|
||||
-
|
||||
name: aggregator
|
||||
type: u16
|
||||
-
|
||||
name: num-ports
|
||||
type: u16
|
||||
-
|
||||
name: actor-key
|
||||
type: u16
|
||||
-
|
||||
name: partner-key
|
||||
type: u16
|
||||
-
|
||||
name: partner-mac
|
||||
type: binary
|
||||
display-hint: mac
|
||||
-
|
||||
name: bond-slave-attrs
|
||||
name-prefix: ifla-bond-slave-
|
||||
attributes:
|
||||
-
|
||||
name: state
|
||||
type: u8
|
||||
-
|
||||
name: mii-status
|
||||
type: u8
|
||||
-
|
||||
name: link-failure-count
|
||||
type: u32
|
||||
-
|
||||
name: perm-hwaddr
|
||||
type: binary
|
||||
display-hint: mac
|
||||
-
|
||||
name: queue-id
|
||||
type: u16
|
||||
-
|
||||
name: ad-aggregator-id
|
||||
type: u16
|
||||
-
|
||||
name: ad-actor-oper-port-state
|
||||
type: u8
|
||||
-
|
||||
name: ad-partner-oper-port-state
|
||||
type: u16
|
||||
-
|
||||
name: prio
|
||||
type: u32
|
||||
-
|
||||
name: linkinfo-bridge-attrs
|
||||
name-prefix: ifla-br-
|
||||
@ -1513,6 +1945,39 @@ attribute-sets:
|
||||
-
|
||||
name: num-disabled-queues
|
||||
type: u32
|
||||
-
|
||||
name: linkinfo-vlan-attrs
|
||||
name-prefix: ifla-vlan-
|
||||
attributes:
|
||||
-
|
||||
name: id
|
||||
type: u16
|
||||
-
|
||||
name: flag
|
||||
type: binary
|
||||
struct: ifla-vlan-flags
|
||||
-
|
||||
name: egress-qos
|
||||
type: nest
|
||||
nested-attributes: ifla-vlan-qos
|
||||
-
|
||||
name: ingress-qos
|
||||
type: nest
|
||||
nested-attributes: ifla-vlan-qos
|
||||
-
|
||||
name: protocol
|
||||
type: u16
|
||||
enum: vlan-protocols
|
||||
byte-order: big-endian
|
||||
-
|
||||
name: ifla-vlan-qos
|
||||
name-prefix: ifla-vlan-qos
|
||||
attributes:
|
||||
-
|
||||
name: mapping
|
||||
type: binary
|
||||
multi-attr: true
|
||||
struct: ifla-vlan-qos-mapping
|
||||
-
|
||||
name: linkinfo-vrf-attrs
|
||||
name-prefix: ifla-vrf-
|
||||
@ -1623,7 +2088,8 @@ attribute-sets:
|
||||
type: binary
|
||||
-
|
||||
name: hw-s-info
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: hw-s-info-one
|
||||
-
|
||||
name: l3-stats
|
||||
@ -1648,6 +2114,9 @@ sub-messages:
|
||||
-
|
||||
name: linkinfo-data-msg
|
||||
formats:
|
||||
-
|
||||
value: bond
|
||||
attribute-set: linkinfo-bond-attrs
|
||||
-
|
||||
value: bridge
|
||||
attribute-set: linkinfo-bridge-attrs
|
||||
@ -1672,6 +2141,9 @@ sub-messages:
|
||||
-
|
||||
value: tun
|
||||
attribute-set: linkinfo-tun-attrs
|
||||
-
|
||||
value: vlan
|
||||
attribute-set: linkinfo-vlan-attrs
|
||||
-
|
||||
value: vrf
|
||||
attribute-set: linkinfo-vrf-attrs
|
||||
@ -1683,6 +2155,7 @@ sub-messages:
|
||||
attribute-set: linkinfo-brport-attrs
|
||||
-
|
||||
value: bond
|
||||
attribute-set: bond-slave-attrs
|
||||
|
||||
operations:
|
||||
enum-model: directional
|
||||
|
@ -1099,6 +1099,19 @@ definitions:
|
||||
-
|
||||
name: offmask
|
||||
type: s32
|
||||
-
|
||||
name: tc-u32-mark
|
||||
type: struct
|
||||
members:
|
||||
-
|
||||
name: val
|
||||
type: u32
|
||||
-
|
||||
name: mask
|
||||
type: u32
|
||||
-
|
||||
name: success
|
||||
type: u32
|
||||
-
|
||||
name: tc-u32-sel
|
||||
type: struct
|
||||
@ -1774,6 +1787,44 @@ attribute-sets:
|
||||
-
|
||||
name: key-ex
|
||||
type: binary
|
||||
-
|
||||
name: tc-act-police-attrs
|
||||
attributes:
|
||||
-
|
||||
name: tbf
|
||||
type: binary
|
||||
struct: tc-police
|
||||
-
|
||||
name: rate
|
||||
type: binary # TODO
|
||||
-
|
||||
name: peakrate
|
||||
type: binary # TODO
|
||||
-
|
||||
name: avrate
|
||||
type: u32
|
||||
-
|
||||
name: result
|
||||
type: u32
|
||||
-
|
||||
name: tm
|
||||
type: binary
|
||||
struct: tcf-t
|
||||
-
|
||||
name: pad
|
||||
type: pad
|
||||
-
|
||||
name: rate64
|
||||
type: u64
|
||||
-
|
||||
name: peakrate64
|
||||
type: u64
|
||||
-
|
||||
name: pktrate64
|
||||
type: u64
|
||||
-
|
||||
name: pktburst64
|
||||
type: u64
|
||||
-
|
||||
name: tc-act-simple-attrs
|
||||
attributes:
|
||||
@ -1937,7 +1988,8 @@ attribute-sets:
|
||||
nested-attributes: tc-ematch-attrs
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: police
|
||||
@ -2077,7 +2129,8 @@ attribute-sets:
|
||||
type: u32
|
||||
-
|
||||
name: tin-stats
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-cake-tin-stats-attrs
|
||||
-
|
||||
name: deficit
|
||||
@ -2297,7 +2350,8 @@ attribute-sets:
|
||||
type: string
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: key-eth-dst
|
||||
@ -2798,7 +2852,8 @@ attribute-sets:
|
||||
type: string
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: mask
|
||||
@ -2951,7 +3006,8 @@ attribute-sets:
|
||||
type: u32
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: flags
|
||||
@ -3324,7 +3380,8 @@ attribute-sets:
|
||||
nested-attributes: tc-police-attrs
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: tc-taprio-attrs
|
||||
@ -3542,7 +3599,8 @@ attribute-sets:
|
||||
nested-attributes: tc-police-attrs
|
||||
-
|
||||
name: act
|
||||
type: array-nest
|
||||
type: indexed-array
|
||||
sub-type: nest
|
||||
nested-attributes: tc-act-attrs
|
||||
-
|
||||
name: indev
|
||||
|
204
Documentation/netlink/specs/team.yaml
Normal file
204
Documentation/netlink/specs/team.yaml
Normal file
@ -0,0 +1,204 @@
|
||||
# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
|
||||
|
||||
name: team
|
||||
|
||||
protocol: genetlink-legacy
|
||||
|
||||
doc: |
|
||||
Network team device driver.
|
||||
|
||||
c-family-name: team-genl-name
|
||||
c-version-name: team-genl-version
|
||||
kernel-policy: global
|
||||
uapi-header: linux/if_team.h
|
||||
|
||||
definitions:
|
||||
-
|
||||
name: string-max-len
|
||||
type: const
|
||||
value: 32
|
||||
-
|
||||
name: genl-change-event-mc-grp-name
|
||||
type: const
|
||||
value: change_event
|
||||
|
||||
attribute-sets:
|
||||
-
|
||||
name: team
|
||||
doc:
|
||||
The team nested layout of get/set msg looks like
|
||||
[TEAM_ATTR_LIST_OPTION]
|
||||
[TEAM_ATTR_ITEM_OPTION]
|
||||
[TEAM_ATTR_OPTION_*], ...
|
||||
[TEAM_ATTR_ITEM_OPTION]
|
||||
[TEAM_ATTR_OPTION_*], ...
|
||||
...
|
||||
[TEAM_ATTR_LIST_PORT]
|
||||
[TEAM_ATTR_ITEM_PORT]
|
||||
[TEAM_ATTR_PORT_*], ...
|
||||
[TEAM_ATTR_ITEM_PORT]
|
||||
[TEAM_ATTR_PORT_*], ...
|
||||
...
|
||||
name-prefix: team-attr-
|
||||
attributes:
|
||||
-
|
||||
name: unspec
|
||||
type: unused
|
||||
value: 0
|
||||
-
|
||||
name: team-ifindex
|
||||
type: u32
|
||||
-
|
||||
name: list-option
|
||||
type: nest
|
||||
nested-attributes: item-option
|
||||
-
|
||||
name: list-port
|
||||
type: nest
|
||||
nested-attributes: item-port
|
||||
-
|
||||
name: item-option
|
||||
name-prefix: team-attr-item-
|
||||
attr-cnt-name: __team-attr-item-option-max
|
||||
attr-max-name: team-attr-item-option-max
|
||||
attributes:
|
||||
-
|
||||
name: option-unspec
|
||||
type: unused
|
||||
value: 0
|
||||
-
|
||||
name: option
|
||||
type: nest
|
||||
nested-attributes: attr-option
|
||||
-
|
||||
name: attr-option
|
||||
name-prefix: team-attr-option-
|
||||
attributes:
|
||||
-
|
||||
name: unspec
|
||||
type: unused
|
||||
value: 0
|
||||
-
|
||||
name: name
|
||||
type: string
|
||||
checks:
|
||||
max-len: string-max-len
|
||||
unterminated-ok: true
|
||||
-
|
||||
name: changed
|
||||
type: flag
|
||||
-
|
||||
name: type
|
||||
type: u8
|
||||
-
|
||||
name: data
|
||||
type: binary
|
||||
-
|
||||
name: removed
|
||||
type: flag
|
||||
-
|
||||
name: port-ifindex
|
||||
type: u32
|
||||
doc: for per-port options
|
||||
-
|
||||
name: array-index
|
||||
type: u32
|
||||
doc: for array options
|
||||
-
|
||||
name: item-port
|
||||
name-prefix: team-attr-item-
|
||||
attr-cnt-name: __team-attr-item-port-max
|
||||
attr-max-name: team-attr-item-port-max
|
||||
attributes:
|
||||
-
|
||||
name: port-unspec
|
||||
type: unused
|
||||
value: 0
|
||||
-
|
||||
name: port
|
||||
type: nest
|
||||
nested-attributes: attr-port
|
||||
-
|
||||
name: attr-port
|
||||
name-prefix: team-attr-port-
|
||||
attributes:
|
||||
-
|
||||
name: unspec
|
||||
type: unused
|
||||
value: 0
|
||||
-
|
||||
name: ifindex
|
||||
type: u32
|
||||
-
|
||||
name: changed
|
||||
type: flag
|
||||
-
|
||||
name: linkup
|
||||
type: flag
|
||||
-
|
||||
name: speed
|
||||
type: u32
|
||||
-
|
||||
name: duplex
|
||||
type: u8
|
||||
-
|
||||
name: removed
|
||||
type: flag
|
||||
|
||||
operations:
|
||||
list:
|
||||
-
|
||||
name: noop
|
||||
doc: No operation
|
||||
value: 0
|
||||
attribute-set: team
|
||||
dont-validate: [ strict ]
|
||||
|
||||
do:
|
||||
# Actually it only reply the team netlink family
|
||||
reply:
|
||||
attributes:
|
||||
- team-ifindex
|
||||
|
||||
-
|
||||
name: options-set
|
||||
doc: Set team options
|
||||
attribute-set: team
|
||||
dont-validate: [ strict ]
|
||||
flags: [ admin-perm ]
|
||||
|
||||
do:
|
||||
request: &option_attrs
|
||||
attributes:
|
||||
- team-ifindex
|
||||
- list-option
|
||||
reply: *option_attrs
|
||||
|
||||
-
|
||||
name: options-get
|
||||
doc: Get team options info
|
||||
attribute-set: team
|
||||
dont-validate: [ strict ]
|
||||
flags: [ admin-perm ]
|
||||
|
||||
do:
|
||||
request:
|
||||
attributes:
|
||||
- team-ifindex
|
||||
reply: *option_attrs
|
||||
|
||||
-
|
||||
name: port-list-get
|
||||
doc: Get team ports info
|
||||
attribute-set: team
|
||||
dont-validate: [ strict ]
|
||||
flags: [ admin-perm ]
|
||||
|
||||
do:
|
||||
request:
|
||||
attributes:
|
||||
- team-ifindex
|
||||
reply: &port_attrs
|
||||
attributes:
|
||||
- team-ifindex
|
||||
- list-port
|
@ -300,6 +300,11 @@ the software port.
|
||||
in the beginning of the queue. This is a normal condition.
|
||||
- Informative
|
||||
|
||||
* - `tx[i]_timestamps`
|
||||
- Transmitted packets that were hardware timestamped at the device's DMA
|
||||
layer.
|
||||
- Informative
|
||||
|
||||
* - `tx[i]_added_vlan_packets`
|
||||
- The number of packets sent where vlan tag insertion was offloaded to the
|
||||
hardware.
|
||||
@ -702,6 +707,12 @@ the software port.
|
||||
the device typically ensures not posting the CQE.
|
||||
- Error
|
||||
|
||||
* - `ptp_cq[i]_lost_cqe`
|
||||
- Number of times a CQE is expected to not be delivered on the PTP
|
||||
timestamping CQE by the device due to a time delta elapsing. If such a
|
||||
CQE is somehow delivered, `ptp_cq[i]_late_cqe` is incremented.
|
||||
- Error
|
||||
|
||||
.. [#ring_global] The corresponding ring and global counters do not share the
|
||||
same name (i.e. do not follow the common naming scheme).
|
||||
|
||||
|
@ -146,6 +146,11 @@ board.manufacture
|
||||
|
||||
An identifier of the company or the facility which produced the part.
|
||||
|
||||
board.part_number
|
||||
-----------------
|
||||
|
||||
Part number of the board and its components.
|
||||
|
||||
fw
|
||||
--
|
||||
|
||||
|
@ -134,6 +134,9 @@ Users may also set the IPsec crypto capability of the function using
|
||||
Users may also set the IPsec packet capability of the function using
|
||||
`devlink port function set ipsec_packet` command.
|
||||
|
||||
Users may also set the maximum IO event queues of the function
|
||||
using `devlink port function set max_io_eqs` command.
|
||||
|
||||
Function attributes
|
||||
===================
|
||||
|
||||
@ -295,6 +298,36 @@ policy is processed in software by the kernel.
|
||||
function:
|
||||
hw_addr 00:00:00:00:00:00 ipsec_packet enabled
|
||||
|
||||
Maximum IO events queues setup
|
||||
------------------------------
|
||||
When user sets maximum number of IO event queues for a SF or
|
||||
a VF, such function driver is limited to consume only enforced
|
||||
number of IO event queues.
|
||||
|
||||
IO event queues deliver events related to IO queues, including network
|
||||
device transmit and receive queues (txq and rxq) and RDMA Queue Pairs (QPs).
|
||||
For example, the number of netdevice channels and RDMA device completion
|
||||
vectors are derived from the function's IO event queues. Usually, the number
|
||||
of interrupt vectors consumed by the driver is limited by the number of IO
|
||||
event queues per device, as each of the IO event queues is connected to an
|
||||
interrupt vector.
|
||||
|
||||
- Get maximum IO event queues of the VF device::
|
||||
|
||||
$ devlink port show pci/0000:06:00.0/2
|
||||
pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
|
||||
function:
|
||||
hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 10
|
||||
|
||||
- Set maximum IO event queues of the VF device::
|
||||
|
||||
$ devlink port function set pci/0000:06:00.0/2 max_io_eqs 32
|
||||
|
||||
$ devlink port show pci/0000:06:00.0/2
|
||||
pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
|
||||
function:
|
||||
hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 32
|
||||
|
||||
Subfunction
|
||||
============
|
||||
|
||||
|
@ -23,3 +23,8 @@ The ``hns3`` driver reports the following versions
|
||||
* - ``fw``
|
||||
- running
|
||||
- Used to represent the firmware version.
|
||||
* - ``fw.scc``
|
||||
- running
|
||||
- Used to represent the Soft Congestion Control (SSC) firmware version.
|
||||
SCC is a firmware component which provides multiple RDMA congestion
|
||||
control algorithms, including DCQCN.
|
||||
|
@ -21,6 +21,53 @@ Parameters
|
||||
* - ``enable_iwarp``
|
||||
- runtime
|
||||
- mutually exclusive with ``enable_roce``
|
||||
* - ``tx_scheduling_layers``
|
||||
- permanent
|
||||
- The ice hardware uses hierarchical scheduling for Tx with a fixed
|
||||
number of layers in the scheduling tree. Each of them are decision
|
||||
points. Root node represents a port, while all the leaves represent
|
||||
the queues. This way of configuring the Tx scheduler allows features
|
||||
like DCB or devlink-rate (documented below) to configure how much
|
||||
bandwidth is given to any given queue or group of queues, enabling
|
||||
fine-grained control because scheduling parameters can be configured
|
||||
at any given layer of the tree.
|
||||
|
||||
The default 9-layer tree topology was deemed best for most workloads,
|
||||
as it gives an optimal ratio of performance to configurability. However,
|
||||
for some specific cases, this 9-layer topology might not be desired.
|
||||
One example would be sending traffic to queues that are not a multiple
|
||||
of 8. Because the maximum radix is limited to 8 in 9-layer topology,
|
||||
the 9th queue has a different parent than the rest, and it's given
|
||||
more bandwidth credits. This causes a problem when the system is
|
||||
sending traffic to 9 queues:
|
||||
|
||||
| tx_queue_0_packets: 24163396
|
||||
| tx_queue_1_packets: 24164623
|
||||
| tx_queue_2_packets: 24163188
|
||||
| tx_queue_3_packets: 24163701
|
||||
| tx_queue_4_packets: 24163683
|
||||
| tx_queue_5_packets: 24164668
|
||||
| tx_queue_6_packets: 23327200
|
||||
| tx_queue_7_packets: 24163853
|
||||
| tx_queue_8_packets: 91101417 < Too much traffic is sent from 9th
|
||||
|
||||
To address this need, you can switch to a 5-layer topology, which
|
||||
changes the maximum topology radix to 512. With this enhancement,
|
||||
the performance characteristic is equal as all queues can be assigned
|
||||
to the same parent in the tree. The obvious drawback of this solution
|
||||
is a lower configuration depth of the tree.
|
||||
|
||||
Use the ``tx_scheduling_layer`` parameter with the devlink command
|
||||
to change the transmit scheduler topology. To use 5-layer topology,
|
||||
use a value of 5. For example:
|
||||
$ devlink dev param set pci/0000:16:00.0 name tx_scheduling_layers
|
||||
value 5 cmode permanent
|
||||
Use a value of 9 to set it back to the default value.
|
||||
|
||||
You must do PCI slot powercycle for the selected topology to take effect.
|
||||
|
||||
To verify that value has been set:
|
||||
$ devlink dev param show pci/0000:16:00.0 name tx_scheduling_layers
|
||||
|
||||
Info versions
|
||||
=============
|
||||
|
@ -32,7 +32,7 @@ The ``nfp`` driver reports the following versions
|
||||
- Description
|
||||
* - ``board.id``
|
||||
- fixed
|
||||
- Part number identifying the board design
|
||||
- Identifier of the board design
|
||||
* - ``board.rev``
|
||||
- fixed
|
||||
- Revision of the board design
|
||||
@ -42,6 +42,9 @@ The ``nfp`` driver reports the following versions
|
||||
* - ``board.model``
|
||||
- fixed
|
||||
- Model name of the board design
|
||||
* - ``board.part_number``
|
||||
- fixed
|
||||
- Part number of the board and its components
|
||||
* - ``fw.bundle_id``
|
||||
- stored, running
|
||||
- Firmware bundle id
|
||||
|
@ -118,7 +118,7 @@ Keys of dns_resolver type can be read from userspace using keyctl_read() or
|
||||
Mechanism
|
||||
=========
|
||||
|
||||
The dnsresolver module registers a key type called "dns_resolver". Keys of
|
||||
The dns_resolver module registers a key type called "dns_resolver". Keys of
|
||||
this type are used to transport and cache DNS lookup results from userspace.
|
||||
|
||||
When dns_query() is invoked, it calls request_key() to search the local
|
||||
@ -152,4 +152,4 @@ Debugging
|
||||
Debugging messages can be turned on dynamically by writing a 1 into the
|
||||
following file::
|
||||
|
||||
/sys/module/dnsresolver/parameters/debug
|
||||
/sys/module/dns_resolver/parameters/debug
|
||||
|
@ -1237,12 +1237,21 @@ Kernel response contents:
|
||||
``ETHTOOL_A_TSINFO_TX_TYPES`` bitset supported Tx types
|
||||
``ETHTOOL_A_TSINFO_RX_FILTERS`` bitset supported Rx filters
|
||||
``ETHTOOL_A_TSINFO_PHC_INDEX`` u32 PTP hw clock index
|
||||
``ETHTOOL_A_TSINFO_STATS`` nested HW timestamping statistics
|
||||
===================================== ====== ==========================
|
||||
|
||||
``ETHTOOL_A_TSINFO_PHC_INDEX`` is absent if there is no associated PHC (there
|
||||
is no special value for this case). The bitset attributes are omitted if they
|
||||
would be empty (no bit set).
|
||||
|
||||
Additional hardware timestamping statistics response contents:
|
||||
|
||||
===================================== ====== ===================================
|
||||
``ETHTOOL_A_TS_STAT_TX_PKTS`` uint Packets with Tx HW timestamps
|
||||
``ETHTOOL_A_TS_STAT_TX_LOST`` uint Tx HW timestamp not arrived count
|
||||
``ETHTOOL_A_TS_STAT_TX_ERR`` uint HW error request Tx timestamp count
|
||||
===================================== ====== ===================================
|
||||
|
||||
CABLE_TEST
|
||||
==========
|
||||
|
||||
@ -1717,6 +1726,10 @@ Kernel response contents:
|
||||
PSE functions
|
||||
``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` u32 power detection status of the
|
||||
PoDL PSE.
|
||||
``ETHTOOL_A_C33_PSE_ADMIN_STATE`` u32 Operational state of the PoE
|
||||
PSE functions.
|
||||
``ETHTOOL_A_C33_PSE_PW_D_STATUS`` u32 power detection status of the
|
||||
PoE PSE.
|
||||
====================================== ====== =============================
|
||||
|
||||
When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies
|
||||
@ -1728,6 +1741,12 @@ aPoDLPSEAdminState. Possible values are:
|
||||
.. kernel-doc:: include/uapi/linux/ethtool.h
|
||||
:identifiers: ethtool_podl_pse_admin_state
|
||||
|
||||
The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_STATE`` implementing
|
||||
``IEEE 802.3-2022`` 30.9.1.1.2 aPSEAdminState.
|
||||
|
||||
.. kernel-doc:: include/uapi/linux/ethtool.h
|
||||
:identifiers: ethtool_c33_pse_admin_state
|
||||
|
||||
When set, the optional ``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` attribute identifies
|
||||
the power detection status of the PoDL PSE. The status depend on internal PSE
|
||||
state machine and automatic PD classification support. This option is
|
||||
@ -1737,6 +1756,12 @@ Possible values are:
|
||||
.. kernel-doc:: include/uapi/linux/ethtool.h
|
||||
:identifiers: ethtool_podl_pse_pw_d_status
|
||||
|
||||
The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_PW_D_STATUS`` implementing
|
||||
``IEEE 802.3-2022`` 30.9.1.1.5 aPSEPowerDetectionStatus.
|
||||
|
||||
.. kernel-doc:: include/uapi/linux/ethtool.h
|
||||
:identifiers: ethtool_c33_pse_pw_d_status
|
||||
|
||||
PSE_SET
|
||||
=======
|
||||
|
||||
@ -1747,6 +1772,7 @@ Request contents:
|
||||
====================================== ====== =============================
|
||||
``ETHTOOL_A_PSE_HEADER`` nested request header
|
||||
``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` u32 Control PoDL PSE Admin state
|
||||
``ETHTOOL_A_C33_PSE_ADMIN_CONTROL`` u32 Control PSE Admin state
|
||||
====================================== ====== =============================
|
||||
|
||||
When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is used
|
||||
@ -1754,6 +1780,9 @@ to control PoDL PSE Admin functions. This option is implementing
|
||||
``IEEE 802.3-2018`` 30.15.1.2.1 acPoDLPSEAdminControl. See
|
||||
``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` for supported values.
|
||||
|
||||
The same goes for ``ETHTOOL_A_C33_PSE_ADMIN_CONTROL`` implementing
|
||||
``IEEE 802.3-2022`` 30.9.1.2.1 acPSEAdminControl.
|
||||
|
||||
RSS_GET
|
||||
=======
|
||||
|
||||
|
@ -513,7 +513,7 @@ JIT compiler
|
||||
------------
|
||||
|
||||
The Linux kernel has a built-in BPF JIT compiler for x86_64, SPARC,
|
||||
PowerPC, ARM, ARM64, MIPS, RISC-V and s390 and can be enabled through
|
||||
PowerPC, ARM, ARM64, MIPS, RISC-V, s390, and ARC and can be enabled through
|
||||
CONFIG_BPF_JIT. The JIT compiler is transparently invoked for each
|
||||
attached filter from user space or for internal kernel users if it has
|
||||
been previously enabled by root::
|
||||
@ -650,7 +650,7 @@ before a conversion to the new layout is being done behind the scenes!
|
||||
|
||||
Currently, the classic BPF format is being used for JITing on most
|
||||
32-bit architectures, whereas x86-64, aarch64, s390x, powerpc64,
|
||||
sparc64, arm32, riscv64, riscv32, loongarch64 perform JIT compilation
|
||||
sparc64, arm32, riscv64, riscv32, loongarch64, arc perform JIT compilation
|
||||
from eBPF instruction set.
|
||||
|
||||
Testing
|
||||
|
@ -93,6 +93,7 @@ Contents:
|
||||
plip
|
||||
ppp_generic
|
||||
proc_net_tcp
|
||||
pse-pd/index
|
||||
radiotap-headers
|
||||
rds
|
||||
regulatory
|
||||
|
@ -222,11 +222,11 @@ nf_flowtable_tcp_timeout - INTEGER (seconds)
|
||||
|
||||
Control offload timeout for tcp connections.
|
||||
TCP connections may be offloaded from nf conntrack to nf flow table.
|
||||
Once aged, the connection is returned to nf conntrack with tcp pickup timeout.
|
||||
Once aged, the connection is returned to nf conntrack.
|
||||
|
||||
nf_flowtable_udp_timeout - INTEGER (seconds)
|
||||
default 30
|
||||
|
||||
Control offload timeout for udp connections.
|
||||
UDP connections may be offloaded from nf conntrack to nf flow table.
|
||||
Once aged, the connection is returned to nf conntrack with udp pickup timeout.
|
||||
Once aged, the connection is returned to nf conntrack.
|
||||
|
10
Documentation/networking/pse-pd/index.rst
Normal file
10
Documentation/networking/pse-pd/index.rst
Normal file
@ -0,0 +1,10 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
Power Sourcing Equipment (PSE) Documentation
|
||||
============================================
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
|
||||
introduction
|
||||
pse-pi
|
73
Documentation/networking/pse-pd/introduction.rst
Normal file
73
Documentation/networking/pse-pd/introduction.rst
Normal file
@ -0,0 +1,73 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
Power Sourcing Equipment (PSE) in IEEE 802.3 Standard
|
||||
=====================================================
|
||||
|
||||
Overview
|
||||
--------
|
||||
|
||||
Power Sourcing Equipment (PSE) is essential in networks for delivering power
|
||||
along with data over Ethernet cables. It usually refers to devices like
|
||||
switches and hubs that supply power to Powered Devices (PDs) such as IP
|
||||
cameras, VoIP phones, and wireless access points.
|
||||
|
||||
PSE vs. PoDL PSE
|
||||
----------------
|
||||
|
||||
PSE in the IEEE 802.3 standard generally refers to equipment that provides
|
||||
power alongside data over Ethernet cables, typically associated with Power over
|
||||
Ethernet (PoE).
|
||||
|
||||
PoDL PSE, or Power over Data Lines PSE, specifically denotes PSEs operating
|
||||
with single balanced twisted-pair PHYs, as per Clause 104 of IEEE 802.3. PoDL
|
||||
is significant in contexts like automotive and industrial controls where power
|
||||
and data delivery over a single pair is advantageous.
|
||||
|
||||
IEEE 802.3-2018 Addendums and Related Clauses
|
||||
---------------------------------------------
|
||||
|
||||
Key addenda to the IEEE 802.3-2018 standard relevant to power delivery over
|
||||
Ethernet are as follows:
|
||||
|
||||
- **802.3af (Approved in 2003-06-12)**: Known as PoE in the market, detailed in
|
||||
Clause 33, delivering up to 15.4W of power.
|
||||
- **802.3at (Approved in 2009-09-11)**: Marketed as PoE+, enhancing PoE as
|
||||
covered in Clause 33, increasing power delivery to up to 30W.
|
||||
- **802.3bt (Approved in 2018-09-27)**: Known as 4PPoE in the market, outlined
|
||||
in Clause 33. Type 3 delivers up to 60W, and Type 4 up to 100W.
|
||||
- **802.3bu (Approved in 2016-12-07)**: Formerly referred to as PoDL, detailed
|
||||
in Clause 104. Introduces Classes 0 - 9. Class 9 PoDL PSE delivers up to ~65W
|
||||
|
||||
Kernel Naming Convention Recommendations
|
||||
----------------------------------------
|
||||
|
||||
For clarity and consistency within the Linux kernel's networking subsystem, the
|
||||
following naming conventions are recommended:
|
||||
|
||||
- For general PSE (PoE) code, use "c33_pse" key words. For example:
|
||||
``enum ethtool_c33_pse_admin_state c33_admin_control;``.
|
||||
This aligns with Clause 33, encompassing various PoE forms.
|
||||
|
||||
- For PoDL PSE - specific code, use "podl_pse". For example:
|
||||
``enum ethtool_podl_pse_admin_state podl_admin_control;`` to differentiate
|
||||
PoDL PSE settings according to Clause 104.
|
||||
|
||||
Summary of Clause 33: Data Terminal Equipment (DTE) Power via Media Dependent Interface (MDI)
|
||||
---------------------------------------------------------------------------------------------
|
||||
|
||||
Clause 33 of the IEEE 802.3 standard defines the functional and electrical
|
||||
characteristics of Powered Device (PD) and Power Sourcing Equipment (PSE).
|
||||
These entities enable power delivery using the same generic cabling as for data
|
||||
transmission, integrating power with data communication for devices such as
|
||||
10BASE-T, 100BASE-TX, or 1000BASE-T.
|
||||
|
||||
Summary of Clause 104: Power over Data Lines (PoDL) of Single Balanced Twisted-Pair Ethernet
|
||||
--------------------------------------------------------------------------------------------
|
||||
|
||||
Clause 104 of the IEEE 802.3 standard delineates the functional and electrical
|
||||
characteristics of PoDL Powered Devices (PDs) and PoDL Power Sourcing Equipment
|
||||
(PSEs). These are designed for use with single balanced twisted-pair Ethernet
|
||||
Physical Layers. In this clause, 'PSE' refers specifically to PoDL PSE, and
|
||||
'PD' to PoDL PD. The key intent is to provide devices with a unified interface
|
||||
for both data and the power required to process this data over a single
|
||||
balanced twisted-pair Ethernet connection.
|
301
Documentation/networking/pse-pd/pse-pi.rst
Normal file
301
Documentation/networking/pse-pd/pse-pi.rst
Normal file
@ -0,0 +1,301 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
PSE Power Interface (PSE PI) Documentation
|
||||
==========================================
|
||||
|
||||
The Power Sourcing Equipment Power Interface (PSE PI) plays a pivotal role in
|
||||
the architecture of Power over Ethernet (PoE) systems. It is essentially a
|
||||
blueprint that outlines how one or multiple power sources are connected to the
|
||||
eight-pin modular jack, commonly known as the Ethernet RJ45 port. This
|
||||
connection scheme is crucial for enabling the delivery of power alongside data
|
||||
over Ethernet cables.
|
||||
|
||||
Documentation and Standards
|
||||
---------------------------
|
||||
|
||||
The IEEE 802.3 standard provides detailed documentation on the PSE PI.
|
||||
Specifically:
|
||||
|
||||
- Section "33.2.3 PI pin assignments" covers the pin assignments for PoE
|
||||
systems that utilize two pairs for power delivery.
|
||||
- Section "145.2.4 PSE PI" addresses the configuration for PoE systems that
|
||||
deliver power over all four pairs of an Ethernet cable.
|
||||
|
||||
PSE PI and Single Pair Ethernet
|
||||
-------------------------------
|
||||
|
||||
Single Pair Ethernet (SPE) represents a different approach to Ethernet
|
||||
connectivity, utilizing just one pair of conductors for both data and power
|
||||
transmission. Unlike the configurations detailed in the PSE PI for standard
|
||||
Ethernet, which can involve multiple power sourcing arrangements across four or
|
||||
two pairs of wires, SPE operates on a simpler model due to its single-pair
|
||||
design. As a result, the complexities of choosing between alternative pin
|
||||
assignments for power delivery, as described in the PSE PI for multi-pair
|
||||
Ethernet, are not applicable to SPE.
|
||||
|
||||
Understanding PSE PI
|
||||
--------------------
|
||||
|
||||
The Power Sourcing Equipment Power Interface (PSE PI) is a framework defining
|
||||
how Power Sourcing Equipment (PSE) delivers power to Powered Devices (PDs) over
|
||||
Ethernet cables. It details two main configurations for power delivery, known
|
||||
as Alternative A and Alternative B, which are distinguished not only by their
|
||||
method of power transmission but also by the implications for polarity and data
|
||||
transmission direction.
|
||||
|
||||
Alternative A and B Overview
|
||||
----------------------------
|
||||
|
||||
- **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
|
||||
networks 10/100BaseT or 1G/2G/5G/10GBaseT, the pairs used are carrying data.
|
||||
The power delivery's polarity in this alternative can vary based on the MDI
|
||||
(Medium Dependent Interface) or MDI-X (Medium Dependent Interface Crossover)
|
||||
configuration.
|
||||
|
||||
- **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
|
||||
10/100BaseT network the pairs used are spare pairs without data and are less
|
||||
influenced by data transmission direction. This is not the case for
|
||||
1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
|
||||
different polarities, known as variant X and variant S, to accommodate
|
||||
different network requirements and device specifications.
|
||||
|
||||
Table 145-3 PSE Pinout Alternatives
|
||||
-----------------------------------
|
||||
|
||||
The following table outlines the pin configurations for both Alternative A and
|
||||
Alternative B.
|
||||
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
|
||||
| | (MDI-X) | (MDI) | (X) | (S) |
|
||||
+============+===================+=================+=================+=================+
|
||||
| 1 | Negative V | Positive V | - | - |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 2 | Negative V | Positive V | - | - |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 3 | Positive V | Negative V | - | - |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 4 | - | - | Negative V | Positive V |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 5 | - | - | Negative V | Positive V |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 6 | Positive V | Negative V | - | - |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 7 | - | - | Positive V | Negative V |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
| 8 | - | - | Positive V | Negative V |
|
||||
+------------+-------------------+-----------------+-----------------+-----------------+
|
||||
|
||||
.. note::
|
||||
- "Positive V" and "Negative V" indicate the voltage polarity for each pin.
|
||||
- "-" indicates that the pin is not used for power delivery in that
|
||||
specific configuration.
|
||||
|
||||
PSE PI compatibilities
|
||||
----------------------
|
||||
|
||||
The following table outlines the compatibility between the pinout alternative
|
||||
and the 1000/2.5G/5G/10GBaseT in the PSE 2 pairs connection.
|
||||
|
||||
+---------+---------------+---------------------+-----------------------+
|
||||
| Variant | Alternative | Power Feeding Type | Compatibility with |
|
||||
| | (A/B) | (Direct/Phantom) | 1000/2.5G/5G/10GBaseT |
|
||||
+=========+===============+=====================+=======================+
|
||||
| 1 | A | Phantom | Yes |
|
||||
+---------+---------------+---------------------+-----------------------+
|
||||
| 2 | B | Phantom | Yes |
|
||||
+---------+---------------+---------------------+-----------------------+
|
||||
| 3 | B | Direct | No |
|
||||
+---------+---------------+---------------------+-----------------------+
|
||||
|
||||
.. note::
|
||||
- "Direct" indicate a variant where the power is injected directly to pairs
|
||||
without using magnetics in case of spare pairs.
|
||||
- "Phantom" indicate power path over coils/magnetics as it is done for
|
||||
Alternative A variant.
|
||||
|
||||
In case of PSE 4 pairs, a PSE supporting only 10/100BaseT (which mean Direct
|
||||
Power on pinout Alternative B) is not compatible with a 4 pairs
|
||||
1000/2.5G/5G/10GBaseT.
|
||||
|
||||
PSE Power Interface (PSE PI) Connection Diagram
|
||||
-----------------------------------------------
|
||||
|
||||
The diagram below illustrates the connection architecture between the RJ45
|
||||
port, the Ethernet PHY (Physical Layer), and the PSE PI (Power Sourcing
|
||||
Equipment Power Interface), demonstrating how power and data are delivered
|
||||
simultaneously through an Ethernet cable. The RJ45 port serves as the physical
|
||||
interface for these connections, with each of its eight pins connected to both
|
||||
the Ethernet PHY for data transmission and the PSE PI for power delivery.
|
||||
|
||||
.. code-block::
|
||||
|
||||
+--------------------------+
|
||||
| |
|
||||
| RJ45 Port |
|
||||
| |
|
||||
+--+--+--+--+--+--+--+--+--+ +-------------+
|
||||
1| 2| 3| 4| 5| 6| 7| 8| | |
|
||||
| | | | | | | o-------------------+ |
|
||||
| | | | | | o--|-------------------+ +<--- PSE 1
|
||||
| | | | | o--|--|-------------------+ |
|
||||
| | | | o--|--|--|-------------------+ |
|
||||
| | | o--|--|--|--|-------------------+ PSE PI |
|
||||
| | o--|--|--|--|--|-------------------+ |
|
||||
| o--|--|--|--|--|--|-------------------+ +<--- PSE 2 (optional)
|
||||
o--|--|--|--|--|--|--|-------------------+ |
|
||||
| | | | | | | | | |
|
||||
+--+--+--+--+--+--+--+--+--+ +-------------+
|
||||
| |
|
||||
| Ethernet PHY |
|
||||
| |
|
||||
+--------------------------+
|
||||
|
||||
Simple PSE PI Configuration for Alternative A
|
||||
---------------------------------------------
|
||||
|
||||
The diagram below illustrates a straightforward PSE PI (Power Sourcing
|
||||
Equipment Power Interface) configuration designed to support the Alternative A
|
||||
setup for Power over Ethernet (PoE). This implementation is tailored to provide
|
||||
power delivery through the data-carrying pairs of an Ethernet cable, suitable
|
||||
for either MDI or MDI-X configurations, albeit supporting one variation at a
|
||||
time.
|
||||
|
||||
.. code-block::
|
||||
|
||||
+-------------+
|
||||
| PSE PI |
|
||||
8 -----+ +-------------+
|
||||
7 -----+ Rail 1 |
|
||||
6 -----+------+----------------------+
|
||||
5 -----+ | |
|
||||
4 -----+ | Rail 2 | PSE 1
|
||||
3 -----+------/ +------------+
|
||||
2 -----+--+-------------/ |
|
||||
1 -----+--/ +-------------+
|
||||
|
|
||||
+-------------+
|
||||
|
||||
In this configuration:
|
||||
|
||||
- Pins 1 and 2, as well as pins 3 and 6, are utilized for power delivery in
|
||||
addition to data transmission. This aligns with the standard wiring for
|
||||
10/100BaseT Ethernet networks where these pairs are used for data.
|
||||
- Rail 1 and Rail 2 represent the positive and negative voltage rails, with
|
||||
Rail 1 connected to pins 1 and 2, and Rail 2 connected to pins 3 and 6.
|
||||
More advanced PSE PI configurations may include integrated or external
|
||||
switches to change the polarity of the voltage rails, allowing for
|
||||
compatibility with both MDI and MDI-X configurations.
|
||||
|
||||
More complex PSE PI configurations may include additional components, to support
|
||||
Alternative B, or to provide additional features such as power management, or
|
||||
additional power delivery capabilities such as 2-pair or 4-pair power delivery.
|
||||
|
||||
.. code-block::
|
||||
|
||||
+-------------+
|
||||
| PSE PI |
|
||||
| +---+
|
||||
8 -----+--------+ | +-------------+
|
||||
7 -----+--------+ | Rail 1 |
|
||||
6 -----+--------+ +-----------------+
|
||||
5 -----+--------+ | |
|
||||
4 -----+--------+ | Rail 2 | PSE 1
|
||||
3 -----+--------+ +----------------+
|
||||
2 -----+--------+ | |
|
||||
1 -----+--------+ | +-------------+
|
||||
| +---+
|
||||
+-------------+
|
||||
|
||||
Device Tree Configuration: Describing PSE PI Configurations
|
||||
-----------------------------------------------------------
|
||||
|
||||
The necessity for a separate PSE PI node in the device tree is influenced by
|
||||
the intricacy of the Power over Ethernet (PoE) system's setup. Here are
|
||||
descriptions of both simple and complex PSE PI configurations to illustrate
|
||||
this decision-making process:
|
||||
|
||||
**Simple PSE PI Configuration:**
|
||||
In a straightforward scenario, the PSE PI setup involves a direct, one-to-one
|
||||
connection between a single PSE controller and an Ethernet port. This setup
|
||||
typically supports basic PoE functionality without the need for dynamic
|
||||
configuration or management of multiple power delivery modes. For such simple
|
||||
configurations, detailing the PSE PI within the existing PSE controller's node
|
||||
may suffice, as the system does not encompass additional complexity that
|
||||
warrants a separate node. The primary focus here is on the clear and direct
|
||||
association of power delivery to a specific Ethernet port.
|
||||
|
||||
**Complex PSE PI Configuration:**
|
||||
Contrastingly, a complex PSE PI setup may encompass multiple PSE controllers or
|
||||
auxiliary circuits that collectively manage power delivery to one Ethernet
|
||||
port. Such configurations might support a range of PoE standards and require
|
||||
the capability to dynamically configure power delivery based on the operational
|
||||
mode (e.g., PoE2 versus PoE4) or specific requirements of connected devices. In
|
||||
these instances, a dedicated PSE PI node becomes essential for accurately
|
||||
documenting the system architecture. This node would serve to detail the
|
||||
interactions between different PSE controllers, the support for various PoE
|
||||
modes, and any additional logic required to coordinate power delivery across
|
||||
the network infrastructure.
|
||||
|
||||
**Guidance:**
|
||||
|
||||
For simple PSE setups, including PSE PI information in the PSE controller node
|
||||
might suffice due to the straightforward nature of these systems. However,
|
||||
complex configurations, involving multiple components or advanced PoE features,
|
||||
benefit from a dedicated PSE PI node. This method adheres to IEEE 802.3
|
||||
specifications, improving documentation clarity and ensuring accurate
|
||||
representation of the PoE system's complexity.
|
||||
|
||||
PSE PI Node: Essential Information
|
||||
----------------------------------
|
||||
|
||||
The PSE PI (Power Sourcing Equipment Power Interface) node in a device tree can
|
||||
include several key pieces of information critical for defining the power
|
||||
delivery capabilities and configurations of a PoE (Power over Ethernet) system.
|
||||
Below is a list of such information, along with explanations for their
|
||||
necessity and reasons why they might not be found within a PSE controller node:
|
||||
|
||||
1. **Powered Pairs Configuration**
|
||||
|
||||
- *Description:* Identifies the pairs used for power delivery in the
|
||||
Ethernet cable.
|
||||
- *Necessity:* Essential to ensure the correct pairs are powered according
|
||||
to the board's design.
|
||||
- *PSE Controller Node:* Typically lacks details on physical pair usage,
|
||||
focusing on power regulation.
|
||||
|
||||
2. **Polarity of Powered Pairs**
|
||||
|
||||
- *Description:* Specifies the polarity (positive or negative) for each
|
||||
powered pair.
|
||||
- *Necessity:* Critical for safe and effective power transmission to PDs.
|
||||
- *PSE Controller Node:* Polarity management may exceed the standard
|
||||
functionalities of PSE controllers.
|
||||
|
||||
3. **PSE Cells Association**
|
||||
|
||||
- *Description:* Details the association of PSE cells with Ethernet ports or
|
||||
pairs in multi-cell configurations.
|
||||
- *Necessity:* Allows for optimized power resource allocation in complex
|
||||
systems.
|
||||
- *PSE Controller Node:* Controllers may not manage cell associations
|
||||
directly, focusing instead on power flow regulation.
|
||||
|
||||
4. **Support for PoE Standards**
|
||||
|
||||
- *Description:* Lists the PoE standards and configurations supported by the
|
||||
system.
|
||||
- *Necessity:* Ensures system compatibility with various PDs and adherence
|
||||
to industry standards.
|
||||
- *PSE Controller Node:* Specific capabilities may depend on the overall PSE
|
||||
PI design rather than the controller alone. Multiple PSE cells per PI
|
||||
do not necessarily imply support for multiple PoE standards.
|
||||
|
||||
5. **Protection Mechanisms**
|
||||
|
||||
- *Description:* Outlines additional protection mechanisms, such as
|
||||
overcurrent protection and thermal management.
|
||||
- *Necessity:* Provides extra safety and stability, complementing PSE
|
||||
controller protections.
|
||||
- *PSE Controller Node:* Some protections may be implemented via
|
||||
board-specific hardware or algorithms external to the controller.
|
@ -73,6 +73,9 @@ XfrmAcquireError:
|
||||
XfrmFwdHdrError:
|
||||
Forward routing of a packet is not allowed
|
||||
|
||||
XfrmInStateDirError:
|
||||
State direction mismatch (lookup found an output state on the input path, expected input or no direction)
|
||||
|
||||
Outbound errors
|
||||
~~~~~~~~~~~~~~~
|
||||
XfrmOutError:
|
||||
@ -111,3 +114,6 @@ XfrmOutPolError:
|
||||
|
||||
XfrmOutStateInvalid:
|
||||
State is invalid, perhaps expired
|
||||
|
||||
XfrmOutStateDirError:
|
||||
State direction mismatch (lookup found an input state on the output path, expected output or no direction)
|
||||
|
@ -25,7 +25,7 @@ sk_buff->head使用,或者用于skb_shared_info的 “frags” 部分。
|
||||
|
||||
网络堆栈在每个CPU使用两个独立的缓存来处理碎片分配。netdev_alloc_cache被使用
|
||||
netdev_alloc_frag和__netdev_alloc_skb调用的调用者使用。napi_alloc_cache
|
||||
被调用__napi_alloc_frag和__napi_alloc_skb的调用者使用。这两个调用的主要区别是
|
||||
被调用__napi_alloc_frag和napi_alloc_skb的调用者使用。这两个调用的主要区别是
|
||||
它们可能被调用的环境。“netdev” 前缀的函数可以在任何上下文中使用,因为这些函数
|
||||
将禁用中断,而 ”napi“ 前缀的函数只可以在softirq上下文中使用。
|
||||
|
||||
|
@ -46,10 +46,16 @@ For reference the ``multi-attr`` array may look like this::
|
||||
|
||||
where ``ARRAY-ATTR`` is the array entry type.
|
||||
|
||||
array-nest
|
||||
~~~~~~~~~~
|
||||
indexed-array
|
||||
~~~~~~~~~~~~~
|
||||
|
||||
``array-nest`` creates the following structure::
|
||||
``indexed-array`` wraps the entire array in an extra attribute (hence
|
||||
limiting its size to 64kB). The ``ENTRY`` nests are special and have the
|
||||
index of the entry as their type instead of normal attribute type.
|
||||
|
||||
A ``sub-type`` is needed to describe what type in the ``ENTRY``. A ``nest``
|
||||
``sub-type`` means there are nest arrays in the ``ENTRY``, with the structure
|
||||
looks like::
|
||||
|
||||
[SOME-OTHER-ATTR]
|
||||
[ARRAY-ATTR]
|
||||
@ -60,9 +66,13 @@ array-nest
|
||||
[MEMBER1]
|
||||
[MEMBER2]
|
||||
|
||||
It wraps the entire array in an extra attribute (hence limiting its size
|
||||
to 64kB). The ``ENTRY`` nests are special and have the index of the entry
|
||||
as their type instead of normal attribute type.
|
||||
Other ``sub-type`` like ``u32`` means there is only one member as described
|
||||
in ``sub-type`` in the ``ENTRY``. The structure looks like::
|
||||
|
||||
[SOME-OTHER-ATTR]
|
||||
[ARRAY-ATTR]
|
||||
[ENTRY u32]
|
||||
[ENTRY u32]
|
||||
|
||||
type-value
|
||||
~~~~~~~~~~
|
||||
|
52
MAINTAINERS
52
MAINTAINERS
@ -3761,6 +3761,12 @@ S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/imu/bosch,bmi323.yaml
|
||||
F: drivers/iio/imu/bmi323/
|
||||
|
||||
BPF JIT for ARC
|
||||
M: Shahab Vahedi <shahab@synopsys.com>
|
||||
L: bpf@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arc/net/
|
||||
|
||||
BPF JIT for ARM
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
M: Puranjay Mohan <puranjay@kernel.org>
|
||||
@ -3873,6 +3879,14 @@ F: kernel/bpf/tnum.c
|
||||
F: kernel/bpf/trampoline.c
|
||||
F: kernel/bpf/verifier.c
|
||||
|
||||
BPF [CRYPTO]
|
||||
M: Vadim Fedorenko <vadim.fedorenko@linux.dev>
|
||||
L: bpf@vger.kernel.org
|
||||
S: Maintained
|
||||
F: crypto/bpf_crypto_skcipher.c
|
||||
F: include/linux/bpf_crypto.h
|
||||
F: kernel/bpf/crypto.c
|
||||
|
||||
BPF [DOCUMENTATION] (Related to Standardization)
|
||||
R: David Vernet <void@manifault.com>
|
||||
L: bpf@vger.kernel.org
|
||||
@ -12451,6 +12465,26 @@ F: drivers/ata/
|
||||
F: include/linux/ata.h
|
||||
F: include/linux/libata.h
|
||||
|
||||
LIBETH COMMON ETHERNET LIBRARY
|
||||
M: Alexander Lobakin <aleksander.lobakin@intel.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: intel-wired-lan@lists.osuosl.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
T: git https://github.com/alobakin/linux.git
|
||||
F: drivers/net/ethernet/intel/libeth/
|
||||
F: include/net/libeth/
|
||||
K: libeth
|
||||
|
||||
LIBIE COMMON INTEL ETHERNET LIBRARY
|
||||
M: Alexander Lobakin <aleksander.lobakin@intel.com>
|
||||
L: intel-wired-lan@lists.osuosl.org (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
T: git https://github.com/alobakin/linux.git
|
||||
F: drivers/net/ethernet/intel/libie/
|
||||
F: include/linux/net/intel/libie/
|
||||
K: libie
|
||||
|
||||
LIBNVDIMM BTT: BLOCK TRANSLATION TABLE
|
||||
M: Vishal Verma <vishal.l.verma@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
@ -13793,6 +13827,7 @@ M: Sean Wang <sean.wang@mediatek.com>
|
||||
L: linux-bluetooth@vger.kernel.org
|
||||
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/bluetooth/mediatek,mt7921s-bluetooth.yaml
|
||||
F: Documentation/devicetree/bindings/net/mediatek-bluetooth.txt
|
||||
F: drivers/bluetooth/btmtkuart.c
|
||||
|
||||
@ -15322,6 +15357,7 @@ F: net/*/netfilter.c
|
||||
F: net/*/netfilter/
|
||||
F: net/bridge/br_netfilter*.c
|
||||
F: net/netfilter/
|
||||
F: tools/testing/selftests/net/netfilter/
|
||||
|
||||
NETROM NETWORK LAYER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
@ -17830,6 +17866,14 @@ F: include/net/psample.h
|
||||
F: include/uapi/linux/psample.h
|
||||
F: net/psample
|
||||
|
||||
PSE NETWORK DRIVER
|
||||
M: Oleksij Rempel <o.rempel@pengutronix.de>
|
||||
M: Kory Maincent <kory.maincent@bootlin.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/pse-pd/
|
||||
F: drivers/net/pse-pd/
|
||||
|
||||
PSTORE FILESYSTEM
|
||||
M: Kees Cook <keescook@chromium.org>
|
||||
R: Tony Luck <tony.luck@intel.com>
|
||||
@ -18893,6 +18937,12 @@ F: include/dt-bindings/net/pcs-rzn1-miic.h
|
||||
F: include/linux/pcs-rzn1-miic.h
|
||||
F: net/dsa/tag_rzn1_a5psw.c
|
||||
|
||||
RENESAS RZ/N1 DWMAC GLUE LAYER
|
||||
M: Romain Gantois <romain.gantois@bootlin.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
|
||||
F: drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c
|
||||
|
||||
RENESAS RZ/N1 RTC CONTROLLER DRIVER
|
||||
M: Miquel Raynal <miquel.raynal@bootlin.com>
|
||||
L: linux-rtc@vger.kernel.org
|
||||
@ -21746,6 +21796,7 @@ TEAM DRIVER
|
||||
M: Jiri Pirko <jiri@resnulli.us>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/netlink/specs/team.yaml
|
||||
F: drivers/net/team/
|
||||
F: include/linux/if_team.h
|
||||
F: include/uapi/linux/if_team.h
|
||||
@ -23527,6 +23578,7 @@ F: include/linux/virtio*.h
|
||||
F: include/linux/vringh.h
|
||||
F: include/uapi/linux/virtio_*.h
|
||||
F: tools/virtio/
|
||||
F: tools/testing/selftests/drivers/net/virtio_net/
|
||||
|
||||
VIRTIO CRYPTO DRIVER
|
||||
M: Gonglei <arei.gonglei@huawei.com>
|
||||
|
@ -1,6 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
obj-y += kernel/
|
||||
obj-y += mm/
|
||||
obj-y += net/
|
||||
|
||||
# for cleaning
|
||||
subdir- += boot
|
||||
|
@ -51,6 +51,7 @@ config ARC
|
||||
select PCI_SYSCALL if PCI
|
||||
select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32
|
||||
select TRACE_IRQFLAGS_SUPPORT
|
||||
select HAVE_EBPF_JIT if ISA_ARCV2
|
||||
|
||||
config LOCKDEP_SUPPORT
|
||||
def_bool y
|
||||
|
6
arch/arc/net/Makefile
Normal file
6
arch/arc/net/Makefile
Normal file
@ -0,0 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
ifeq ($(CONFIG_ISA_ARCV2),y)
|
||||
obj-$(CONFIG_BPF_JIT) += bpf_jit_core.o
|
||||
obj-$(CONFIG_BPF_JIT) += bpf_jit_arcv2.o
|
||||
endif
|
164
arch/arc/net/bpf_jit.h
Normal file
164
arch/arc/net/bpf_jit.h
Normal file
@ -0,0 +1,164 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* The interface that a back-end should provide to bpf_jit_core.c.
|
||||
*
|
||||
* Copyright (c) 2024 Synopsys Inc.
|
||||
* Author: Shahab Vahedi <shahab@synopsys.com>
|
||||
*/
|
||||
|
||||
#ifndef _ARC_BPF_JIT_H
|
||||
#define _ARC_BPF_JIT_H
|
||||
|
||||
#include <linux/bpf.h>
|
||||
#include <linux/filter.h>
|
||||
|
||||
/* Print debug info and assert. */
|
||||
//#define ARC_BPF_JIT_DEBUG
|
||||
|
||||
/* Determine the address type of the target. */
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
#define ARC_ADDR u32
|
||||
#endif
|
||||
|
||||
/*
|
||||
* For the translation of some BPF instructions, a temporary register
|
||||
* might be needed for some interim data.
|
||||
*/
|
||||
#define JIT_REG_TMP MAX_BPF_JIT_REG
|
||||
|
||||
/*
|
||||
* Buffer access: If buffer "b" is not NULL, advance by "n" bytes.
|
||||
*
|
||||
* This macro must be used in any place that potentially requires a
|
||||
* "buf + len". This way, we make sure that the "buf" argument for
|
||||
* the underlying "arc_*(buf, ...)" ends up as NULL instead of something
|
||||
* like "0+4" or "0+8", etc. Those "arc_*()" functions check their "buf"
|
||||
* value to decide if instructions should be emitted or not.
|
||||
*/
|
||||
#define BUF(b, n) (((b) != NULL) ? ((b) + (n)) : (b))
|
||||
|
||||
/************** Functions that the back-end must provide **************/
|
||||
/* Extension for 32-bit operations. */
|
||||
inline u8 zext(u8 *buf, u8 rd);
|
||||
/***** Moves *****/
|
||||
u8 mov_r32(u8 *buf, u8 rd, u8 rs, u8 sign_ext);
|
||||
u8 mov_r32_i32(u8 *buf, u8 reg, s32 imm);
|
||||
u8 mov_r64(u8 *buf, u8 rd, u8 rs, u8 sign_ext);
|
||||
u8 mov_r64_i32(u8 *buf, u8 reg, s32 imm);
|
||||
u8 mov_r64_i64(u8 *buf, u8 reg, u32 lo, u32 hi);
|
||||
/***** Loads and stores *****/
|
||||
u8 load_r(u8 *buf, u8 rd, u8 rs, s16 off, u8 size, bool sign_ext);
|
||||
u8 store_r(u8 *buf, u8 rd, u8 rs, s16 off, u8 size);
|
||||
u8 store_i(u8 *buf, s32 imm, u8 rd, s16 off, u8 size);
|
||||
/***** Addition *****/
|
||||
u8 add_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 add_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 add_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 add_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Subtraction *****/
|
||||
u8 sub_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 sub_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 sub_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 sub_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Multiplication *****/
|
||||
u8 mul_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 mul_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 mul_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 mul_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Division *****/
|
||||
u8 div_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext);
|
||||
u8 div_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext);
|
||||
/***** Remainder *****/
|
||||
u8 mod_r32(u8 *buf, u8 rd, u8 rs, bool sign_ext);
|
||||
u8 mod_r32_i32(u8 *buf, u8 rd, s32 imm, bool sign_ext);
|
||||
/***** Bitwise AND *****/
|
||||
u8 and_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 and_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 and_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 and_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Bitwise OR *****/
|
||||
u8 or_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 or_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 or_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 or_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Bitwise XOR *****/
|
||||
u8 xor_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 xor_r32_i32(u8 *buf, u8 rd, s32 imm);
|
||||
u8 xor_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 xor_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Bitwise Negate *****/
|
||||
u8 neg_r32(u8 *buf, u8 r);
|
||||
u8 neg_r64(u8 *buf, u8 r);
|
||||
/***** Bitwise left shift *****/
|
||||
u8 lsh_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 lsh_r32_i32(u8 *buf, u8 rd, u8 imm);
|
||||
u8 lsh_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 lsh_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Bitwise right shift (logical) *****/
|
||||
u8 rsh_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 rsh_r32_i32(u8 *buf, u8 rd, u8 imm);
|
||||
u8 rsh_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 rsh_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Bitwise right shift (arithmetic) *****/
|
||||
u8 arsh_r32(u8 *buf, u8 rd, u8 rs);
|
||||
u8 arsh_r32_i32(u8 *buf, u8 rd, u8 imm);
|
||||
u8 arsh_r64(u8 *buf, u8 rd, u8 rs);
|
||||
u8 arsh_r64_i32(u8 *buf, u8 rd, s32 imm);
|
||||
/***** Frame related *****/
|
||||
u32 mask_for_used_regs(u8 bpf_reg, bool is_call);
|
||||
u8 arc_prologue(u8 *buf, u32 usage, u16 frame_size);
|
||||
u8 arc_epilogue(u8 *buf, u32 usage, u16 frame_size);
|
||||
/***** Jumps *****/
|
||||
/*
|
||||
* Different sorts of conditions (ARC enum as opposed to BPF_*).
|
||||
*
|
||||
* Do not change the order of enums here. ARC_CC_SLE+1 is used
|
||||
* to determine the number of JCCs.
|
||||
*/
|
||||
enum ARC_CC {
|
||||
ARC_CC_UGT = 0, /* unsigned > */
|
||||
ARC_CC_UGE, /* unsigned >= */
|
||||
ARC_CC_ULT, /* unsigned < */
|
||||
ARC_CC_ULE, /* unsigned <= */
|
||||
ARC_CC_SGT, /* signed > */
|
||||
ARC_CC_SGE, /* signed >= */
|
||||
ARC_CC_SLT, /* signed < */
|
||||
ARC_CC_SLE, /* signed <= */
|
||||
ARC_CC_AL, /* always */
|
||||
ARC_CC_EQ, /* == */
|
||||
ARC_CC_NE, /* != */
|
||||
ARC_CC_SET, /* test */
|
||||
ARC_CC_LAST
|
||||
};
|
||||
|
||||
/*
|
||||
* A few notes:
|
||||
*
|
||||
* - check_jmp_*() are prerequisites before calling the gen_jmp_*().
|
||||
* They return "true" if the jump is possible and "false" otherwise.
|
||||
*
|
||||
* - The notion of "*_off" is to emphasize that these parameters are
|
||||
* merely offsets in the JIT stream and not absolute addresses. One
|
||||
* can look at them as addresses if the JIT code would start from
|
||||
* address 0x0000_0000. Nonetheless, since the buffer address for the
|
||||
* JIT is on a word-aligned address, this works and actually makes
|
||||
* things simpler (offsets are in the range of u32 which is more than
|
||||
* enough).
|
||||
*/
|
||||
bool check_jmp_32(u32 curr_off, u32 targ_off, u8 cond);
|
||||
bool check_jmp_64(u32 curr_off, u32 targ_off, u8 cond);
|
||||
u8 gen_jmp_32(u8 *buf, u8 rd, u8 rs, u8 cond, u32 c_off, u32 t_off);
|
||||
u8 gen_jmp_64(u8 *buf, u8 rd, u8 rs, u8 cond, u32 c_off, u32 t_off);
|
||||
/***** Miscellaneous *****/
|
||||
u8 gen_func_call(u8 *buf, ARC_ADDR func_addr, bool external_func);
|
||||
u8 arc_to_bpf_return(u8 *buf);
|
||||
/*
|
||||
* - Perform byte swaps on "rd" based on the "size".
|
||||
* - If "force" is set, do it unconditionally. Otherwise, consider the
|
||||
* desired "endian"ness and the host endianness.
|
||||
* - For data "size"s up to 32 bits, perform a zero-extension if asked
|
||||
* by the "do_zext" boolean.
|
||||
*/
|
||||
u8 gen_swap(u8 *buf, u8 rd, u8 size, u8 endian, bool force, bool do_zext);
|
||||
|
||||
#endif /* _ARC_BPF_JIT_H */
|
3005
arch/arc/net/bpf_jit_arcv2.c
Normal file
3005
arch/arc/net/bpf_jit_arcv2.c
Normal file
File diff suppressed because it is too large
Load Diff
1425
arch/arc/net/bpf_jit_core.c
Normal file
1425
arch/arc/net/bpf_jit_core.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -2252,28 +2252,21 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
/* If building the body of the JITed code fails somehow,
|
||||
* we fall back to the interpretation.
|
||||
*/
|
||||
if (build_body(&ctx) < 0) {
|
||||
image_ptr = NULL;
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_imms;
|
||||
}
|
||||
if (build_body(&ctx) < 0)
|
||||
goto out_free;
|
||||
build_epilogue(&ctx);
|
||||
|
||||
/* 3.) Extra pass to validate JITed Code */
|
||||
if (validate_code(&ctx)) {
|
||||
image_ptr = NULL;
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_imms;
|
||||
}
|
||||
if (validate_code(&ctx))
|
||||
goto out_free;
|
||||
flush_icache_range((u32)header, (u32)(ctx.target + ctx.idx));
|
||||
|
||||
if (bpf_jit_enable > 1)
|
||||
/* there are 2 passes here */
|
||||
bpf_jit_dump(prog->len, image_size, 2, ctx.target);
|
||||
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
if (bpf_jit_binary_lock_ro(header))
|
||||
goto out_free;
|
||||
prog->bpf_func = (void *)ctx.target;
|
||||
prog->jited = 1;
|
||||
prog->jited_len = image_size;
|
||||
@ -2290,5 +2283,11 @@ out:
|
||||
bpf_jit_prog_release_other(prog, prog == orig_prog ?
|
||||
tmp : orig_prog);
|
||||
return prog;
|
||||
|
||||
out_free:
|
||||
image_ptr = NULL;
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_imms;
|
||||
}
|
||||
|
||||
|
@ -135,6 +135,12 @@ enum aarch64_insn_special_register {
|
||||
AARCH64_INSN_SPCLREG_SP_EL2 = 0xF210
|
||||
};
|
||||
|
||||
enum aarch64_insn_system_register {
|
||||
AARCH64_INSN_SYSREG_TPIDR_EL1 = 0x4684,
|
||||
AARCH64_INSN_SYSREG_TPIDR_EL2 = 0x6682,
|
||||
AARCH64_INSN_SYSREG_SP_EL0 = 0x4208,
|
||||
};
|
||||
|
||||
enum aarch64_insn_variant {
|
||||
AARCH64_INSN_VARIANT_32BIT,
|
||||
AARCH64_INSN_VARIANT_64BIT
|
||||
@ -686,6 +692,8 @@ u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,
|
||||
}
|
||||
#endif
|
||||
u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type);
|
||||
u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,
|
||||
enum aarch64_insn_system_register sysreg);
|
||||
|
||||
s32 aarch64_get_branch_offset(u32 insn);
|
||||
u32 aarch64_set_branch_offset(u32 insn, s32 offset);
|
||||
|
@ -1515,3 +1515,14 @@ u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)
|
||||
|
||||
return insn;
|
||||
}
|
||||
|
||||
u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,
|
||||
enum aarch64_insn_system_register sysreg)
|
||||
{
|
||||
u32 insn = aarch64_insn_get_mrs_value();
|
||||
|
||||
insn &= ~GENMASK(19, 0);
|
||||
insn |= sysreg << 5;
|
||||
return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT,
|
||||
insn, result);
|
||||
}
|
||||
|
@ -297,4 +297,12 @@
|
||||
#define A64_ADR(Rd, offset) \
|
||||
aarch64_insn_gen_adr(0, offset, Rd, AARCH64_INSN_ADR_TYPE_ADR)
|
||||
|
||||
/* MRS */
|
||||
#define A64_MRS_TPIDR_EL1(Rt) \
|
||||
aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_TPIDR_EL1)
|
||||
#define A64_MRS_TPIDR_EL2(Rt) \
|
||||
aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_TPIDR_EL2)
|
||||
#define A64_MRS_SP_EL0(Rt) \
|
||||
aarch64_insn_gen_mrs(Rt, AARCH64_INSN_SYSREG_SP_EL0)
|
||||
|
||||
#endif /* _BPF_JIT_H */
|
||||
|
@ -29,6 +29,7 @@
|
||||
#define TCALL_CNT (MAX_BPF_JIT_REG + 2)
|
||||
#define TMP_REG_3 (MAX_BPF_JIT_REG + 3)
|
||||
#define FP_BOTTOM (MAX_BPF_JIT_REG + 4)
|
||||
#define ARENA_VM_START (MAX_BPF_JIT_REG + 5)
|
||||
|
||||
#define check_imm(bits, imm) do { \
|
||||
if ((((imm) > 0) && ((imm) >> (bits))) || \
|
||||
@ -67,6 +68,8 @@ static const int bpf2a64[] = {
|
||||
/* temporary register for blinding constants */
|
||||
[BPF_REG_AX] = A64_R(9),
|
||||
[FP_BOTTOM] = A64_R(27),
|
||||
/* callee saved register for kern_vm_start address */
|
||||
[ARENA_VM_START] = A64_R(28),
|
||||
};
|
||||
|
||||
struct jit_ctx {
|
||||
@ -79,6 +82,7 @@ struct jit_ctx {
|
||||
__le32 *ro_image;
|
||||
u32 stack_size;
|
||||
int fpb_offset;
|
||||
u64 user_vm_start;
|
||||
};
|
||||
|
||||
struct bpf_plt {
|
||||
@ -295,7 +299,7 @@ static bool is_lsi_offset(int offset, int scale)
|
||||
#define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8)
|
||||
|
||||
static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
|
||||
bool is_exception_cb)
|
||||
bool is_exception_cb, u64 arena_vm_start)
|
||||
{
|
||||
const struct bpf_prog *prog = ctx->prog;
|
||||
const bool is_main_prog = !bpf_is_subprog(prog);
|
||||
@ -306,6 +310,7 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
|
||||
const u8 fp = bpf2a64[BPF_REG_FP];
|
||||
const u8 tcc = bpf2a64[TCALL_CNT];
|
||||
const u8 fpb = bpf2a64[FP_BOTTOM];
|
||||
const u8 arena_vm_base = bpf2a64[ARENA_VM_START];
|
||||
const int idx0 = ctx->idx;
|
||||
int cur_offset;
|
||||
|
||||
@ -411,6 +416,10 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
|
||||
|
||||
/* Set up function call stack */
|
||||
emit(A64_SUB_I(1, A64_SP, A64_SP, ctx->stack_size), ctx);
|
||||
|
||||
if (arena_vm_start)
|
||||
emit_a64_mov_i64(arena_vm_base, arena_vm_start, ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -485,20 +494,26 @@ static int emit_bpf_tail_call(struct jit_ctx *ctx)
|
||||
static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
{
|
||||
const u8 code = insn->code;
|
||||
const u8 arena_vm_base = bpf2a64[ARENA_VM_START];
|
||||
const u8 dst = bpf2a64[insn->dst_reg];
|
||||
const u8 src = bpf2a64[insn->src_reg];
|
||||
const u8 tmp = bpf2a64[TMP_REG_1];
|
||||
const u8 tmp2 = bpf2a64[TMP_REG_2];
|
||||
const bool isdw = BPF_SIZE(code) == BPF_DW;
|
||||
const bool arena = BPF_MODE(code) == BPF_PROBE_ATOMIC;
|
||||
const s16 off = insn->off;
|
||||
u8 reg;
|
||||
u8 reg = dst;
|
||||
|
||||
if (!off) {
|
||||
reg = dst;
|
||||
} else {
|
||||
emit_a64_mov_i(1, tmp, off, ctx);
|
||||
emit(A64_ADD(1, tmp, tmp, dst), ctx);
|
||||
reg = tmp;
|
||||
if (off || arena) {
|
||||
if (off) {
|
||||
emit_a64_mov_i(1, tmp, off, ctx);
|
||||
emit(A64_ADD(1, tmp, tmp, dst), ctx);
|
||||
reg = tmp;
|
||||
}
|
||||
if (arena) {
|
||||
emit(A64_ADD(1, tmp, reg, arena_vm_base), ctx);
|
||||
reg = tmp;
|
||||
}
|
||||
}
|
||||
|
||||
switch (insn->imm) {
|
||||
@ -567,6 +582,12 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
u8 reg;
|
||||
s32 jmp_offset;
|
||||
|
||||
if (BPF_MODE(code) == BPF_PROBE_ATOMIC) {
|
||||
/* ll_sc based atomics don't support unsafe pointers yet. */
|
||||
pr_err_once("unknown atomic opcode %02x\n", code);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!off) {
|
||||
reg = dst;
|
||||
} else {
|
||||
@ -738,6 +759,7 @@ static void build_epilogue(struct jit_ctx *ctx, bool is_exception_cb)
|
||||
|
||||
#define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0)
|
||||
#define BPF_FIXUP_REG_MASK GENMASK(31, 27)
|
||||
#define DONT_CLEAR 5 /* Unused ARM64 register from BPF's POV */
|
||||
|
||||
bool ex_handler_bpf(const struct exception_table_entry *ex,
|
||||
struct pt_regs *regs)
|
||||
@ -745,7 +767,8 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,
|
||||
off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex->fixup);
|
||||
int dst_reg = FIELD_GET(BPF_FIXUP_REG_MASK, ex->fixup);
|
||||
|
||||
regs->regs[dst_reg] = 0;
|
||||
if (dst_reg != DONT_CLEAR)
|
||||
regs->regs[dst_reg] = 0;
|
||||
regs->pc = (unsigned long)&ex->fixup - offset;
|
||||
return true;
|
||||
}
|
||||
@ -765,7 +788,9 @@ static int add_exception_handler(const struct bpf_insn *insn,
|
||||
return 0;
|
||||
|
||||
if (BPF_MODE(insn->code) != BPF_PROBE_MEM &&
|
||||
BPF_MODE(insn->code) != BPF_PROBE_MEMSX)
|
||||
BPF_MODE(insn->code) != BPF_PROBE_MEMSX &&
|
||||
BPF_MODE(insn->code) != BPF_PROBE_MEM32 &&
|
||||
BPF_MODE(insn->code) != BPF_PROBE_ATOMIC)
|
||||
return 0;
|
||||
|
||||
if (!ctx->prog->aux->extable ||
|
||||
@ -810,6 +835,9 @@ static int add_exception_handler(const struct bpf_insn *insn,
|
||||
|
||||
ex->insn = ins_offset;
|
||||
|
||||
if (BPF_CLASS(insn->code) != BPF_LDX)
|
||||
dst_reg = DONT_CLEAR;
|
||||
|
||||
ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |
|
||||
FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);
|
||||
|
||||
@ -829,12 +857,13 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
|
||||
bool extra_pass)
|
||||
{
|
||||
const u8 code = insn->code;
|
||||
const u8 dst = bpf2a64[insn->dst_reg];
|
||||
const u8 src = bpf2a64[insn->src_reg];
|
||||
u8 dst = bpf2a64[insn->dst_reg];
|
||||
u8 src = bpf2a64[insn->src_reg];
|
||||
const u8 tmp = bpf2a64[TMP_REG_1];
|
||||
const u8 tmp2 = bpf2a64[TMP_REG_2];
|
||||
const u8 fp = bpf2a64[BPF_REG_FP];
|
||||
const u8 fpb = bpf2a64[FP_BOTTOM];
|
||||
const u8 arena_vm_base = bpf2a64[ARENA_VM_START];
|
||||
const s16 off = insn->off;
|
||||
const s32 imm = insn->imm;
|
||||
const int i = insn - ctx->prog->insnsi;
|
||||
@ -853,6 +882,24 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
|
||||
/* dst = src */
|
||||
case BPF_ALU | BPF_MOV | BPF_X:
|
||||
case BPF_ALU64 | BPF_MOV | BPF_X:
|
||||
if (insn_is_cast_user(insn)) {
|
||||
emit(A64_MOV(0, tmp, src), ctx); // 32-bit mov clears the upper 32 bits
|
||||
emit_a64_mov_i(0, dst, ctx->user_vm_start >> 32, ctx);
|
||||
emit(A64_LSL(1, dst, dst, 32), ctx);
|
||||
emit(A64_CBZ(1, tmp, 2), ctx);
|
||||
emit(A64_ORR(1, tmp, dst, tmp), ctx);
|
||||
emit(A64_MOV(1, dst, tmp), ctx);
|
||||
break;
|
||||
} else if (insn_is_mov_percpu_addr(insn)) {
|
||||
if (dst != src)
|
||||
emit(A64_MOV(1, dst, src), ctx);
|
||||
if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))
|
||||
emit(A64_MRS_TPIDR_EL2(tmp), ctx);
|
||||
else
|
||||
emit(A64_MRS_TPIDR_EL1(tmp), ctx);
|
||||
emit(A64_ADD(1, dst, dst, tmp), ctx);
|
||||
break;
|
||||
}
|
||||
switch (insn->off) {
|
||||
case 0:
|
||||
emit(A64_MOV(is64, dst, src), ctx);
|
||||
@ -1181,6 +1228,21 @@ emit_cond_jmp:
|
||||
const u8 r0 = bpf2a64[BPF_REG_0];
|
||||
bool func_addr_fixed;
|
||||
u64 func_addr;
|
||||
u32 cpu_offset;
|
||||
|
||||
/* Implement helper call to bpf_get_smp_processor_id() inline */
|
||||
if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
|
||||
cpu_offset = offsetof(struct thread_info, cpu);
|
||||
|
||||
emit(A64_MRS_SP_EL0(tmp), ctx);
|
||||
if (is_lsi_offset(cpu_offset, 2)) {
|
||||
emit(A64_LDR32I(r0, tmp, cpu_offset), ctx);
|
||||
} else {
|
||||
emit_a64_mov_i(1, tmp2, cpu_offset, ctx);
|
||||
emit(A64_LDR32(r0, tmp, tmp2), ctx);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
|
||||
&func_addr, &func_addr_fixed);
|
||||
@ -1237,7 +1299,15 @@ emit_cond_jmp:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
|
||||
if (ctx->fpb_offset > 0 && src == fp) {
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:
|
||||
if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
|
||||
emit(A64_ADD(1, tmp2, src, arena_vm_base), ctx);
|
||||
src = tmp2;
|
||||
}
|
||||
if (ctx->fpb_offset > 0 && src == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
|
||||
src_adj = fpb;
|
||||
off_adj = off + ctx->fpb_offset;
|
||||
} else {
|
||||
@ -1322,7 +1392,15 @@ emit_cond_jmp:
|
||||
case BPF_ST | BPF_MEM | BPF_H:
|
||||
case BPF_ST | BPF_MEM | BPF_B:
|
||||
case BPF_ST | BPF_MEM | BPF_DW:
|
||||
if (ctx->fpb_offset > 0 && dst == fp) {
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:
|
||||
if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
|
||||
emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);
|
||||
dst = tmp2;
|
||||
}
|
||||
if (ctx->fpb_offset > 0 && dst == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
|
||||
dst_adj = fpb;
|
||||
off_adj = off + ctx->fpb_offset;
|
||||
} else {
|
||||
@ -1365,6 +1443,10 @@ emit_cond_jmp:
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
ret = add_exception_handler(insn, ctx, dst);
|
||||
if (ret)
|
||||
return ret;
|
||||
break;
|
||||
|
||||
/* STX: *(size *)(dst + off) = src */
|
||||
@ -1372,7 +1454,15 @@ emit_cond_jmp:
|
||||
case BPF_STX | BPF_MEM | BPF_H:
|
||||
case BPF_STX | BPF_MEM | BPF_B:
|
||||
case BPF_STX | BPF_MEM | BPF_DW:
|
||||
if (ctx->fpb_offset > 0 && dst == fp) {
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:
|
||||
if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
|
||||
emit(A64_ADD(1, tmp2, dst, arena_vm_base), ctx);
|
||||
dst = tmp2;
|
||||
}
|
||||
if (ctx->fpb_offset > 0 && dst == fp && BPF_MODE(insn->code) != BPF_PROBE_MEM32) {
|
||||
dst_adj = fpb;
|
||||
off_adj = off + ctx->fpb_offset;
|
||||
} else {
|
||||
@ -1413,16 +1503,26 @@ emit_cond_jmp:
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
ret = add_exception_handler(insn, ctx, dst);
|
||||
if (ret)
|
||||
return ret;
|
||||
break;
|
||||
|
||||
case BPF_STX | BPF_ATOMIC | BPF_W:
|
||||
case BPF_STX | BPF_ATOMIC | BPF_DW:
|
||||
case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:
|
||||
case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:
|
||||
if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS))
|
||||
ret = emit_lse_atomic(insn, ctx);
|
||||
else
|
||||
ret = emit_ll_sc_atomic(insn, ctx);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = add_exception_handler(insn, ctx, dst);
|
||||
if (ret)
|
||||
return ret;
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -1594,6 +1694,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
bool tmp_blinded = false;
|
||||
bool extra_pass = false;
|
||||
struct jit_ctx ctx;
|
||||
u64 arena_vm_start;
|
||||
u8 *image_ptr;
|
||||
u8 *ro_image_ptr;
|
||||
|
||||
@ -1611,6 +1712,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
prog = tmp;
|
||||
}
|
||||
|
||||
arena_vm_start = bpf_arena_get_kern_vm_start(prog->aux->arena);
|
||||
jit_data = prog->aux->jit_data;
|
||||
if (!jit_data) {
|
||||
jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
|
||||
@ -1641,6 +1743,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
}
|
||||
|
||||
ctx.fpb_offset = find_fpb_offset(prog);
|
||||
ctx.user_vm_start = bpf_arena_get_user_vm_start(prog->aux->arena);
|
||||
|
||||
/*
|
||||
* 1. Initial fake pass to compute ctx->idx and ctx->offset.
|
||||
@ -1648,7 +1751,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
* BPF line info needs ctx->offset[i] to be the offset of
|
||||
* instruction[i] in jited image, so build prologue first.
|
||||
*/
|
||||
if (build_prologue(&ctx, was_classic, prog->aux->exception_cb)) {
|
||||
if (build_prologue(&ctx, was_classic, prog->aux->exception_cb,
|
||||
arena_vm_start)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
@ -1696,7 +1800,7 @@ skip_init_ctx:
|
||||
ctx.idx = 0;
|
||||
ctx.exentry_idx = 0;
|
||||
|
||||
build_prologue(&ctx, was_classic, prog->aux->exception_cb);
|
||||
build_prologue(&ctx, was_classic, prog->aux->exception_cb, arena_vm_start);
|
||||
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
prog = orig_prog;
|
||||
@ -2176,12 +2280,9 @@ void arch_free_bpf_trampoline(void *image, unsigned int size)
|
||||
bpf_prog_pack_free(image, size);
|
||||
}
|
||||
|
||||
void arch_protect_bpf_trampoline(void *image, unsigned int size)
|
||||
{
|
||||
}
|
||||
|
||||
void arch_unprotect_bpf_trampoline(void *image, unsigned int size)
|
||||
int arch_protect_bpf_trampoline(void *image, unsigned int size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,
|
||||
@ -2464,6 +2565,39 @@ bool bpf_jit_supports_exceptions(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_arena(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)
|
||||
{
|
||||
if (!in_arena)
|
||||
return true;
|
||||
switch (insn->code) {
|
||||
case BPF_STX | BPF_ATOMIC | BPF_W:
|
||||
case BPF_STX | BPF_ATOMIC | BPF_DW:
|
||||
if (!cpus_have_cap(ARM64_HAS_LSE_ATOMICS))
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_percpu_insn(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_inlines_helper_call(s32 imm)
|
||||
{
|
||||
switch (imm) {
|
||||
case BPF_FUNC_get_smp_processor_id:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
void bpf_jit_free(struct bpf_prog *prog)
|
||||
{
|
||||
if (prog->jited) {
|
||||
|
@ -1294,16 +1294,19 @@ skip_init_ctx:
|
||||
flush_icache_range((unsigned long)header, (unsigned long)(ctx.image + ctx.idx));
|
||||
|
||||
if (!prog->is_func || extra_pass) {
|
||||
int err;
|
||||
|
||||
if (extra_pass && ctx.idx != jit_data->ctx.idx) {
|
||||
pr_err_once("multi-func JIT bug %d != %d\n",
|
||||
ctx.idx, jit_data->ctx.idx);
|
||||
bpf_jit_binary_free(header);
|
||||
prog->bpf_func = NULL;
|
||||
prog->jited = 0;
|
||||
prog->jited_len = 0;
|
||||
goto out_offset;
|
||||
goto out_free;
|
||||
}
|
||||
err = bpf_jit_binary_lock_ro(header);
|
||||
if (err) {
|
||||
pr_err_once("bpf_jit_binary_lock_ro() returned %d\n",
|
||||
err);
|
||||
goto out_free;
|
||||
}
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
} else {
|
||||
jit_data->ctx = ctx;
|
||||
jit_data->image = image_ptr;
|
||||
@ -1334,6 +1337,13 @@ out:
|
||||
out_offset = -1;
|
||||
|
||||
return prog;
|
||||
|
||||
out_free:
|
||||
bpf_jit_binary_free(header);
|
||||
prog->bpf_func = NULL;
|
||||
prog->jited = 0;
|
||||
prog->jited_len = 0;
|
||||
goto out_offset;
|
||||
}
|
||||
|
||||
/* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */
|
||||
|
@ -1012,7 +1012,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
bpf_prog_fill_jited_linfo(prog, &ctx.descriptors[1]);
|
||||
|
||||
/* Set as read-only exec and flush instruction cache */
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
if (bpf_jit_binary_lock_ro(header))
|
||||
goto out_err;
|
||||
flush_icache_range((unsigned long)header,
|
||||
(unsigned long)&ctx.target[ctx.jit_index]);
|
||||
|
||||
|
@ -167,7 +167,13 @@ skip_init_ctx:
|
||||
bpf_flush_icache(jit_data->header, ctx->insns + ctx->ninsns);
|
||||
|
||||
if (!prog->is_func || extra_pass) {
|
||||
bpf_jit_binary_lock_ro(jit_data->header);
|
||||
if (bpf_jit_binary_lock_ro(jit_data->header)) {
|
||||
bpf_jit_binary_free(jit_data->header);
|
||||
prog->bpf_func = NULL;
|
||||
prog->jited = 0;
|
||||
prog->jited_len = 0;
|
||||
goto out_offset;
|
||||
}
|
||||
prologue_len = ctx->epilogue_offset - ctx->body_len;
|
||||
for (i = 0; i < prog->len; i++)
|
||||
ctx->offset[i] += prologue_len;
|
||||
|
@ -81,6 +81,8 @@ struct rv_jit_context {
|
||||
int nexentries;
|
||||
unsigned long flags;
|
||||
int stack_size;
|
||||
u64 arena_vm_start;
|
||||
u64 user_vm_start;
|
||||
};
|
||||
|
||||
/* Convert from ninsns to bytes. */
|
||||
@ -606,7 +608,7 @@ static inline u32 rv_nop(void)
|
||||
return rv_i_insn(0, 0, 0, 0, 0x13);
|
||||
}
|
||||
|
||||
/* RVC instrutions. */
|
||||
/* RVC instructions. */
|
||||
|
||||
static inline u16 rvc_addi4spn(u8 rd, u32 imm10)
|
||||
{
|
||||
@ -735,7 +737,7 @@ static inline u16 rvc_swsp(u32 imm8, u8 rs2)
|
||||
return rv_css_insn(0x6, imm, rs2, 0x2);
|
||||
}
|
||||
|
||||
/* RVZBB instrutions. */
|
||||
/* RVZBB instructions. */
|
||||
static inline u32 rvzbb_sextb(u8 rd, u8 rs1)
|
||||
{
|
||||
return rv_i_insn(0x604, rs1, 1, rd, 0x13);
|
||||
|
@ -12,12 +12,14 @@
|
||||
#include <linux/stop_machine.h>
|
||||
#include <asm/patch.h>
|
||||
#include <asm/cfi.h>
|
||||
#include <asm/percpu.h>
|
||||
#include "bpf_jit.h"
|
||||
|
||||
#define RV_FENTRY_NINSNS 2
|
||||
|
||||
#define RV_REG_TCC RV_REG_A6
|
||||
#define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */
|
||||
#define RV_REG_ARENA RV_REG_S7 /* For storing arena_vm_start */
|
||||
|
||||
static const int regmap[] = {
|
||||
[BPF_REG_0] = RV_REG_A5,
|
||||
@ -255,6 +257,10 @@ static void __build_epilogue(bool is_tail_call, struct rv_jit_context *ctx)
|
||||
emit_ld(RV_REG_S6, store_offset, RV_REG_SP, ctx);
|
||||
store_offset -= 8;
|
||||
}
|
||||
if (ctx->arena_vm_start) {
|
||||
emit_ld(RV_REG_ARENA, store_offset, RV_REG_SP, ctx);
|
||||
store_offset -= 8;
|
||||
}
|
||||
|
||||
emit_addi(RV_REG_SP, RV_REG_SP, stack_adjust, ctx);
|
||||
/* Set return value. */
|
||||
@ -498,33 +504,33 @@ static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,
|
||||
break;
|
||||
/* src_reg = atomic_fetch_<op>(dst_reg + off16, src_reg) */
|
||||
case BPF_ADD | BPF_FETCH:
|
||||
emit(is64 ? rv_amoadd_d(rs, rs, rd, 0, 0) :
|
||||
rv_amoadd_w(rs, rs, rd, 0, 0), ctx);
|
||||
emit(is64 ? rv_amoadd_d(rs, rs, rd, 1, 1) :
|
||||
rv_amoadd_w(rs, rs, rd, 1, 1), ctx);
|
||||
if (!is64)
|
||||
emit_zextw(rs, rs, ctx);
|
||||
break;
|
||||
case BPF_AND | BPF_FETCH:
|
||||
emit(is64 ? rv_amoand_d(rs, rs, rd, 0, 0) :
|
||||
rv_amoand_w(rs, rs, rd, 0, 0), ctx);
|
||||
emit(is64 ? rv_amoand_d(rs, rs, rd, 1, 1) :
|
||||
rv_amoand_w(rs, rs, rd, 1, 1), ctx);
|
||||
if (!is64)
|
||||
emit_zextw(rs, rs, ctx);
|
||||
break;
|
||||
case BPF_OR | BPF_FETCH:
|
||||
emit(is64 ? rv_amoor_d(rs, rs, rd, 0, 0) :
|
||||
rv_amoor_w(rs, rs, rd, 0, 0), ctx);
|
||||
emit(is64 ? rv_amoor_d(rs, rs, rd, 1, 1) :
|
||||
rv_amoor_w(rs, rs, rd, 1, 1), ctx);
|
||||
if (!is64)
|
||||
emit_zextw(rs, rs, ctx);
|
||||
break;
|
||||
case BPF_XOR | BPF_FETCH:
|
||||
emit(is64 ? rv_amoxor_d(rs, rs, rd, 0, 0) :
|
||||
rv_amoxor_w(rs, rs, rd, 0, 0), ctx);
|
||||
emit(is64 ? rv_amoxor_d(rs, rs, rd, 1, 1) :
|
||||
rv_amoxor_w(rs, rs, rd, 1, 1), ctx);
|
||||
if (!is64)
|
||||
emit_zextw(rs, rs, ctx);
|
||||
break;
|
||||
/* src_reg = atomic_xchg(dst_reg + off16, src_reg); */
|
||||
case BPF_XCHG:
|
||||
emit(is64 ? rv_amoswap_d(rs, rs, rd, 0, 0) :
|
||||
rv_amoswap_w(rs, rs, rd, 0, 0), ctx);
|
||||
emit(is64 ? rv_amoswap_d(rs, rs, rd, 1, 1) :
|
||||
rv_amoswap_w(rs, rs, rd, 1, 1), ctx);
|
||||
if (!is64)
|
||||
emit_zextw(rs, rs, ctx);
|
||||
break;
|
||||
@ -548,6 +554,7 @@ static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,
|
||||
|
||||
#define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0)
|
||||
#define BPF_FIXUP_REG_MASK GENMASK(31, 27)
|
||||
#define REG_DONT_CLEAR_MARKER 0 /* RV_REG_ZERO unused in pt_regmap */
|
||||
|
||||
bool ex_handler_bpf(const struct exception_table_entry *ex,
|
||||
struct pt_regs *regs)
|
||||
@ -555,7 +562,8 @@ bool ex_handler_bpf(const struct exception_table_entry *ex,
|
||||
off_t offset = FIELD_GET(BPF_FIXUP_OFFSET_MASK, ex->fixup);
|
||||
int regs_offset = FIELD_GET(BPF_FIXUP_REG_MASK, ex->fixup);
|
||||
|
||||
*(unsigned long *)((void *)regs + pt_regmap[regs_offset]) = 0;
|
||||
if (regs_offset != REG_DONT_CLEAR_MARKER)
|
||||
*(unsigned long *)((void *)regs + pt_regmap[regs_offset]) = 0;
|
||||
regs->epc = (unsigned long)&ex->fixup - offset;
|
||||
|
||||
return true;
|
||||
@ -572,7 +580,8 @@ static int add_exception_handler(const struct bpf_insn *insn,
|
||||
off_t fixup_offset;
|
||||
|
||||
if (!ctx->insns || !ctx->ro_insns || !ctx->prog->aux->extable ||
|
||||
(BPF_MODE(insn->code) != BPF_PROBE_MEM && BPF_MODE(insn->code) != BPF_PROBE_MEMSX))
|
||||
(BPF_MODE(insn->code) != BPF_PROBE_MEM && BPF_MODE(insn->code) != BPF_PROBE_MEMSX &&
|
||||
BPF_MODE(insn->code) != BPF_PROBE_MEM32))
|
||||
return 0;
|
||||
|
||||
if (WARN_ON_ONCE(ctx->nexentries >= ctx->prog->aux->num_exentries))
|
||||
@ -1073,6 +1082,33 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
/* dst = src */
|
||||
case BPF_ALU | BPF_MOV | BPF_X:
|
||||
case BPF_ALU64 | BPF_MOV | BPF_X:
|
||||
if (insn_is_cast_user(insn)) {
|
||||
emit_mv(RV_REG_T1, rs, ctx);
|
||||
emit_zextw(RV_REG_T1, RV_REG_T1, ctx);
|
||||
emit_imm(rd, (ctx->user_vm_start >> 32) << 32, ctx);
|
||||
emit(rv_beq(RV_REG_T1, RV_REG_ZERO, 4), ctx);
|
||||
emit_or(RV_REG_T1, rd, RV_REG_T1, ctx);
|
||||
emit_mv(rd, RV_REG_T1, ctx);
|
||||
break;
|
||||
} else if (insn_is_mov_percpu_addr(insn)) {
|
||||
if (rd != rs)
|
||||
emit_mv(rd, rs, ctx);
|
||||
#ifdef CONFIG_SMP
|
||||
/* Load current CPU number in T1 */
|
||||
emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
|
||||
RV_REG_TP, ctx);
|
||||
/* << 3 because offsets are 8 bytes */
|
||||
emit_slli(RV_REG_T1, RV_REG_T1, 3, ctx);
|
||||
/* Load address of __per_cpu_offset array in T2 */
|
||||
emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
|
||||
/* Add offset of current CPU to __per_cpu_offset */
|
||||
emit_add(RV_REG_T1, RV_REG_T2, RV_REG_T1, ctx);
|
||||
/* Load __per_cpu_offset[cpu] in T1 */
|
||||
emit_ld(RV_REG_T1, 0, RV_REG_T1, ctx);
|
||||
/* Add the offset to Rd */
|
||||
emit_add(rd, rd, RV_REG_T1, ctx);
|
||||
#endif
|
||||
}
|
||||
if (imm == 1) {
|
||||
/* Special mov32 for zext */
|
||||
emit_zextw(rd, rd, ctx);
|
||||
@ -1457,6 +1493,22 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
bool fixed_addr;
|
||||
u64 addr;
|
||||
|
||||
/* Inline calls to bpf_get_smp_processor_id()
|
||||
*
|
||||
* RV_REG_TP holds the address of the current CPU's task_struct and thread_info is
|
||||
* at offset 0 in task_struct.
|
||||
* Load cpu from thread_info:
|
||||
* Set R0 to ((struct thread_info *)(RV_REG_TP))->cpu
|
||||
*
|
||||
* This replicates the implementation of raw_smp_processor_id() on RISCV
|
||||
*/
|
||||
if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
|
||||
/* Load current CPU number in R0 */
|
||||
emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
|
||||
RV_REG_TP, ctx);
|
||||
break;
|
||||
}
|
||||
|
||||
mark_call(ctx);
|
||||
ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
|
||||
&addr, &fixed_addr);
|
||||
@ -1539,6 +1591,11 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
|
||||
/* LDX | PROBE_MEM32: dst = *(unsigned size *)(src + RV_REG_ARENA + off) */
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:
|
||||
{
|
||||
int insn_len, insns_start;
|
||||
bool sign_ext;
|
||||
@ -1546,6 +1603,11 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
sign_ext = BPF_MODE(insn->code) == BPF_MEMSX ||
|
||||
BPF_MODE(insn->code) == BPF_PROBE_MEMSX;
|
||||
|
||||
if (BPF_MODE(insn->code) == BPF_PROBE_MEM32) {
|
||||
emit_add(RV_REG_T2, rs, RV_REG_ARENA, ctx);
|
||||
rs = RV_REG_T2;
|
||||
}
|
||||
|
||||
switch (BPF_SIZE(code)) {
|
||||
case BPF_B:
|
||||
if (is_12b_int(off)) {
|
||||
@ -1682,6 +1744,86 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
emit_sd(RV_REG_T2, 0, RV_REG_T1, ctx);
|
||||
break;
|
||||
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_ST | BPF_PROBE_MEM32 | BPF_DW:
|
||||
{
|
||||
int insn_len, insns_start;
|
||||
|
||||
emit_add(RV_REG_T3, rd, RV_REG_ARENA, ctx);
|
||||
rd = RV_REG_T3;
|
||||
|
||||
/* Load imm to a register then store it */
|
||||
emit_imm(RV_REG_T1, imm, ctx);
|
||||
|
||||
switch (BPF_SIZE(code)) {
|
||||
case BPF_B:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sb(rd, off, RV_REG_T1), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T2, off, ctx);
|
||||
emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sb(RV_REG_T2, 0, RV_REG_T1), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_H:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sh(rd, off, RV_REG_T1), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T2, off, ctx);
|
||||
emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sh(RV_REG_T2, 0, RV_REG_T1), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_W:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sw(rd, off, RV_REG_T1, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T2, off, ctx);
|
||||
emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sw(RV_REG_T2, 0, RV_REG_T1, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_DW:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sd(rd, off, RV_REG_T1, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T2, off, ctx);
|
||||
emit_add(RV_REG_T2, RV_REG_T2, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sd(RV_REG_T2, 0, RV_REG_T1, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
ret = add_exception_handler(insn, ctx, REG_DONT_CLEAR_MARKER,
|
||||
insn_len);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
/* STX: *(size *)(dst + off) = src */
|
||||
case BPF_STX | BPF_MEM | BPF_B:
|
||||
if (is_12b_int(off)) {
|
||||
@ -1728,6 +1870,84 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
|
||||
emit_atomic(rd, rs, off, imm,
|
||||
BPF_SIZE(code) == BPF_DW, ctx);
|
||||
break;
|
||||
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_B:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_H:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_W:
|
||||
case BPF_STX | BPF_PROBE_MEM32 | BPF_DW:
|
||||
{
|
||||
int insn_len, insns_start;
|
||||
|
||||
emit_add(RV_REG_T2, rd, RV_REG_ARENA, ctx);
|
||||
rd = RV_REG_T2;
|
||||
|
||||
switch (BPF_SIZE(code)) {
|
||||
case BPF_B:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sb(rd, off, rs), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T1, off, ctx);
|
||||
emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sb(RV_REG_T1, 0, rs), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_H:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sh(rd, off, rs), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T1, off, ctx);
|
||||
emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit(rv_sh(RV_REG_T1, 0, rs), ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_W:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sw(rd, off, rs, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T1, off, ctx);
|
||||
emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sw(RV_REG_T1, 0, rs, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
case BPF_DW:
|
||||
if (is_12b_int(off)) {
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sd(rd, off, rs, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
emit_imm(RV_REG_T1, off, ctx);
|
||||
emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);
|
||||
insns_start = ctx->ninsns;
|
||||
emit_sd(RV_REG_T1, 0, rs, ctx);
|
||||
insn_len = ctx->ninsns - insns_start;
|
||||
break;
|
||||
}
|
||||
|
||||
ret = add_exception_handler(insn, ctx, REG_DONT_CLEAR_MARKER,
|
||||
insn_len);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
pr_err("bpf-jit: unknown opcode %02x\n", code);
|
||||
return -EINVAL;
|
||||
@ -1759,6 +1979,8 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)
|
||||
stack_adjust += 8;
|
||||
if (seen_reg(RV_REG_S6, ctx))
|
||||
stack_adjust += 8;
|
||||
if (ctx->arena_vm_start)
|
||||
stack_adjust += 8;
|
||||
|
||||
stack_adjust = round_up(stack_adjust, 16);
|
||||
stack_adjust += bpf_stack_adjust;
|
||||
@ -1810,6 +2032,10 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)
|
||||
emit_sd(RV_REG_SP, store_offset, RV_REG_S6, ctx);
|
||||
store_offset -= 8;
|
||||
}
|
||||
if (ctx->arena_vm_start) {
|
||||
emit_sd(RV_REG_SP, store_offset, RV_REG_ARENA, ctx);
|
||||
store_offset -= 8;
|
||||
}
|
||||
|
||||
emit_addi(RV_REG_FP, RV_REG_SP, stack_adjust, ctx);
|
||||
|
||||
@ -1823,6 +2049,9 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)
|
||||
emit_mv(RV_REG_TCC_SAVED, RV_REG_TCC, ctx);
|
||||
|
||||
ctx->stack_size = stack_adjust;
|
||||
|
||||
if (ctx->arena_vm_start)
|
||||
emit_imm(RV_REG_ARENA, ctx->arena_vm_start, ctx);
|
||||
}
|
||||
|
||||
void bpf_jit_build_epilogue(struct rv_jit_context *ctx)
|
||||
@ -1839,3 +2068,23 @@ bool bpf_jit_supports_ptr_xchg(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_arena(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_percpu_insn(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_inlines_helper_call(s32 imm)
|
||||
{
|
||||
switch (imm) {
|
||||
case BPF_FUNC_get_smp_processor_id:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
@ -80,6 +80,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
goto skip_init_ctx;
|
||||
}
|
||||
|
||||
ctx->arena_vm_start = bpf_arena_get_kern_vm_start(prog->aux->arena);
|
||||
ctx->user_vm_start = bpf_arena_get_user_vm_start(prog->aux->arena);
|
||||
ctx->prog = prog;
|
||||
ctx->offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
|
||||
if (!ctx->offset) {
|
||||
|
@ -1427,8 +1427,12 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp,
|
||||
EMIT6_DISP_LH(0xeb000000, is32 ? (op32) : (op64), \
|
||||
(insn->imm & BPF_FETCH) ? src_reg : REG_W0, \
|
||||
src_reg, dst_reg, off); \
|
||||
if (is32 && (insn->imm & BPF_FETCH)) \
|
||||
EMIT_ZERO(src_reg); \
|
||||
if (insn->imm & BPF_FETCH) { \
|
||||
/* bcr 14,0 - see atomic_fetch_{add,and,or,xor}() */ \
|
||||
_EMIT2(0x07e0); \
|
||||
if (is32) \
|
||||
EMIT_ZERO(src_reg); \
|
||||
} \
|
||||
} while (0)
|
||||
case BPF_ADD:
|
||||
case BPF_ADD | BPF_FETCH:
|
||||
@ -2108,7 +2112,11 @@ skip_init_ctx:
|
||||
print_fn_code(jit.prg_buf, jit.size_prg);
|
||||
}
|
||||
if (!fp->is_func || extra_pass) {
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
if (bpf_jit_binary_lock_ro(header)) {
|
||||
bpf_jit_binary_free(header);
|
||||
fp = orig_fp;
|
||||
goto free_addrs;
|
||||
}
|
||||
} else {
|
||||
jit_data->header = header;
|
||||
jit_data->ctx = jit;
|
||||
|
@ -1602,7 +1602,11 @@ skip_init_ctx:
|
||||
bpf_flush_icache(header, (u8 *)header + header->size);
|
||||
|
||||
if (!prog->is_func || extra_pass) {
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
if (bpf_jit_binary_lock_ro(header)) {
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
} else {
|
||||
jit_data->ctx = ctx;
|
||||
jit_data->image = image_ptr;
|
||||
|
@ -816,9 +816,10 @@ done:
|
||||
static void emit_mov_imm64(u8 **pprog, u32 dst_reg,
|
||||
const u32 imm32_hi, const u32 imm32_lo)
|
||||
{
|
||||
u64 imm64 = ((u64)imm32_hi << 32) | (u32)imm32_lo;
|
||||
u8 *prog = *pprog;
|
||||
|
||||
if (is_uimm32(((u64)imm32_hi << 32) | (u32)imm32_lo)) {
|
||||
if (is_uimm32(imm64)) {
|
||||
/*
|
||||
* For emitting plain u32, where sign bit must not be
|
||||
* propagated LLVM tends to load imm64 over mov32
|
||||
@ -826,6 +827,8 @@ static void emit_mov_imm64(u8 **pprog, u32 dst_reg,
|
||||
* 'mov %eax, imm32' instead.
|
||||
*/
|
||||
emit_mov_imm32(&prog, false, dst_reg, imm32_lo);
|
||||
} else if (is_simm32(imm64)) {
|
||||
emit_mov_imm32(&prog, true, dst_reg, imm32_lo);
|
||||
} else {
|
||||
/* movabsq rax, imm64 */
|
||||
EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
|
||||
@ -1169,6 +1172,54 @@ static int emit_atomic(u8 **pprog, u8 atomic_op,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int emit_atomic_index(u8 **pprog, u8 atomic_op, u32 size,
|
||||
u32 dst_reg, u32 src_reg, u32 index_reg, int off)
|
||||
{
|
||||
u8 *prog = *pprog;
|
||||
|
||||
EMIT1(0xF0); /* lock prefix */
|
||||
switch (size) {
|
||||
case BPF_W:
|
||||
EMIT1(add_3mod(0x40, dst_reg, src_reg, index_reg));
|
||||
break;
|
||||
case BPF_DW:
|
||||
EMIT1(add_3mod(0x48, dst_reg, src_reg, index_reg));
|
||||
break;
|
||||
default:
|
||||
pr_err("bpf_jit: 1 and 2 byte atomics are not supported\n");
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
/* emit opcode */
|
||||
switch (atomic_op) {
|
||||
case BPF_ADD:
|
||||
case BPF_AND:
|
||||
case BPF_OR:
|
||||
case BPF_XOR:
|
||||
/* lock *(u32/u64*)(dst_reg + idx_reg + off) <op>= src_reg */
|
||||
EMIT1(simple_alu_opcodes[atomic_op]);
|
||||
break;
|
||||
case BPF_ADD | BPF_FETCH:
|
||||
/* src_reg = atomic_fetch_add(dst_reg + idx_reg + off, src_reg); */
|
||||
EMIT2(0x0F, 0xC1);
|
||||
break;
|
||||
case BPF_XCHG:
|
||||
/* src_reg = atomic_xchg(dst_reg + idx_reg + off, src_reg); */
|
||||
EMIT1(0x87);
|
||||
break;
|
||||
case BPF_CMPXCHG:
|
||||
/* r0 = atomic_cmpxchg(dst_reg + idx_reg + off, r0, src_reg); */
|
||||
EMIT2(0x0F, 0xB1);
|
||||
break;
|
||||
default:
|
||||
pr_err("bpf_jit: unknown atomic opcode %02x\n", atomic_op);
|
||||
return -EFAULT;
|
||||
}
|
||||
emit_insn_suffix_SIB(&prog, dst_reg, src_reg, index_reg, off);
|
||||
*pprog = prog;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define DONT_CLEAR 1
|
||||
|
||||
bool ex_handler_bpf(const struct exception_table_entry *x, struct pt_regs *regs)
|
||||
@ -1351,8 +1402,7 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image
|
||||
break;
|
||||
|
||||
case BPF_ALU64 | BPF_MOV | BPF_X:
|
||||
if (insn->off == BPF_ADDR_SPACE_CAST &&
|
||||
insn->imm == 1U << 16) {
|
||||
if (insn_is_cast_user(insn)) {
|
||||
if (dst_reg != src_reg)
|
||||
/* 32-bit mov */
|
||||
emit_mov_reg(&prog, false, dst_reg, src_reg);
|
||||
@ -1383,6 +1433,16 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image
|
||||
maybe_emit_mod(&prog, AUX_REG, dst_reg, true);
|
||||
EMIT3(0x0F, 0x44, add_2reg(0xC0, AUX_REG, dst_reg));
|
||||
break;
|
||||
} else if (insn_is_mov_percpu_addr(insn)) {
|
||||
/* mov <dst>, <src> (if necessary) */
|
||||
EMIT_mov(dst_reg, src_reg);
|
||||
#ifdef CONFIG_SMP
|
||||
/* add <dst>, gs:[<off>] */
|
||||
EMIT2(0x65, add_1mod(0x48, dst_reg));
|
||||
EMIT3(0x03, add_2reg(0x04, 0, dst_reg), 0x25);
|
||||
EMIT((u32)(unsigned long)&this_cpu_off, 4);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
fallthrough;
|
||||
case BPF_ALU | BPF_MOV | BPF_X:
|
||||
@ -1963,6 +2023,15 @@ populate_extable:
|
||||
return err;
|
||||
break;
|
||||
|
||||
case BPF_STX | BPF_PROBE_ATOMIC | BPF_W:
|
||||
case BPF_STX | BPF_PROBE_ATOMIC | BPF_DW:
|
||||
start_of_ldx = prog;
|
||||
err = emit_atomic_index(&prog, insn->imm, BPF_SIZE(insn->code),
|
||||
dst_reg, src_reg, X86_REG_R12, insn->off);
|
||||
if (err)
|
||||
return err;
|
||||
goto populate_extable;
|
||||
|
||||
/* call */
|
||||
case BPF_JMP | BPF_CALL: {
|
||||
u8 *ip = image + addrs[i - 1];
|
||||
@ -2994,12 +3063,9 @@ void arch_free_bpf_trampoline(void *image, unsigned int size)
|
||||
bpf_prog_pack_free(image, size);
|
||||
}
|
||||
|
||||
void arch_protect_bpf_trampoline(void *image, unsigned int size)
|
||||
{
|
||||
}
|
||||
|
||||
void arch_unprotect_bpf_trampoline(void *image, unsigned int size)
|
||||
int arch_protect_bpf_trampoline(void *image, unsigned int size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *image_end,
|
||||
@ -3359,6 +3425,11 @@ bool bpf_jit_supports_subprog_tailcalls(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_percpu_insn(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
void bpf_jit_free(struct bpf_prog *prog)
|
||||
{
|
||||
if (prog->jited) {
|
||||
@ -3462,6 +3533,21 @@ bool bpf_jit_supports_arena(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)
|
||||
{
|
||||
if (!in_arena)
|
||||
return true;
|
||||
switch (insn->code) {
|
||||
case BPF_STX | BPF_ATOMIC | BPF_W:
|
||||
case BPF_STX | BPF_ATOMIC | BPF_DW:
|
||||
if (insn->imm == (BPF_AND | BPF_FETCH) ||
|
||||
insn->imm == (BPF_OR | BPF_FETCH) ||
|
||||
insn->imm == (BPF_XOR | BPF_FETCH))
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_ptr_xchg(void)
|
||||
{
|
||||
return true;
|
||||
|
@ -2600,8 +2600,7 @@ out_image:
|
||||
if (bpf_jit_enable > 1)
|
||||
bpf_jit_dump(prog->len, proglen, pass + 1, image);
|
||||
|
||||
if (image) {
|
||||
bpf_jit_binary_lock_ro(header);
|
||||
if (image && !bpf_jit_binary_lock_ro(header)) {
|
||||
prog->bpf_func = (void *)image;
|
||||
prog->jited = 1;
|
||||
prog->jited_len = proglen;
|
||||
|
@ -20,6 +20,9 @@ crypto_skcipher-y += lskcipher.o
|
||||
crypto_skcipher-y += skcipher.o
|
||||
|
||||
obj-$(CONFIG_CRYPTO_SKCIPHER2) += crypto_skcipher.o
|
||||
ifeq ($(CONFIG_BPF_SYSCALL),y)
|
||||
obj-$(CONFIG_CRYPTO_SKCIPHER2) += bpf_crypto_skcipher.o
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o
|
||||
obj-$(CONFIG_CRYPTO_ECHAINIV) += echainiv.o
|
||||
|
@ -847,7 +847,7 @@ void af_alg_wmem_wakeup(struct sock *sk)
|
||||
wake_up_interruptible_sync_poll(&wq->wait, EPOLLIN |
|
||||
EPOLLRDNORM |
|
||||
EPOLLRDBAND);
|
||||
sk_wake_async(sk, SOCK_WAKE_WAITD, POLL_IN);
|
||||
sk_wake_async_rcu(sk, SOCK_WAKE_WAITD, POLL_IN);
|
||||
rcu_read_unlock();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(af_alg_wmem_wakeup);
|
||||
@ -914,7 +914,7 @@ static void af_alg_data_wakeup(struct sock *sk)
|
||||
wake_up_interruptible_sync_poll(&wq->wait, EPOLLOUT |
|
||||
EPOLLRDNORM |
|
||||
EPOLLRDBAND);
|
||||
sk_wake_async(sk, SOCK_WAKE_SPACE, POLL_OUT);
|
||||
sk_wake_async_rcu(sk, SOCK_WAKE_SPACE, POLL_OUT);
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
|
82
crypto/bpf_crypto_skcipher.c
Normal file
82
crypto/bpf_crypto_skcipher.c
Normal file
@ -0,0 +1,82 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/* Copyright (c) 2024 Meta, Inc */
|
||||
#include <linux/types.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/bpf_crypto.h>
|
||||
#include <crypto/skcipher.h>
|
||||
|
||||
static void *bpf_crypto_lskcipher_alloc_tfm(const char *algo)
|
||||
{
|
||||
return crypto_alloc_lskcipher(algo, 0, 0);
|
||||
}
|
||||
|
||||
static void bpf_crypto_lskcipher_free_tfm(void *tfm)
|
||||
{
|
||||
crypto_free_lskcipher(tfm);
|
||||
}
|
||||
|
||||
static int bpf_crypto_lskcipher_has_algo(const char *algo)
|
||||
{
|
||||
return crypto_has_skcipher(algo, CRYPTO_ALG_TYPE_LSKCIPHER, CRYPTO_ALG_TYPE_MASK);
|
||||
}
|
||||
|
||||
static int bpf_crypto_lskcipher_setkey(void *tfm, const u8 *key, unsigned int keylen)
|
||||
{
|
||||
return crypto_lskcipher_setkey(tfm, key, keylen);
|
||||
}
|
||||
|
||||
static u32 bpf_crypto_lskcipher_get_flags(void *tfm)
|
||||
{
|
||||
return crypto_lskcipher_get_flags(tfm);
|
||||
}
|
||||
|
||||
static unsigned int bpf_crypto_lskcipher_ivsize(void *tfm)
|
||||
{
|
||||
return crypto_lskcipher_ivsize(tfm);
|
||||
}
|
||||
|
||||
static unsigned int bpf_crypto_lskcipher_statesize(void *tfm)
|
||||
{
|
||||
return crypto_lskcipher_statesize(tfm);
|
||||
}
|
||||
|
||||
static int bpf_crypto_lskcipher_encrypt(void *tfm, const u8 *src, u8 *dst,
|
||||
unsigned int len, u8 *siv)
|
||||
{
|
||||
return crypto_lskcipher_encrypt(tfm, src, dst, len, siv);
|
||||
}
|
||||
|
||||
static int bpf_crypto_lskcipher_decrypt(void *tfm, const u8 *src, u8 *dst,
|
||||
unsigned int len, u8 *siv)
|
||||
{
|
||||
return crypto_lskcipher_decrypt(tfm, src, dst, len, siv);
|
||||
}
|
||||
|
||||
static const struct bpf_crypto_type bpf_crypto_lskcipher_type = {
|
||||
.alloc_tfm = bpf_crypto_lskcipher_alloc_tfm,
|
||||
.free_tfm = bpf_crypto_lskcipher_free_tfm,
|
||||
.has_algo = bpf_crypto_lskcipher_has_algo,
|
||||
.setkey = bpf_crypto_lskcipher_setkey,
|
||||
.encrypt = bpf_crypto_lskcipher_encrypt,
|
||||
.decrypt = bpf_crypto_lskcipher_decrypt,
|
||||
.ivsize = bpf_crypto_lskcipher_ivsize,
|
||||
.statesize = bpf_crypto_lskcipher_statesize,
|
||||
.get_flags = bpf_crypto_lskcipher_get_flags,
|
||||
.owner = THIS_MODULE,
|
||||
.name = "skcipher",
|
||||
};
|
||||
|
||||
static int __init bpf_crypto_skcipher_init(void)
|
||||
{
|
||||
return bpf_crypto_register_type(&bpf_crypto_lskcipher_type);
|
||||
}
|
||||
|
||||
static void __exit bpf_crypto_skcipher_exit(void)
|
||||
{
|
||||
int err = bpf_crypto_unregister_type(&bpf_crypto_lskcipher_type);
|
||||
WARN_ON_ONCE(err);
|
||||
}
|
||||
|
||||
module_init(bpf_crypto_skcipher_init);
|
||||
module_exit(bpf_crypto_skcipher_exit);
|
||||
MODULE_LICENSE("GPL");
|
@ -94,9 +94,6 @@
|
||||
|
||||
static const struct atmdev_ops fore200e_ops;
|
||||
|
||||
static LIST_HEAD(fore200e_boards);
|
||||
|
||||
|
||||
MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
|
||||
MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
|
||||
|
||||
|
@ -830,7 +830,6 @@ typedef struct fore200e_vc_map {
|
||||
/* per-device data */
|
||||
|
||||
typedef struct fore200e {
|
||||
struct list_head entry; /* next device */
|
||||
const struct fore200e_bus* bus; /* bus-dependent code and data */
|
||||
union fore200e_regs regs; /* bus-dependent registers */
|
||||
struct atm_dev* atm_dev; /* ATM device */
|
||||
|
@ -240,15 +240,13 @@ err_unmap_mmio:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int bcma_host_soc_remove(struct platform_device *pdev)
|
||||
static void bcma_host_soc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct bcma_bus *bus = platform_get_drvdata(pdev);
|
||||
|
||||
bcma_bus_unregister(bus);
|
||||
iounmap(bus->mmio);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id bcma_host_soc_of_match[] = {
|
||||
@ -263,7 +261,7 @@ static struct platform_driver bcma_host_soc_driver = {
|
||||
.of_match_table = bcma_host_soc_of_match,
|
||||
},
|
||||
.probe = bcma_host_soc_probe,
|
||||
.remove = bcma_host_soc_remove,
|
||||
.remove_new = bcma_host_soc_remove,
|
||||
};
|
||||
|
||||
int __init bcma_host_soc_register_driver(void)
|
||||
|
@ -478,5 +478,16 @@ config BT_NXPUART
|
||||
Say Y here to compile support for NXP Bluetooth UART device into
|
||||
the kernel, or say M here to compile as a module (btnxpuart).
|
||||
|
||||
config BT_INTEL_PCIE
|
||||
tristate "Intel HCI PCIe driver"
|
||||
depends on PCI
|
||||
select BT_INTEL
|
||||
select FW_LOADER
|
||||
help
|
||||
Intel Bluetooth transport driver for PCIe.
|
||||
This driver is required if you want to use Intel Bluetooth device
|
||||
with PCIe interface.
|
||||
|
||||
Say Y here to compiler support for Intel Bluetooth PCIe device into
|
||||
the kernel or say M to compile it as module (btintel_pcie)
|
||||
endmenu
|
||||
|
@ -17,6 +17,7 @@ obj-$(CONFIG_BT_HCIBTUSB) += btusb.o
|
||||
obj-$(CONFIG_BT_HCIBTSDIO) += btsdio.o
|
||||
|
||||
obj-$(CONFIG_BT_INTEL) += btintel.o
|
||||
obj-$(CONFIG_BT_INTEL_PCIE) += btintel_pcie.o btintel.o
|
||||
obj-$(CONFIG_BT_ATH3K) += ath3k.o
|
||||
obj-$(CONFIG_BT_MRVL) += btmrvl.o
|
||||
obj-$(CONFIG_BT_MRVL_SDIO) += btmrvl_sdio.o
|
||||
|
@ -3,7 +3,6 @@
|
||||
* Copyright (c) 2008-2009 Atheros Communications Inc.
|
||||
*/
|
||||
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
@ -128,7 +127,6 @@ MODULE_DEVICE_TABLE(usb, ath3k_table);
|
||||
* for AR3012
|
||||
*/
|
||||
static const struct usb_device_id ath3k_blist_tbl[] = {
|
||||
|
||||
/* Atheros AR3012 with sflash firmware*/
|
||||
{ USB_DEVICE(0x0489, 0xe04e), .driver_info = BTUSB_ATH3012 },
|
||||
{ USB_DEVICE(0x0489, 0xe04d), .driver_info = BTUSB_ATH3012 },
|
||||
@ -202,7 +200,7 @@ static inline void ath3k_log_failed_loading(int err, int len, int size,
|
||||
#define TIMEGAP_USEC_MAX 100
|
||||
|
||||
static int ath3k_load_firmware(struct usb_device *udev,
|
||||
const struct firmware *firmware)
|
||||
const struct firmware *firmware)
|
||||
{
|
||||
u8 *send_buf;
|
||||
int len = 0;
|
||||
@ -237,9 +235,9 @@ static int ath3k_load_firmware(struct usb_device *udev,
|
||||
memcpy(send_buf, firmware->data + sent, size);
|
||||
|
||||
err = usb_bulk_msg(udev, pipe, send_buf, size,
|
||||
&len, 3000);
|
||||
&len, 3000);
|
||||
|
||||
if (err || (len != size)) {
|
||||
if (err || len != size) {
|
||||
ath3k_log_failed_loading(err, len, size, count);
|
||||
goto error;
|
||||
}
|
||||
@ -262,7 +260,7 @@ static int ath3k_get_state(struct usb_device *udev, unsigned char *state)
|
||||
}
|
||||
|
||||
static int ath3k_get_version(struct usb_device *udev,
|
||||
struct ath3k_version *version)
|
||||
struct ath3k_version *version)
|
||||
{
|
||||
return usb_control_msg_recv(udev, 0, ATH3K_GETVERSION,
|
||||
USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
|
||||
@ -271,7 +269,7 @@ static int ath3k_get_version(struct usb_device *udev,
|
||||
}
|
||||
|
||||
static int ath3k_load_fwfile(struct usb_device *udev,
|
||||
const struct firmware *firmware)
|
||||
const struct firmware *firmware)
|
||||
{
|
||||
u8 *send_buf;
|
||||
int len = 0;
|
||||
@ -310,8 +308,8 @@ static int ath3k_load_fwfile(struct usb_device *udev,
|
||||
memcpy(send_buf, firmware->data + sent, size);
|
||||
|
||||
err = usb_bulk_msg(udev, pipe, send_buf, size,
|
||||
&len, 3000);
|
||||
if (err || (len != size)) {
|
||||
&len, 3000);
|
||||
if (err || len != size) {
|
||||
ath3k_log_failed_loading(err, len, size, count);
|
||||
kfree(send_buf);
|
||||
return err;
|
||||
@ -425,7 +423,6 @@ static int ath3k_load_syscfg(struct usb_device *udev)
|
||||
}
|
||||
|
||||
switch (fw_version.ref_clock) {
|
||||
|
||||
case ATH3K_XTAL_FREQ_26M:
|
||||
clk_value = 26;
|
||||
break;
|
||||
@ -441,7 +438,7 @@ static int ath3k_load_syscfg(struct usb_device *udev)
|
||||
}
|
||||
|
||||
snprintf(filename, ATH3K_NAME_LEN, "ar3k/ramps_0x%08x_%d%s",
|
||||
le32_to_cpu(fw_version.rom_version), clk_value, ".dfu");
|
||||
le32_to_cpu(fw_version.rom_version), clk_value, ".dfu");
|
||||
|
||||
ret = request_firmware(&firmware, filename, &udev->dev);
|
||||
if (ret < 0) {
|
||||
@ -456,7 +453,7 @@ static int ath3k_load_syscfg(struct usb_device *udev)
|
||||
}
|
||||
|
||||
static int ath3k_probe(struct usb_interface *intf,
|
||||
const struct usb_device_id *id)
|
||||
const struct usb_device_id *id)
|
||||
{
|
||||
const struct firmware *firmware;
|
||||
struct usb_device *udev = interface_to_usbdev(intf);
|
||||
@ -505,10 +502,10 @@ static int ath3k_probe(struct usb_interface *intf,
|
||||
if (ret < 0) {
|
||||
if (ret == -ENOENT)
|
||||
BT_ERR("Firmware file \"%s\" not found",
|
||||
ATH3K_FIRMWARE);
|
||||
ATH3K_FIRMWARE);
|
||||
else
|
||||
BT_ERR("Firmware file \"%s\" request failed (err=%d)",
|
||||
ATH3K_FIRMWARE, ret);
|
||||
ATH3K_FIRMWARE, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -245,7 +245,7 @@ static int btintel_set_diag_combined(struct hci_dev *hdev, bool enable)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void btintel_hw_error(struct hci_dev *hdev, u8 code)
|
||||
void btintel_hw_error(struct hci_dev *hdev, u8 code)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
u8 type = 0x00;
|
||||
@ -277,6 +277,7 @@ static void btintel_hw_error(struct hci_dev *hdev, u8 code)
|
||||
|
||||
kfree_skb(skb);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_hw_error);
|
||||
|
||||
int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver)
|
||||
{
|
||||
@ -455,8 +456,8 @@ int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_read_version);
|
||||
|
||||
static int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version)
|
||||
int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version)
|
||||
{
|
||||
const char *variant;
|
||||
|
||||
@ -481,6 +482,7 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
case 0x19: /* Slr-F */
|
||||
case 0x1b: /* Mgr */
|
||||
case 0x1c: /* Gale Peak (GaP) */
|
||||
case 0x1e: /* BlazarI (Bzr) */
|
||||
break;
|
||||
default:
|
||||
bt_dev_err(hdev, "Unsupported Intel hardware variant (0x%x)",
|
||||
@ -489,7 +491,7 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
}
|
||||
|
||||
switch (version->img_type) {
|
||||
case 0x01:
|
||||
case BTINTEL_IMG_BOOTLOADER:
|
||||
variant = "Bootloader";
|
||||
/* It is required that every single firmware fragment is acknowledged
|
||||
* with a command complete event. If the boot parameters indicate
|
||||
@ -521,7 +523,10 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
version->min_fw_build_nn, version->min_fw_build_cw,
|
||||
2000 + version->min_fw_build_yy);
|
||||
break;
|
||||
case 0x03:
|
||||
case BTINTEL_IMG_IML:
|
||||
variant = "Intermediate loader";
|
||||
break;
|
||||
case BTINTEL_IMG_OP:
|
||||
variant = "Firmware";
|
||||
break;
|
||||
default:
|
||||
@ -535,15 +540,16 @@ static int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
bt_dev_info(hdev, "%s timestamp %u.%u buildtype %u build %u", variant,
|
||||
2000 + (version->timestamp >> 8), version->timestamp & 0xff,
|
||||
version->build_type, version->build_num);
|
||||
if (version->img_type == 0x03)
|
||||
if (version->img_type == BTINTEL_IMG_OP)
|
||||
bt_dev_info(hdev, "Firmware SHA1: 0x%8.8x", version->git_sha1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_version_info_tlv);
|
||||
|
||||
static int btintel_parse_version_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version,
|
||||
struct sk_buff *skb)
|
||||
int btintel_parse_version_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
/* Consume Command Complete Status field */
|
||||
skb_pull(skb, 1);
|
||||
@ -645,6 +651,7 @@ static int btintel_parse_version_tlv(struct hci_dev *hdev,
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_parse_version_tlv);
|
||||
|
||||
static int btintel_read_version_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version)
|
||||
@ -1172,7 +1179,7 @@ static int btintel_download_fw_tlv(struct hci_dev *hdev,
|
||||
* If the firmware version has changed that means it needs to be reset
|
||||
* to bootloader when operational so the new firmware can be loaded.
|
||||
*/
|
||||
if (ver->img_type == 0x03)
|
||||
if (ver->img_type == BTINTEL_IMG_OP)
|
||||
return -EINVAL;
|
||||
|
||||
/* iBT hardware variants 0x0b, 0x0c, 0x11, 0x12, 0x13, 0x14 support
|
||||
@ -2194,10 +2201,26 @@ static void btintel_get_fw_name_tlv(const struct intel_version_tlv *ver,
|
||||
char *fw_name, size_t len,
|
||||
const char *suffix)
|
||||
{
|
||||
const char *format;
|
||||
/* The firmware file name for new generation controllers will be
|
||||
* ibt-<cnvi_top type+cnvi_top step>-<cnvr_top type+cnvr_top step>
|
||||
*/
|
||||
snprintf(fw_name, len, "intel/ibt-%04x-%04x.%s",
|
||||
switch (ver->cnvi_top & 0xfff) {
|
||||
/* Only Blazar product supports downloading of intermediate loader
|
||||
* image
|
||||
*/
|
||||
case BTINTEL_CNVI_BLAZARI:
|
||||
if (ver->img_type == BTINTEL_IMG_BOOTLOADER)
|
||||
format = "intel/ibt-%04x-%04x-iml.%s";
|
||||
else
|
||||
format = "intel/ibt-%04x-%04x.%s";
|
||||
break;
|
||||
default:
|
||||
format = "intel/ibt-%04x-%04x.%s";
|
||||
break;
|
||||
}
|
||||
|
||||
snprintf(fw_name, len, format,
|
||||
INTEL_CNVX_TOP_PACK_SWAB(INTEL_CNVX_TOP_TYPE(ver->cnvi_top),
|
||||
INTEL_CNVX_TOP_STEP(ver->cnvi_top)),
|
||||
INTEL_CNVX_TOP_PACK_SWAB(INTEL_CNVX_TOP_TYPE(ver->cnvr_top),
|
||||
@ -2230,7 +2253,7 @@ static int btintel_prepare_fw_download_tlv(struct hci_dev *hdev,
|
||||
* It is not possible to use the Secure Boot Parameters in this
|
||||
* case since that command is only available in bootloader mode.
|
||||
*/
|
||||
if (ver->img_type == 0x03) {
|
||||
if (ver->img_type == BTINTEL_IMG_OP) {
|
||||
btintel_clear_flag(hdev, INTEL_BOOTLOADER);
|
||||
btintel_check_bdaddr(hdev);
|
||||
} else {
|
||||
@ -2577,8 +2600,8 @@ static void btintel_set_dsm_reset_method(struct hci_dev *hdev,
|
||||
data->acpi_reset_method = btintel_acpi_reset_method;
|
||||
}
|
||||
|
||||
static int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *ver)
|
||||
int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *ver)
|
||||
{
|
||||
u32 boot_param;
|
||||
char ddcname[64];
|
||||
@ -2600,13 +2623,30 @@ static int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
|
||||
return err;
|
||||
|
||||
/* check if controller is already having an operational firmware */
|
||||
if (ver->img_type == 0x03)
|
||||
if (ver->img_type == BTINTEL_IMG_OP)
|
||||
goto finish;
|
||||
|
||||
err = btintel_boot(hdev, boot_param);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = btintel_read_version_tlv(hdev, ver);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* If image type returned is BTINTEL_IMG_IML, then controller supports
|
||||
* intermediae loader image
|
||||
*/
|
||||
if (ver->img_type == BTINTEL_IMG_IML) {
|
||||
err = btintel_prepare_fw_download_tlv(hdev, ver, &boot_param);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = btintel_boot(hdev, boot_param);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
btintel_clear_flag(hdev, INTEL_BOOTLOADER);
|
||||
|
||||
btintel_get_fw_name_tlv(ver, ddcname, sizeof(ddcname), "ddc");
|
||||
@ -2645,8 +2685,9 @@ finish:
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_bootloader_setup_tlv);
|
||||
|
||||
static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
|
||||
void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
|
||||
{
|
||||
switch (hw_variant) {
|
||||
/* Legacy bootloader devices that supports MSFT Extension */
|
||||
@ -2662,6 +2703,7 @@ static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
|
||||
case 0x19:
|
||||
case 0x1b:
|
||||
case 0x1c:
|
||||
case 0x1e:
|
||||
hci_set_msft_opcode(hdev, 0xFC1E);
|
||||
break;
|
||||
default:
|
||||
@ -2669,6 +2711,7 @@ static void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
|
||||
break;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_set_msft_opcode);
|
||||
|
||||
static void btintel_print_fseq_info(struct hci_dev *hdev)
|
||||
{
|
||||
@ -2920,6 +2963,11 @@ static int btintel_setup_combined(struct hci_dev *hdev)
|
||||
err = -EINVAL;
|
||||
}
|
||||
|
||||
hci_set_hw_info(hdev,
|
||||
"INTEL platform=%u variant=%u revision=%u",
|
||||
ver.hw_platform, ver.hw_variant,
|
||||
ver.hw_revision);
|
||||
|
||||
goto exit_error;
|
||||
}
|
||||
|
||||
@ -2996,6 +3044,7 @@ static int btintel_setup_combined(struct hci_dev *hdev)
|
||||
case 0x19:
|
||||
case 0x1b:
|
||||
case 0x1c:
|
||||
case 0x1e:
|
||||
/* Display version information of TLV type */
|
||||
btintel_version_info_tlv(hdev, &ver_tlv);
|
||||
|
||||
@ -3024,13 +3073,17 @@ static int btintel_setup_combined(struct hci_dev *hdev)
|
||||
break;
|
||||
}
|
||||
|
||||
hci_set_hw_info(hdev, "INTEL platform=%u variant=%u",
|
||||
INTEL_HW_PLATFORM(ver_tlv.cnvi_bt),
|
||||
INTEL_HW_VARIANT(ver_tlv.cnvi_bt));
|
||||
|
||||
exit_error:
|
||||
kfree_skb(skb);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int btintel_shutdown_combined(struct hci_dev *hdev)
|
||||
int btintel_shutdown_combined(struct hci_dev *hdev)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
int ret;
|
||||
@ -3064,6 +3117,7 @@ static int btintel_shutdown_combined(struct hci_dev *hdev)
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(btintel_shutdown_combined);
|
||||
|
||||
int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name)
|
||||
{
|
||||
|
@ -51,6 +51,12 @@ struct intel_tlv {
|
||||
u8 val[];
|
||||
} __packed;
|
||||
|
||||
#define BTINTEL_CNVI_BLAZARI 0x900
|
||||
|
||||
#define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */
|
||||
#define BTINTEL_IMG_IML 0x02 /* Intermediate image */
|
||||
#define BTINTEL_IMG_OP 0x03 /* Operational image */
|
||||
|
||||
struct intel_version_tlv {
|
||||
u32 cnvi_top;
|
||||
u32 cnvr_top;
|
||||
@ -203,7 +209,7 @@ struct btintel_data {
|
||||
#define btintel_wait_on_flag_timeout(hdev, nr, m, to) \
|
||||
wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
|
||||
|
||||
#if IS_ENABLED(CONFIG_BT_INTEL)
|
||||
#if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE)
|
||||
|
||||
int btintel_check_bdaddr(struct hci_dev *hdev);
|
||||
int btintel_enter_mfg(struct hci_dev *hdev);
|
||||
@ -228,6 +234,16 @@ void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
|
||||
void btintel_secure_send_result(struct hci_dev *hdev,
|
||||
const void *ptr, unsigned int len);
|
||||
int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
|
||||
int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version);
|
||||
int btintel_parse_version_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version,
|
||||
struct sk_buff *skb);
|
||||
void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant);
|
||||
int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *ver);
|
||||
int btintel_shutdown_combined(struct hci_dev *hdev);
|
||||
void btintel_hw_error(struct hci_dev *hdev, u8 code);
|
||||
#else
|
||||
|
||||
static inline int btintel_check_bdaddr(struct hci_dev *hdev)
|
||||
@ -324,4 +340,37 @@ static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int btintel_version_info_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version)
|
||||
{
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
static inline int btintel_parse_version_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *version,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
|
||||
|
||||
{
|
||||
}
|
||||
|
||||
static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
|
||||
struct intel_version_tlv *ver)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int btintel_shutdown_combined(struct hci_dev *hdev)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
1357
drivers/bluetooth/btintel_pcie.c
Normal file
1357
drivers/bluetooth/btintel_pcie.c
Normal file
File diff suppressed because it is too large
Load Diff
430
drivers/bluetooth/btintel_pcie.h
Normal file
430
drivers/bluetooth/btintel_pcie.h
Normal file
@ -0,0 +1,430 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
*
|
||||
* Bluetooth support for Intel PCIe devices
|
||||
*
|
||||
* Copyright (C) 2024 Intel Corporation
|
||||
*/
|
||||
|
||||
/* Control and Status Register(BTINTEL_PCIE_CSR) */
|
||||
#define BTINTEL_PCIE_CSR_BASE (0x000)
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_REG (BTINTEL_PCIE_CSR_BASE + 0x024)
|
||||
#define BTINTEL_PCIE_CSR_HW_REV_REG (BTINTEL_PCIE_CSR_BASE + 0x028)
|
||||
#define BTINTEL_PCIE_CSR_RF_ID_REG (BTINTEL_PCIE_CSR_BASE + 0x09C)
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_REG (BTINTEL_PCIE_CSR_BASE + 0x108)
|
||||
#define BTINTEL_PCIE_CSR_CI_ADDR_LSB_REG (BTINTEL_PCIE_CSR_BASE + 0x118)
|
||||
#define BTINTEL_PCIE_CSR_CI_ADDR_MSB_REG (BTINTEL_PCIE_CSR_BASE + 0x11C)
|
||||
#define BTINTEL_PCIE_CSR_IMG_RESPONSE_REG (BTINTEL_PCIE_CSR_BASE + 0x12C)
|
||||
#define BTINTEL_PCIE_CSR_HBUS_TARG_WRPTR (BTINTEL_PCIE_CSR_BASE + 0x460)
|
||||
|
||||
/* BTINTEL_PCIE_CSR Function Control Register */
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_ENA (BIT(0))
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT (BIT(6))
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_INIT (BIT(7))
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_ACCESS_STS (BIT(20))
|
||||
#define BTINTEL_PCIE_CSR_FUNC_CTRL_SW_RESET (BIT(31))
|
||||
|
||||
/* Value for BTINTEL_PCIE_CSR_BOOT_STAGE register */
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_ROM (BIT(0))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_IML (BIT(1))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_OPFW (BIT(2))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_ROM_LOCKDOWN (BIT(10))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_IML_LOCKDOWN (BIT(11))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_MAC_ACCESS_ON (BIT(16))
|
||||
#define BTINTEL_PCIE_CSR_BOOT_STAGE_ALIVE (BIT(23))
|
||||
|
||||
/* Registers for MSI-X */
|
||||
#define BTINTEL_PCIE_CSR_MSIX_BASE (0x2000)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_FH_INT_CAUSES (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0800)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_FH_INT_MASK (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0804)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0808)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_HW_INT_MASK (BTINTEL_PCIE_CSR_MSIX_BASE + 0x080C)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_AUTOMASK_ST (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0810)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_AUTOMASK_EN (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0814)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_IVAR_BASE (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0880)
|
||||
#define BTINTEL_PCIE_CSR_MSIX_IVAR(cause) (BTINTEL_PCIE_CSR_MSIX_IVAR_BASE + (cause))
|
||||
|
||||
/* Causes for the FH register interrupts */
|
||||
enum msix_fh_int_causes {
|
||||
BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0 = BIT(0), /* cause 0 */
|
||||
BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1 = BIT(1), /* cause 1 */
|
||||
};
|
||||
|
||||
/* Causes for the HW register interrupts */
|
||||
enum msix_hw_int_causes {
|
||||
BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0 = BIT(0), /* cause 32 */
|
||||
};
|
||||
|
||||
#define BTINTEL_PCIE_MSIX_NON_AUTO_CLEAR_CAUSE BIT(7)
|
||||
|
||||
/* Minimum and Maximum number of MSI-X Vector
|
||||
* Intel Bluetooth PCIe support only 1 vector
|
||||
*/
|
||||
#define BTINTEL_PCIE_MSIX_VEC_MAX 1
|
||||
#define BTINTEL_PCIE_MSIX_VEC_MIN 1
|
||||
|
||||
/* Default poll time for MAC access during init */
|
||||
#define BTINTEL_DEFAULT_MAC_ACCESS_TIMEOUT_US 200000
|
||||
|
||||
/* Default interrupt timeout in msec */
|
||||
#define BTINTEL_DEFAULT_INTR_TIMEOUT 3000
|
||||
|
||||
/* The number of descriptors in TX/RX queues */
|
||||
#define BTINTEL_DESCS_COUNT 16
|
||||
|
||||
/* Number of Queue for TX and RX
|
||||
* It indicates the index of the IA(Index Array)
|
||||
*/
|
||||
enum {
|
||||
BTINTEL_PCIE_TXQ_NUM = 0,
|
||||
BTINTEL_PCIE_RXQ_NUM = 1,
|
||||
BTINTEL_PCIE_NUM_QUEUES = 2,
|
||||
};
|
||||
|
||||
/* The size of DMA buffer for TX and RX in bytes */
|
||||
#define BTINTEL_PCIE_BUFFER_SIZE 4096
|
||||
|
||||
/* DMA allocation alignment */
|
||||
#define BTINTEL_PCIE_DMA_POOL_ALIGNMENT 256
|
||||
|
||||
#define BTINTEL_PCIE_TX_WAIT_TIMEOUT_MS 500
|
||||
|
||||
/* Doorbell vector for TFD */
|
||||
#define BTINTEL_PCIE_TX_DB_VEC 0
|
||||
|
||||
/* Number of pending RX requests for downlink */
|
||||
#define BTINTEL_PCIE_RX_MAX_QUEUE 6
|
||||
|
||||
/* Doorbell vector for FRBD */
|
||||
#define BTINTEL_PCIE_RX_DB_VEC 513
|
||||
|
||||
/* RBD buffer size mapping */
|
||||
#define BTINTEL_PCIE_RBD_SIZE_4K 0x04
|
||||
|
||||
/*
|
||||
* Struct for Context Information (v2)
|
||||
*
|
||||
* All members are write-only for host and read-only for device.
|
||||
*
|
||||
* @version: Version of context information
|
||||
* @size: Size of context information
|
||||
* @config: Config with which host wants peripheral to execute
|
||||
* Subset of capability register published by device
|
||||
* @addr_tr_hia: Address of TR Head Index Array
|
||||
* @addr_tr_tia: Address of TR Tail Index Array
|
||||
* @addr_cr_hia: Address of CR Head Index Array
|
||||
* @addr_cr_tia: Address of CR Tail Index Array
|
||||
* @num_tr_ia: Number of entries in TR Index Arrays
|
||||
* @num_cr_ia: Number of entries in CR Index Arrays
|
||||
* @rbd_siz: RBD Size { 0x4=4K }
|
||||
* @addr_tfdq: Address of TFD Queue(tx)
|
||||
* @addr_urbdq0: Address of URBD Queue(tx)
|
||||
* @num_tfdq: Number of TFD in TFD Queue(tx)
|
||||
* @num_urbdq0: Number of URBD in URBD Queue(tx)
|
||||
* @tfdq_db_vec: Queue number of TFD
|
||||
* @urbdq0_db_vec: Queue number of URBD
|
||||
* @addr_frbdq: Address of FRBD Queue(rx)
|
||||
* @addr_urbdq1: Address of URBD Queue(rx)
|
||||
* @num_frbdq: Number of FRBD in FRBD Queue(rx)
|
||||
* @frbdq_db_vec: Queue number of FRBD
|
||||
* @num_urbdq1: Number of URBD in URBD Queue(rx)
|
||||
* @urbdq_db_vec: Queue number of URBDQ1
|
||||
* @tr_msi_vec: Transfer Ring MSI-X Vector
|
||||
* @cr_msi_vec: Completion Ring MSI-X Vector
|
||||
* @dbgc_addr: DBGC first fragment address
|
||||
* @dbgc_size: DBGC buffer size
|
||||
* @early_enable: Enarly debug enable
|
||||
* @dbg_output_mode: Debug output mode
|
||||
* Bit[4] DBGC O/P { 0=SRAM, 1=DRAM(not relevant for NPK) }
|
||||
* Bit[5] DBGC I/P { 0=BDBG, 1=DBGI }
|
||||
* Bits[6:7] DBGI O/P(relevant if bit[5] = 1)
|
||||
* 0=BT DBGC, 1=WiFi DBGC, 2=NPK }
|
||||
* @dbg_preset: Debug preset
|
||||
* @ext_addr: Address of context information extension
|
||||
* @ext_size: Size of context information part
|
||||
*
|
||||
* Total 38 DWords
|
||||
*/
|
||||
struct ctx_info {
|
||||
u16 version;
|
||||
u16 size;
|
||||
u32 config;
|
||||
u32 reserved_dw02;
|
||||
u32 reserved_dw03;
|
||||
u64 addr_tr_hia;
|
||||
u64 addr_tr_tia;
|
||||
u64 addr_cr_hia;
|
||||
u64 addr_cr_tia;
|
||||
u16 num_tr_ia;
|
||||
u16 num_cr_ia;
|
||||
u32 rbd_size:4,
|
||||
reserved_dw13:28;
|
||||
u64 addr_tfdq;
|
||||
u64 addr_urbdq0;
|
||||
u16 num_tfdq;
|
||||
u16 num_urbdq0;
|
||||
u16 tfdq_db_vec;
|
||||
u16 urbdq0_db_vec;
|
||||
u64 addr_frbdq;
|
||||
u64 addr_urbdq1;
|
||||
u16 num_frbdq;
|
||||
u16 frbdq_db_vec;
|
||||
u16 num_urbdq1;
|
||||
u16 urbdq_db_vec;
|
||||
u16 tr_msi_vec;
|
||||
u16 cr_msi_vec;
|
||||
u32 reserved_dw27;
|
||||
u64 dbgc_addr;
|
||||
u32 dbgc_size;
|
||||
u32 early_enable:1,
|
||||
reserved_dw31:3,
|
||||
dbg_output_mode:4,
|
||||
dbg_preset:8,
|
||||
reserved2_dw31:16;
|
||||
u64 ext_addr;
|
||||
u32 ext_size;
|
||||
u32 test_param;
|
||||
u32 reserved_dw36;
|
||||
u32 reserved_dw37;
|
||||
} __packed;
|
||||
|
||||
/* Transfer Descriptor for TX
|
||||
* @type: Not in use. Set to 0x0
|
||||
* @size: Size of data in the buffer
|
||||
* @addr: DMA Address of buffer
|
||||
*/
|
||||
struct tfd {
|
||||
u8 type;
|
||||
u16 size;
|
||||
u8 reserved;
|
||||
u64 addr;
|
||||
u32 reserved1;
|
||||
} __packed;
|
||||
|
||||
/* URB Descriptor for TX
|
||||
* @tfd_index: Index of TFD in TFDQ + 1
|
||||
* @num_txq: Queue index of TFD Queue
|
||||
* @cmpl_count: Completion count. Always 0x01
|
||||
* @immediate_cmpl: Immediate completion flag: Always 0x01
|
||||
*/
|
||||
struct urbd0 {
|
||||
u32 tfd_index:16,
|
||||
num_txq:8,
|
||||
cmpl_count:4,
|
||||
reserved:3,
|
||||
immediate_cmpl:1;
|
||||
} __packed;
|
||||
|
||||
/* FRB Descriptor for RX
|
||||
* @tag: RX buffer tag (index of RX buffer queue)
|
||||
* @addr: Address of buffer
|
||||
*/
|
||||
struct frbd {
|
||||
u32 tag:16,
|
||||
reserved:16;
|
||||
u32 reserved2;
|
||||
u64 addr;
|
||||
} __packed;
|
||||
|
||||
/* URB Descriptor for RX
|
||||
* @frbd_tag: Tag from FRBD
|
||||
* @status: Status
|
||||
*/
|
||||
struct urbd1 {
|
||||
u32 frbd_tag:16,
|
||||
status:1,
|
||||
reserved:14,
|
||||
fixed:1;
|
||||
} __packed;
|
||||
|
||||
/* RFH header in RX packet
|
||||
* @packet_len: Length of the data in the buffer
|
||||
* @rxq: RX Queue number
|
||||
* @cmd_id: Command ID. Not in Use
|
||||
*/
|
||||
struct rfh_hdr {
|
||||
u64 packet_len:16,
|
||||
rxq:6,
|
||||
reserved:10,
|
||||
cmd_id:16,
|
||||
reserved1:16;
|
||||
} __packed;
|
||||
|
||||
/* Internal data buffer
|
||||
* @data: pointer to the data buffer
|
||||
* @p_addr: physical address of data buffer
|
||||
*/
|
||||
struct data_buf {
|
||||
u8 *data;
|
||||
dma_addr_t data_p_addr;
|
||||
};
|
||||
|
||||
/* Index Array */
|
||||
struct ia {
|
||||
dma_addr_t tr_hia_p_addr;
|
||||
u16 *tr_hia;
|
||||
dma_addr_t tr_tia_p_addr;
|
||||
u16 *tr_tia;
|
||||
dma_addr_t cr_hia_p_addr;
|
||||
u16 *cr_hia;
|
||||
dma_addr_t cr_tia_p_addr;
|
||||
u16 *cr_tia;
|
||||
};
|
||||
|
||||
/* Structure for TX Queue
|
||||
* @count: Number of descriptors
|
||||
* @tfds: Array of TFD
|
||||
* @urbd0s: Array of URBD0
|
||||
* @buf: Array of data_buf structure
|
||||
*/
|
||||
struct txq {
|
||||
u16 count;
|
||||
|
||||
dma_addr_t tfds_p_addr;
|
||||
struct tfd *tfds;
|
||||
|
||||
dma_addr_t urbd0s_p_addr;
|
||||
struct urbd0 *urbd0s;
|
||||
|
||||
dma_addr_t buf_p_addr;
|
||||
void *buf_v_addr;
|
||||
struct data_buf *bufs;
|
||||
};
|
||||
|
||||
/* Structure for RX Queue
|
||||
* @count: Number of descriptors
|
||||
* @frbds: Array of FRBD
|
||||
* @urbd1s: Array of URBD1
|
||||
* @buf: Array of data_buf structure
|
||||
*/
|
||||
struct rxq {
|
||||
u16 count;
|
||||
|
||||
dma_addr_t frbds_p_addr;
|
||||
struct frbd *frbds;
|
||||
|
||||
dma_addr_t urbd1s_p_addr;
|
||||
struct urbd1 *urbd1s;
|
||||
|
||||
dma_addr_t buf_p_addr;
|
||||
void *buf_v_addr;
|
||||
struct data_buf *bufs;
|
||||
};
|
||||
|
||||
/* struct btintel_pcie_data
|
||||
* @pdev: pci device
|
||||
* @hdev: hdev device
|
||||
* @flags: driver state
|
||||
* @irq_lock: spinlock for MSI-X
|
||||
* @hci_rx_lock: spinlock for HCI RX flow
|
||||
* @base_addr: pci base address (from BAR)
|
||||
* @msix_entries: array of MSI-X entries
|
||||
* @msix_enabled: true if MSI-X is enabled;
|
||||
* @alloc_vecs: number of interrupt vectors allocated
|
||||
* @def_irq: default irq for all causes
|
||||
* @fh_init_mask: initial unmasked rxq causes
|
||||
* @hw_init_mask: initial unmaksed hw causes
|
||||
* @boot_stage_cache: cached value of boot stage register
|
||||
* @img_resp_cache: cached value of image response register
|
||||
* @cnvi: CNVi register value
|
||||
* @cnvr: CNVr register value
|
||||
* @gp0_received: condition for gp0 interrupt
|
||||
* @gp0_wait_q: wait_q for gp0 interrupt
|
||||
* @tx_wait_done: condition for tx interrupt
|
||||
* @tx_wait_q: wait_q for tx interrupt
|
||||
* @workqueue: workqueue for RX work
|
||||
* @rx_skb_q: SKB queue for RX packet
|
||||
* @rx_work: RX work struct to process the RX packet in @rx_skb_q
|
||||
* @dma_pool: DMA pool for descriptors, index array and ci
|
||||
* @dma_p_addr: DMA address for pool
|
||||
* @dma_v_addr: address of pool
|
||||
* @ci_p_addr: DMA address for CI struct
|
||||
* @ci: CI struct
|
||||
* @ia: Index Array struct
|
||||
* @txq: TX Queue struct
|
||||
* @rxq: RX Queue struct
|
||||
*/
|
||||
struct btintel_pcie_data {
|
||||
struct pci_dev *pdev;
|
||||
struct hci_dev *hdev;
|
||||
|
||||
unsigned long flags;
|
||||
/* lock used in MSI-X interrupt */
|
||||
spinlock_t irq_lock;
|
||||
/* lock to serialize rx events */
|
||||
spinlock_t hci_rx_lock;
|
||||
|
||||
void __iomem *base_addr;
|
||||
|
||||
struct msix_entry msix_entries[BTINTEL_PCIE_MSIX_VEC_MAX];
|
||||
bool msix_enabled;
|
||||
u32 alloc_vecs;
|
||||
u32 def_irq;
|
||||
|
||||
u32 fh_init_mask;
|
||||
u32 hw_init_mask;
|
||||
|
||||
u32 boot_stage_cache;
|
||||
u32 img_resp_cache;
|
||||
|
||||
u32 cnvi;
|
||||
u32 cnvr;
|
||||
|
||||
bool gp0_received;
|
||||
wait_queue_head_t gp0_wait_q;
|
||||
|
||||
bool tx_wait_done;
|
||||
wait_queue_head_t tx_wait_q;
|
||||
|
||||
struct workqueue_struct *workqueue;
|
||||
struct sk_buff_head rx_skb_q;
|
||||
struct work_struct rx_work;
|
||||
|
||||
struct dma_pool *dma_pool;
|
||||
dma_addr_t dma_p_addr;
|
||||
void *dma_v_addr;
|
||||
|
||||
dma_addr_t ci_p_addr;
|
||||
struct ctx_info *ci;
|
||||
struct ia ia;
|
||||
struct txq txq;
|
||||
struct rxq rxq;
|
||||
};
|
||||
|
||||
static inline u32 btintel_pcie_rd_reg32(struct btintel_pcie_data *data,
|
||||
u32 offset)
|
||||
{
|
||||
return ioread32(data->base_addr + offset);
|
||||
}
|
||||
|
||||
static inline void btintel_pcie_wr_reg8(struct btintel_pcie_data *data,
|
||||
u32 offset, u8 val)
|
||||
{
|
||||
iowrite8(val, data->base_addr + offset);
|
||||
}
|
||||
|
||||
static inline void btintel_pcie_wr_reg32(struct btintel_pcie_data *data,
|
||||
u32 offset, u32 val)
|
||||
{
|
||||
iowrite32(val, data->base_addr + offset);
|
||||
}
|
||||
|
||||
static inline void btintel_pcie_set_reg_bits(struct btintel_pcie_data *data,
|
||||
u32 offset, u32 bits)
|
||||
{
|
||||
u32 r;
|
||||
|
||||
r = ioread32(data->base_addr + offset);
|
||||
r |= bits;
|
||||
iowrite32(r, data->base_addr + offset);
|
||||
}
|
||||
|
||||
static inline void btintel_pcie_clr_reg_bits(struct btintel_pcie_data *data,
|
||||
u32 offset, u32 bits)
|
||||
{
|
||||
u32 r;
|
||||
|
||||
r = ioread32(data->base_addr + offset);
|
||||
r &= ~bits;
|
||||
iowrite32(r, data->base_addr + offset);
|
||||
}
|
@ -121,13 +121,6 @@ int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb)
|
||||
((event->data[2] == MODULE_BROUGHT_UP) ||
|
||||
(event->data[2] == MODULE_ALREADY_UP)) ?
|
||||
"Bring-up succeed" : "Bring-up failed");
|
||||
|
||||
if (event->length > 3 && event->data[3])
|
||||
priv->btmrvl_dev.dev_type = HCI_AMP;
|
||||
else
|
||||
priv->btmrvl_dev.dev_type = HCI_PRIMARY;
|
||||
|
||||
BT_DBG("dev_type: %d", priv->btmrvl_dev.dev_type);
|
||||
} else if (priv->btmrvl_dev.sendcmdflag &&
|
||||
event->data[1] == MODULE_SHUTDOWN_REQ) {
|
||||
BT_DBG("EVENT:%s", (event->data[2]) ?
|
||||
@ -686,8 +679,6 @@ int btmrvl_register_hdev(struct btmrvl_private *priv)
|
||||
hdev->wakeup = btmrvl_wakeup;
|
||||
SET_HCIDEV_DEV(hdev, &card->func->dev);
|
||||
|
||||
hdev->dev_type = priv->btmrvl_dev.dev_type;
|
||||
|
||||
ret = hci_register_dev(hdev);
|
||||
if (ret < 0) {
|
||||
BT_ERR("Can not register HCI device");
|
||||
|
@ -13,8 +13,6 @@
|
||||
|
||||
#include "btqca.h"
|
||||
|
||||
#define VERSION "0.1"
|
||||
|
||||
int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
|
||||
enum qca_btsoc_type soc_type)
|
||||
{
|
||||
@ -55,11 +53,6 @@ int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
|
||||
}
|
||||
|
||||
edl = (struct edl_event_hdr *)(skb->data);
|
||||
if (!edl) {
|
||||
bt_dev_err(hdev, "QCA TLV with no header");
|
||||
err = -EILSEQ;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (edl->cresp != EDL_CMD_REQ_RES_EVT ||
|
||||
edl->rtype != rtype) {
|
||||
@ -121,11 +114,6 @@ static int qca_read_fw_build_info(struct hci_dev *hdev)
|
||||
}
|
||||
|
||||
edl = (struct edl_event_hdr *)(skb->data);
|
||||
if (!edl) {
|
||||
bt_dev_err(hdev, "QCA read fw build info with no header");
|
||||
err = -EILSEQ;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (edl->cresp != EDL_CMD_REQ_RES_EVT ||
|
||||
edl->rtype != EDL_GET_BUILD_INFO_CMD) {
|
||||
@ -148,8 +136,10 @@ static int qca_read_fw_build_info(struct hci_dev *hdev)
|
||||
}
|
||||
|
||||
build_label = kstrndup(&edl->data[1], build_lbl_len, GFP_KERNEL);
|
||||
if (!build_label)
|
||||
if (!build_label) {
|
||||
err = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
hci_set_fw_info(hdev, "%s", build_label);
|
||||
|
||||
@ -183,11 +173,6 @@ static int qca_send_patch_config_cmd(struct hci_dev *hdev)
|
||||
}
|
||||
|
||||
edl = (struct edl_event_hdr *)(skb->data);
|
||||
if (!edl) {
|
||||
bt_dev_err(hdev, "QCA Patch config with no header");
|
||||
err = -EILSEQ;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (edl->cresp != EDL_PATCH_CONFIG_RES_EVT || edl->rtype != EDL_PATCH_CONFIG_CMD) {
|
||||
bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl->cresp,
|
||||
@ -502,11 +487,6 @@ static int qca_tlv_send_segment(struct hci_dev *hdev, int seg_size,
|
||||
}
|
||||
|
||||
edl = (struct edl_event_hdr *)(skb->data);
|
||||
if (!edl) {
|
||||
bt_dev_err(hdev, "TLV with no header");
|
||||
err = -EILSEQ;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (edl->cresp != EDL_CMD_REQ_RES_EVT || edl->rtype != rtype) {
|
||||
bt_dev_err(hdev, "QCA TLV with error stat 0x%x rtype 0x%x",
|
||||
@ -737,6 +717,19 @@ static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size,
|
||||
snprintf(fwname, max_size, "qca/hpnv%02x%s.%x", rom_ver, variant, bid);
|
||||
}
|
||||
|
||||
static inline void qca_get_nvm_name_generic(struct qca_fw_config *cfg,
|
||||
const char *stem, u8 rom_ver, u16 bid)
|
||||
{
|
||||
if (bid == 0x0)
|
||||
snprintf(cfg->fwname, sizeof(cfg->fwname), "qca/%snv%02x.bin", stem, rom_ver);
|
||||
else if (bid & 0xff00)
|
||||
snprintf(cfg->fwname, sizeof(cfg->fwname),
|
||||
"qca/%snv%02x.b%x", stem, rom_ver, bid);
|
||||
else
|
||||
snprintf(cfg->fwname, sizeof(cfg->fwname),
|
||||
"qca/%snv%02x.b%02x", stem, rom_ver, bid);
|
||||
}
|
||||
|
||||
int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
|
||||
enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,
|
||||
const char *firmware_name)
|
||||
@ -817,7 +810,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
|
||||
/* Give the controller some time to get ready to receive the NVM */
|
||||
msleep(10);
|
||||
|
||||
if (soc_type == QCA_QCA2066)
|
||||
if (soc_type == QCA_QCA2066 || soc_type == QCA_WCN7850)
|
||||
qca_read_fw_board_id(hdev, &boardid);
|
||||
|
||||
/* Download NVM configuration */
|
||||
@ -859,8 +852,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
|
||||
"qca/hpnv%02x.bin", rom_ver);
|
||||
break;
|
||||
case QCA_WCN7850:
|
||||
snprintf(config.fwname, sizeof(config.fwname),
|
||||
"qca/hmtnv%02x.bin", rom_ver);
|
||||
qca_get_nvm_name_generic(&config, "hmt", rom_ver, boardid);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -961,6 +953,5 @@ EXPORT_SYMBOL_GPL(qca_set_bdaddr);
|
||||
|
||||
|
||||
MODULE_AUTHOR("Ben Young Tae Kim <ytkim@qca.qualcomm.com>");
|
||||
MODULE_DESCRIPTION("Bluetooth support for Qualcomm Atheros family ver " VERSION);
|
||||
MODULE_VERSION(VERSION);
|
||||
MODULE_DESCRIPTION("Bluetooth support for Qualcomm Atheros family");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
@ -5,33 +5,33 @@
|
||||
* Copyright (c) 2015 The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#define EDL_PATCH_CMD_OPCODE (0xFC00)
|
||||
#define EDL_NVM_ACCESS_OPCODE (0xFC0B)
|
||||
#define EDL_WRITE_BD_ADDR_OPCODE (0xFC14)
|
||||
#define EDL_PATCH_CMD_LEN (1)
|
||||
#define EDL_PATCH_VER_REQ_CMD (0x19)
|
||||
#define EDL_PATCH_TLV_REQ_CMD (0x1E)
|
||||
#define EDL_GET_BUILD_INFO_CMD (0x20)
|
||||
#define EDL_GET_BID_REQ_CMD (0x23)
|
||||
#define EDL_NVM_ACCESS_SET_REQ_CMD (0x01)
|
||||
#define EDL_PATCH_CONFIG_CMD (0x28)
|
||||
#define MAX_SIZE_PER_TLV_SEGMENT (243)
|
||||
#define QCA_PRE_SHUTDOWN_CMD (0xFC08)
|
||||
#define QCA_DISABLE_LOGGING (0xFC17)
|
||||
#define EDL_PATCH_CMD_OPCODE 0xFC00
|
||||
#define EDL_NVM_ACCESS_OPCODE 0xFC0B
|
||||
#define EDL_WRITE_BD_ADDR_OPCODE 0xFC14
|
||||
#define EDL_PATCH_CMD_LEN 1
|
||||
#define EDL_PATCH_VER_REQ_CMD 0x19
|
||||
#define EDL_PATCH_TLV_REQ_CMD 0x1E
|
||||
#define EDL_GET_BUILD_INFO_CMD 0x20
|
||||
#define EDL_GET_BID_REQ_CMD 0x23
|
||||
#define EDL_NVM_ACCESS_SET_REQ_CMD 0x01
|
||||
#define EDL_PATCH_CONFIG_CMD 0x28
|
||||
#define MAX_SIZE_PER_TLV_SEGMENT 243
|
||||
#define QCA_PRE_SHUTDOWN_CMD 0xFC08
|
||||
#define QCA_DISABLE_LOGGING 0xFC17
|
||||
|
||||
#define EDL_CMD_REQ_RES_EVT (0x00)
|
||||
#define EDL_PATCH_VER_RES_EVT (0x19)
|
||||
#define EDL_APP_VER_RES_EVT (0x02)
|
||||
#define EDL_TVL_DNLD_RES_EVT (0x04)
|
||||
#define EDL_CMD_EXE_STATUS_EVT (0x00)
|
||||
#define EDL_SET_BAUDRATE_RSP_EVT (0x92)
|
||||
#define EDL_NVM_ACCESS_CODE_EVT (0x0B)
|
||||
#define EDL_PATCH_CONFIG_RES_EVT (0x00)
|
||||
#define QCA_DISABLE_LOGGING_SUB_OP (0x14)
|
||||
#define EDL_CMD_REQ_RES_EVT 0x00
|
||||
#define EDL_PATCH_VER_RES_EVT 0x19
|
||||
#define EDL_APP_VER_RES_EVT 0x02
|
||||
#define EDL_TVL_DNLD_RES_EVT 0x04
|
||||
#define EDL_CMD_EXE_STATUS_EVT 0x00
|
||||
#define EDL_SET_BAUDRATE_RSP_EVT 0x92
|
||||
#define EDL_NVM_ACCESS_CODE_EVT 0x0B
|
||||
#define EDL_PATCH_CONFIG_RES_EVT 0x00
|
||||
#define QCA_DISABLE_LOGGING_SUB_OP 0x14
|
||||
|
||||
#define EDL_TAG_ID_BD_ADDR 2
|
||||
#define EDL_TAG_ID_HCI (17)
|
||||
#define EDL_TAG_ID_DEEP_SLEEP (27)
|
||||
#define EDL_TAG_ID_HCI 17
|
||||
#define EDL_TAG_ID_DEEP_SLEEP 27
|
||||
|
||||
#define QCA_WCN3990_POWERON_PULSE 0xFC
|
||||
#define QCA_WCN3990_POWEROFF_PULSE 0xC0
|
||||
@ -39,7 +39,7 @@
|
||||
#define QCA_HCI_CC_OPCODE 0xFC00
|
||||
#define QCA_HCI_CC_SUCCESS 0x00
|
||||
|
||||
#define QCA_WCN3991_SOC_ID (0x40014320)
|
||||
#define QCA_WCN3991_SOC_ID 0x40014320
|
||||
|
||||
/* QCA chipset version can be decided by patch and SoC
|
||||
* version, combination with upper 2 bytes from SoC
|
||||
@ -48,11 +48,11 @@
|
||||
#define get_soc_ver(soc_id, rom_ver) \
|
||||
((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver)))
|
||||
|
||||
#define QCA_HSP_GF_SOC_ID 0x1200
|
||||
#define QCA_HSP_GF_SOC_MASK 0x0000ff00
|
||||
#define QCA_HSP_GF_SOC_ID 0x1200
|
||||
#define QCA_HSP_GF_SOC_MASK 0x0000ff00
|
||||
|
||||
enum qca_baudrate {
|
||||
QCA_BAUDRATE_115200 = 0,
|
||||
QCA_BAUDRATE_115200 = 0,
|
||||
QCA_BAUDRATE_57600,
|
||||
QCA_BAUDRATE_38400,
|
||||
QCA_BAUDRATE_19200,
|
||||
@ -71,7 +71,7 @@ enum qca_baudrate {
|
||||
QCA_BAUDRATE_1600000,
|
||||
QCA_BAUDRATE_3200000,
|
||||
QCA_BAUDRATE_3500000,
|
||||
QCA_BAUDRATE_AUTO = 0xFE,
|
||||
QCA_BAUDRATE_AUTO = 0xFE,
|
||||
QCA_BAUDRATE_RESERVED
|
||||
};
|
||||
|
||||
|
@ -197,7 +197,7 @@ destroy_acl_channel:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int btqcomsmd_remove(struct platform_device *pdev)
|
||||
static void btqcomsmd_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct btqcomsmd *btq = platform_get_drvdata(pdev);
|
||||
|
||||
@ -206,8 +206,6 @@ static int btqcomsmd_remove(struct platform_device *pdev)
|
||||
|
||||
rpmsg_destroy_ept(btq->cmd_channel);
|
||||
rpmsg_destroy_ept(btq->acl_channel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id btqcomsmd_of_match[] = {
|
||||
@ -218,7 +216,7 @@ MODULE_DEVICE_TABLE(of, btqcomsmd_of_match);
|
||||
|
||||
static struct platform_driver btqcomsmd_driver = {
|
||||
.probe = btqcomsmd_probe,
|
||||
.remove = btqcomsmd_remove,
|
||||
.remove_new = btqcomsmd_remove,
|
||||
.driver = {
|
||||
.name = "btqcomsmd",
|
||||
.of_match_table = btqcomsmd_of_match,
|
||||
|
@ -134,7 +134,6 @@ static int rsi_hci_attach(void *priv, struct rsi_proto_ops *ops)
|
||||
hdev->bus = HCI_USB;
|
||||
|
||||
hci_set_drvdata(hdev, h_adapter);
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
hdev->open = rsi_hci_open;
|
||||
hdev->close = rsi_hci_close;
|
||||
hdev->flush = rsi_hci_flush;
|
||||
|
@ -1339,6 +1339,13 @@ int btrtl_setup_realtek(struct hci_dev *hdev)
|
||||
|
||||
btrtl_set_quirks(hdev, btrtl_dev);
|
||||
|
||||
hci_set_hw_info(hdev,
|
||||
"RTL lmp_subver=%u hci_rev=%u hci_ver=%u hci_bus=%u",
|
||||
btrtl_dev->ic_info->lmp_subver,
|
||||
btrtl_dev->ic_info->hci_rev,
|
||||
btrtl_dev->ic_info->hci_ver,
|
||||
btrtl_dev->ic_info->hci_bus);
|
||||
|
||||
btrtl_free(btrtl_dev);
|
||||
return ret;
|
||||
}
|
||||
|
@ -32,9 +32,6 @@ static const struct sdio_device_id btsdio_table[] = {
|
||||
/* Generic Bluetooth Type-B SDIO device */
|
||||
{ SDIO_DEVICE_CLASS(SDIO_CLASS_BT_B) },
|
||||
|
||||
/* Generic Bluetooth AMP controller */
|
||||
{ SDIO_DEVICE_CLASS(SDIO_CLASS_BT_AMP) },
|
||||
|
||||
{ } /* Terminating entry */
|
||||
};
|
||||
|
||||
@ -319,11 +316,6 @@ static int btsdio_probe(struct sdio_func *func,
|
||||
hdev->bus = HCI_SDIO;
|
||||
hci_set_drvdata(hdev, data);
|
||||
|
||||
if (id->class == SDIO_CLASS_BT_AMP)
|
||||
hdev->dev_type = HCI_AMP;
|
||||
else
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
|
||||
data->hdev = hdev;
|
||||
|
||||
SET_HCIDEV_DEV(hdev, &func->dev);
|
||||
|
@ -477,6 +477,7 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x8087, 0x0033), .driver_info = BTUSB_INTEL_COMBINED },
|
||||
{ USB_DEVICE(0x8087, 0x0035), .driver_info = BTUSB_INTEL_COMBINED },
|
||||
{ USB_DEVICE(0x8087, 0x0036), .driver_info = BTUSB_INTEL_COMBINED },
|
||||
{ USB_DEVICE(0x8087, 0x0037), .driver_info = BTUSB_INTEL_COMBINED },
|
||||
{ USB_DEVICE(0x8087, 0x0038), .driver_info = BTUSB_INTEL_COMBINED },
|
||||
{ USB_DEVICE(0x8087, 0x07da), .driver_info = BTUSB_CSR },
|
||||
{ USB_DEVICE(0x8087, 0x07dc), .driver_info = BTUSB_INTEL_COMBINED |
|
||||
@ -588,6 +589,9 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x0489, 0xe0c8), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0489, 0xe0e0), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
@ -597,6 +601,9 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x04ca, 0x3802), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0e8d, 0x0608), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3563), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
@ -612,10 +619,12 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x13d3, 0x3583), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK |
|
||||
{ USB_DEVICE(0x13d3, 0x3606), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0e8d, 0x0608), .driver_info = BTUSB_MEDIATEK |
|
||||
|
||||
/* MediaTek MT7922 Bluetooth devices */
|
||||
{ USB_DEVICE(0x13d3, 0x3585), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
|
||||
@ -626,12 +635,6 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x0489, 0xe0d9), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0489, 0xe0f5), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3568), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x0489, 0xe0e2), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
@ -656,14 +659,38 @@ static const struct usb_device_id quirks_table[] = {
|
||||
{ USB_DEVICE(0x04ca, 0x3804), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x04ca, 0x38e4), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3568), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3605), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3607), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3614), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3615), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x35f5, 0x7922), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
|
||||
/* Additional MediaTek MT7925 Bluetooth devices */
|
||||
{ USB_DEVICE(0x0489, 0xe113), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3602), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
{ USB_DEVICE(0x13d3, 0x3603), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH |
|
||||
BTUSB_VALID_LE_STATES },
|
||||
|
||||
/* Additional Realtek 8723AE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0930, 0x021d), .driver_info = BTUSB_REALTEK },
|
||||
@ -2951,7 +2978,7 @@ static int btusb_mtk_uhw_reg_read(struct btusb_data *data, u32 reg, u32 *val)
|
||||
err = usb_control_msg(data->udev, pipe, 0x01,
|
||||
0xDE,
|
||||
reg >> 16, reg & 0xffff,
|
||||
buf, 4, USB_CTRL_SET_TIMEOUT);
|
||||
buf, 4, USB_CTRL_GET_TIMEOUT);
|
||||
if (err < 0) {
|
||||
bt_dev_err(hdev, "Failed to read uhw reg(%d)", err);
|
||||
goto err_free_buf;
|
||||
@ -2979,7 +3006,7 @@ static int btusb_mtk_reg_read(struct btusb_data *data, u32 reg, u32 *val)
|
||||
err = usb_control_msg(data->udev, pipe, 0x63,
|
||||
USB_TYPE_VENDOR | USB_DIR_IN,
|
||||
reg >> 16, reg & 0xffff,
|
||||
buf, size, USB_CTRL_SET_TIMEOUT);
|
||||
buf, size, USB_CTRL_GET_TIMEOUT);
|
||||
if (err < 0)
|
||||
goto err_free_buf;
|
||||
|
||||
@ -3118,6 +3145,7 @@ static int btusb_mtk_setup(struct hci_dev *hdev)
|
||||
bt_dev_err(hdev, "Failed to get fw flavor (%d)", err);
|
||||
return err;
|
||||
}
|
||||
fw_flavor = (fw_flavor & 0x00000080) >> 7;
|
||||
}
|
||||
|
||||
mediatek = hci_get_priv(hdev);
|
||||
@ -3693,7 +3721,7 @@ static int btusb_qca_send_vendor_req(struct usb_device *udev, u8 request,
|
||||
*/
|
||||
pipe = usb_rcvctrlpipe(udev, 0);
|
||||
err = usb_control_msg(udev, pipe, request, USB_TYPE_VENDOR | USB_DIR_IN,
|
||||
0, 0, buf, size, USB_CTRL_SET_TIMEOUT);
|
||||
0, 0, buf, size, USB_CTRL_GET_TIMEOUT);
|
||||
if (err < 0) {
|
||||
dev_err(&udev->dev, "Failed to access otp area (%d)", err);
|
||||
goto done;
|
||||
@ -4331,11 +4359,6 @@ static int btusb_probe(struct usb_interface *intf,
|
||||
hdev->bus = HCI_USB;
|
||||
hci_set_drvdata(hdev, data);
|
||||
|
||||
if (id->driver_info & BTUSB_AMP)
|
||||
hdev->dev_type = HCI_AMP;
|
||||
else
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
|
||||
data->hdev = hdev;
|
||||
|
||||
SET_HCIDEV_DEV(hdev, &intf->dev);
|
||||
|
@ -1293,7 +1293,7 @@ static int bcm_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm_remove(struct platform_device *pdev)
|
||||
static void bcm_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct bcm_device *dev = platform_get_drvdata(pdev);
|
||||
|
||||
@ -1302,8 +1302,6 @@ static int bcm_remove(struct platform_device *pdev)
|
||||
mutex_unlock(&bcm_device_lock);
|
||||
|
||||
dev_info(&pdev->dev, "%s device unregistered.\n", dev->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct hci_uart_proto bcm_proto = {
|
||||
@ -1487,7 +1485,7 @@ static const struct acpi_device_id bcm_acpi_match[] = {
|
||||
{ "BCM2EA1" },
|
||||
{ "BCM2EA2", (long)&bcm43430_device_data },
|
||||
{ "BCM2EA3", (long)&bcm43430_device_data },
|
||||
{ "BCM2EA4" },
|
||||
{ "BCM2EA4", (long)&bcm43430_device_data }, /* bcm43455 */
|
||||
{ "BCM2EA5" },
|
||||
{ "BCM2EA6" },
|
||||
{ "BCM2EA7" },
|
||||
@ -1509,7 +1507,7 @@ static const struct dev_pm_ops bcm_pm_ops = {
|
||||
|
||||
static struct platform_driver bcm_driver = {
|
||||
.probe = bcm_probe,
|
||||
.remove = bcm_remove,
|
||||
.remove_new = bcm_remove,
|
||||
.driver = {
|
||||
.name = "hci_bcm",
|
||||
.acpi_match_table = ACPI_PTR(bcm_acpi_match),
|
||||
|
@ -2361,7 +2361,6 @@ static int bcm4377_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
bcm4377->hdev = hdev;
|
||||
|
||||
hdev->bus = HCI_PCI;
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
hdev->open = bcm4377_hci_open;
|
||||
hdev->close = bcm4377_hci_close;
|
||||
hdev->send = bcm4377_hci_send_frame;
|
||||
|
@ -537,7 +537,7 @@ static int intel_setup(struct hci_uart *hu)
|
||||
int speed_change = 0;
|
||||
int err;
|
||||
|
||||
bt_dev_dbg(hdev, "start intel_setup");
|
||||
bt_dev_dbg(hdev, "");
|
||||
|
||||
hu->hdev->set_diag = btintel_set_diag;
|
||||
hu->hdev->set_bdaddr = btintel_set_bdaddr;
|
||||
@ -591,12 +591,12 @@ static int intel_setup(struct hci_uart *hu)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Check for supported iBT hardware variants of this firmware
|
||||
* loading method.
|
||||
*
|
||||
* This check has been put in place to ensure correct forward
|
||||
* compatibility options when newer hardware variants come along.
|
||||
*/
|
||||
/* Check for supported iBT hardware variants of this firmware
|
||||
* loading method.
|
||||
*
|
||||
* This check has been put in place to ensure correct forward
|
||||
* compatibility options when newer hardware variants come along.
|
||||
*/
|
||||
switch (ver.hw_variant) {
|
||||
case 0x0b: /* LnP */
|
||||
case 0x0c: /* WsP */
|
||||
@ -777,7 +777,7 @@ static int intel_setup(struct hci_uart *hu)
|
||||
|
||||
rettime = ktime_get();
|
||||
delta = ktime_sub(rettime, calltime);
|
||||
duration = (unsigned long long) ktime_to_ns(delta) >> 10;
|
||||
duration = (unsigned long long)ktime_to_ns(delta) >> 10;
|
||||
|
||||
bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
|
||||
|
||||
@ -822,7 +822,7 @@ done:
|
||||
|
||||
rettime = ktime_get();
|
||||
delta = ktime_sub(rettime, calltime);
|
||||
duration = (unsigned long long) ktime_to_ns(delta) >> 10;
|
||||
duration = (unsigned long long)ktime_to_ns(delta) >> 10;
|
||||
|
||||
bt_dev_info(hdev, "Device booted in %llu usecs", duration);
|
||||
|
||||
@ -977,6 +977,7 @@ static int intel_recv(struct hci_uart *hu, const void *data, int count)
|
||||
ARRAY_SIZE(intel_recv_pkts));
|
||||
if (IS_ERR(intel->rx_skb)) {
|
||||
int err = PTR_ERR(intel->rx_skb);
|
||||
|
||||
bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
|
||||
intel->rx_skb = NULL;
|
||||
return err;
|
||||
@ -1190,7 +1191,7 @@ no_irq:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_remove(struct platform_device *pdev)
|
||||
static void intel_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct intel_device *idev = platform_get_drvdata(pdev);
|
||||
|
||||
@ -1201,13 +1202,11 @@ static int intel_remove(struct platform_device *pdev)
|
||||
mutex_unlock(&intel_device_list_lock);
|
||||
|
||||
dev_info(&pdev->dev, "unregistered.\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver intel_driver = {
|
||||
.probe = intel_probe,
|
||||
.remove = intel_remove,
|
||||
.remove_new = intel_remove,
|
||||
.driver = {
|
||||
.name = "hci_intel",
|
||||
.acpi_match_table = ACPI_PTR(intel_acpi_match),
|
||||
|
@ -667,11 +667,6 @@ static int hci_uart_register_dev(struct hci_uart *hu)
|
||||
if (!test_bit(HCI_UART_RESET_ON_INIT, &hu->hdev_flags))
|
||||
set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
|
||||
|
||||
if (test_bit(HCI_UART_CREATE_AMP, &hu->hdev_flags))
|
||||
hdev->dev_type = HCI_AMP;
|
||||
else
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
|
||||
/* Only call open() for the protocol after hdev is fully initialized as
|
||||
* open() (or a timer/workqueue it starts) may attempt to reference it.
|
||||
*/
|
||||
@ -722,7 +717,6 @@ static int hci_uart_set_flags(struct hci_uart *hu, unsigned long flags)
|
||||
{
|
||||
unsigned long valid_flags = BIT(HCI_UART_RAW_DEVICE) |
|
||||
BIT(HCI_UART_RESET_ON_INIT) |
|
||||
BIT(HCI_UART_CREATE_AMP) |
|
||||
BIT(HCI_UART_INIT_PENDING) |
|
||||
BIT(HCI_UART_EXT_CONFIG) |
|
||||
BIT(HCI_UART_VND_DETECT);
|
||||
|
@ -366,11 +366,6 @@ int hci_uart_register_device_priv(struct hci_uart *hu,
|
||||
if (test_bit(HCI_UART_EXT_CONFIG, &hu->hdev_flags))
|
||||
set_bit(HCI_QUIRK_EXTERNAL_CONFIG, &hdev->quirks);
|
||||
|
||||
if (test_bit(HCI_UART_CREATE_AMP, &hu->hdev_flags))
|
||||
hdev->dev_type = HCI_AMP;
|
||||
else
|
||||
hdev->dev_type = HCI_PRIMARY;
|
||||
|
||||
if (test_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags))
|
||||
return 0;
|
||||
|
||||
|
@ -37,7 +37,6 @@
|
||||
|
||||
#define HCI_UART_RAW_DEVICE 0
|
||||
#define HCI_UART_RESET_ON_INIT 1
|
||||
#define HCI_UART_CREATE_AMP 2
|
||||
#define HCI_UART_INIT_PENDING 3
|
||||
#define HCI_UART_EXT_CONFIG 4
|
||||
#define HCI_UART_VND_DETECT 5
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user