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clk: qcom: gcc-msm8996: move clock parent tables down

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Move clock parent tables down, after the GPLL declrataions, so that we
can use gpll hw clock fields in the next commit.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211228045415.20543-15-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2021-12-28 07:54:13 +03:00 committed by Bjorn Andersson
parent b554a687b4
commit 1a2789cff0
1 changed files with 92 additions and 92 deletions
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184
drivers/clk/qcom/gcc-msm8996.c
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@ -33,98 +33,6 @@ enum {
P_AUD_REF_CLK,
};
static const struct parent_map gcc_sleep_clk_map[] = {
{ P_SLEEP_CLK, 5 }
};
static const char * const gcc_sleep_clk[] = {
"sleep_clk"
};
static const struct parent_map gcc_xo_gpll0_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 }
};
static const char * const gcc_xo_gpll0[] = {
"xo",
"gpll0"
};
static const struct parent_map gcc_xo_sleep_clk_map[] = {
{ P_XO, 0 },
{ P_SLEEP_CLK, 5 }
};
static const char * const gcc_xo_sleep_clk[] = {
"xo",
"sleep_clk"
};
static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_gpll0_early_div[] = {
"xo",
"gpll0",
"gpll0_early_div"
};
static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL4, 5 }
};
static const char * const gcc_xo_gpll0_gpll4[] = {
"xo",
"gpll0",
"gpll4"
};
static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_AUD_REF_CLK, 2 }
};
static const char * const gcc_xo_gpll0_aud_ref_clk[] = {
"xo",
"gpll0",
"aud_ref_clk"
};
static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = {
"xo",
"gpll0",
"sleep_clk",
"gpll0_early_div"
};
static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL4, 5 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = {
"xo",
"gpll0",
"gpll4",
"gpll0_early_div"
};
static struct clk_fixed_factor xo = {
.mult = 1,
.div = 1,
@ -229,6 +137,98 @@ static struct clk_alpha_pll_postdiv gpll4 = {
},
};
static const struct parent_map gcc_sleep_clk_map[] = {
{ P_SLEEP_CLK, 5 }
};
static const char * const gcc_sleep_clk[] = {
"sleep_clk"
};
static const struct parent_map gcc_xo_gpll0_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 }
};
static const char * const gcc_xo_gpll0[] = {
"xo",
"gpll0"
};
static const struct parent_map gcc_xo_sleep_clk_map[] = {
{ P_XO, 0 },
{ P_SLEEP_CLK, 5 }
};
static const char * const gcc_xo_sleep_clk[] = {
"xo",
"sleep_clk"
};
static const struct parent_map gcc_xo_gpll0_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_gpll0_early_div[] = {
"xo",
"gpll0",
"gpll0_early_div"
};
static const struct parent_map gcc_xo_gpll0_gpll4_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL4, 5 }
};
static const char * const gcc_xo_gpll0_gpll4[] = {
"xo",
"gpll0",
"gpll4"
};
static const struct parent_map gcc_xo_gpll0_aud_ref_clk_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_AUD_REF_CLK, 2 }
};
static const char * const gcc_xo_gpll0_aud_ref_clk[] = {
"xo",
"gpll0",
"aud_ref_clk"
};
static const struct parent_map gcc_xo_gpll0_sleep_clk_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_sleep_clk_gpll0_early_div[] = {
"xo",
"gpll0",
"sleep_clk",
"gpll0_early_div"
};
static const struct parent_map gcc_xo_gpll0_gpll4_gpll0_early_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 1 },
{ P_GPLL4, 5 },
{ P_GPLL0_EARLY_DIV, 6 }
};
static const char * const gcc_xo_gpll0_gpll4_gpll0_early_div[] = {
"xo",
"gpll0",
"gpll4",
"gpll0_early_div"
};
static const struct freq_tbl ftbl_system_noc_clk_src[] = {
F(19200000, P_XO, 1, 0, 0),
F(50000000, P_GPLL0_EARLY_DIV, 6, 0, 0),