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r8169: fix RTL8168g PHY init

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This fixes a copy&paste error in the original patch. Setting the wrong
register resulted in massive packet loss on some systems.

Fixes: a2928d2864 ("r8169: use paged versions of phylib MDIO access functions")
Tested-by: Thomas Voegtle <tv@lio96.de>
Signed-off-by: Thomas Voegtle <tv@lio96.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Thomas Voegtle 2019-07-20 19:01:22 +02:00 committed by David S. Miller
parent 89099d855b
commit 1a03bb5329
1 changed files with 2 additions and 2 deletions
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4
drivers/net/ethernet/realtek/r8169_main.c
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@ -3251,9 +3251,9 @@ static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
ret = phy_read_paged(tp->phydev, 0x0a46, 0x13);
if (ret & BIT(8))
phy_modify_paged(tp->phydev, 0x0c41, 0x12, 0, BIT(1));
phy_modify_paged(tp->phydev, 0x0c41, 0x15, 0, BIT(1));
else
phy_modify_paged(tp->phydev, 0x0c41, 0x12, BIT(1), 0);
phy_modify_paged(tp->phydev, 0x0c41, 0x15, BIT(1), 0);
/* Enable PHY auto speed down */
phy_modify_paged(tp->phydev, 0x0a44, 0x11, 0, BIT(3) | BIT(2));