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davinci: DA8XX/OMAP-L1XX: add support for cpuidle driver register
This patch provides a function to help register cpuidle driver on da8xx/omap-l1xx platforms. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -19,6 +19,7 @@
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#include <mach/common.h>
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#include <mach/time.h>
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#include <mach/da8xx.h>
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#include <mach/cpuidle.h>
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#include "clock.h"
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@ -486,3 +487,32 @@ int da8xx_register_rtc(void)
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return platform_device_register(&da8xx_rtc_device);
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}
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static struct resource da8xx_cpuidle_resources[] = {
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{
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.start = DA8XX_DDR2_CTL_BASE,
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.end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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/* DA8XX devices support DDR2 power down */
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static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
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.ddr2_pdown = 1,
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};
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static struct platform_device da8xx_cpuidle_device = {
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.name = "cpuidle-davinci",
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.num_resources = ARRAY_SIZE(da8xx_cpuidle_resources),
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.resource = da8xx_cpuidle_resources,
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.dev = {
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.platform_data = &da8xx_cpuidle_pdata,
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},
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};
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int __init da8xx_register_cpuidle(void)
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{
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return platform_device_register(&da8xx_cpuidle_device);
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}
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@ -52,6 +52,7 @@ extern void __iomem *da8xx_syscfg_base;
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#define DA8XX_AEMIF_CS2_BASE 0x60000000
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#define DA8XX_AEMIF_CS3_BASE 0x62000000
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#define DA8XX_AEMIF_CTL_BASE 0x68000000
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#define DA8XX_DDR2_CTL_BASE 0xb0000000
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#define PINMUX0 0x00
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#define PINMUX1 0x04
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@ -88,6 +89,7 @@ int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
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void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
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int da8xx_register_rtc(void);
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int da850_register_cpufreq(void);
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int da8xx_register_cpuidle(void);
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extern struct platform_device da8xx_serial_device;
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extern struct emac_platform_data da8xx_emac_pdata;
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