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bus: mhi: core: Add support for data transfer
Add support for transferring data between external modem and host processor using MHI protocol. This is based on the patch submitted by Sujeev Dias: https://lkml.org/lkml/2018/7/9/988 Signed-off-by: Sujeev Dias <sdias@codeaurora.org> Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org> [mani: splitted the data transfer patch and cleaned up for upstream] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Tested-by: Jeffrey Hugo <jhugo@codeaurora.org> Link: https://lore.kernel.org/r/20200220095854.4804-12-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Manivannan Sadhasivam
Greg Kroah-Hartman
parent
1d3173a3ba
commit
189ff97cca
@ -491,6 +491,73 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl)
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return 0;
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}
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void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan)
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{
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struct mhi_ring *buf_ring;
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struct mhi_ring *tre_ring;
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struct mhi_chan_ctxt *chan_ctxt;
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buf_ring = &mhi_chan->buf_ring;
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tre_ring = &mhi_chan->tre_ring;
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chan_ctxt = &mhi_cntrl->mhi_ctxt->chan_ctxt[mhi_chan->chan];
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mhi_free_coherent(mhi_cntrl, tre_ring->alloc_size,
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tre_ring->pre_aligned, tre_ring->dma_handle);
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vfree(buf_ring->base);
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buf_ring->base = tre_ring->base = NULL;
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chan_ctxt->rbase = 0;
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}
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int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan)
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{
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struct mhi_ring *buf_ring;
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struct mhi_ring *tre_ring;
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struct mhi_chan_ctxt *chan_ctxt;
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u32 tmp;
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int ret;
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buf_ring = &mhi_chan->buf_ring;
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tre_ring = &mhi_chan->tre_ring;
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tre_ring->el_size = sizeof(struct mhi_tre);
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tre_ring->len = tre_ring->el_size * tre_ring->elements;
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chan_ctxt = &mhi_cntrl->mhi_ctxt->chan_ctxt[mhi_chan->chan];
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ret = mhi_alloc_aligned_ring(mhi_cntrl, tre_ring, tre_ring->len);
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if (ret)
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return -ENOMEM;
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buf_ring->el_size = sizeof(struct mhi_buf_info);
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buf_ring->len = buf_ring->el_size * buf_ring->elements;
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buf_ring->base = vzalloc(buf_ring->len);
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if (!buf_ring->base) {
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mhi_free_coherent(mhi_cntrl, tre_ring->alloc_size,
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tre_ring->pre_aligned, tre_ring->dma_handle);
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return -ENOMEM;
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}
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tmp = chan_ctxt->chcfg;
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tmp &= ~CHAN_CTX_CHSTATE_MASK;
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tmp |= (MHI_CH_STATE_ENABLED << CHAN_CTX_CHSTATE_SHIFT);
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chan_ctxt->chcfg = tmp;
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chan_ctxt->rbase = tre_ring->iommu_base;
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chan_ctxt->rp = chan_ctxt->wp = chan_ctxt->rbase;
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chan_ctxt->rlen = tre_ring->len;
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tre_ring->ctxt_wp = &chan_ctxt->wp;
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tre_ring->rp = tre_ring->wp = tre_ring->base;
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buf_ring->rp = buf_ring->wp = buf_ring->base;
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mhi_chan->db_cfg.db_mode = 1;
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/* Update to all cores */
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smp_wmb();
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return 0;
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}
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static int parse_ev_cfg(struct mhi_controller *mhi_cntrl,
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struct mhi_controller_config *config)
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{
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@ -799,6 +866,14 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl,
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rwlock_init(&mhi_chan->lock);
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}
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if (mhi_cntrl->bounce_buf) {
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mhi_cntrl->map_single = mhi_map_single_use_bb;
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mhi_cntrl->unmap_single = mhi_unmap_single_use_bb;
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} else {
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mhi_cntrl->map_single = mhi_map_single_no_bb;
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mhi_cntrl->unmap_single = mhi_unmap_single_no_bb;
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}
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/* Register controller with MHI bus */
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mhi_dev = mhi_alloc_device(mhi_cntrl);
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if (IS_ERR(mhi_dev)) {
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@ -969,6 +1044,14 @@ static int mhi_driver_probe(struct device *dev)
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struct mhi_event *mhi_event;
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struct mhi_chan *ul_chan = mhi_dev->ul_chan;
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struct mhi_chan *dl_chan = mhi_dev->dl_chan;
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int ret;
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/* Bring device out of LPM */
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ret = mhi_device_get_sync(mhi_dev);
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if (ret)
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return ret;
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ret = -EINVAL;
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if (ul_chan) {
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/*
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@ -976,13 +1059,18 @@ static int mhi_driver_probe(struct device *dev)
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* be provided
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*/
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if (ul_chan->lpm_notify && !mhi_drv->status_cb)
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return -EINVAL;
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goto exit_probe;
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/* For non-offload channels then xfer_cb should be provided */
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if (!ul_chan->offload_ch && !mhi_drv->ul_xfer_cb)
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return -EINVAL;
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goto exit_probe;
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ul_chan->xfer_cb = mhi_drv->ul_xfer_cb;
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if (ul_chan->auto_start) {
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ret = mhi_prepare_channel(mhi_cntrl, ul_chan);
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if (ret)
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goto exit_probe;
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}
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}
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if (dl_chan) {
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@ -991,11 +1079,11 @@ static int mhi_driver_probe(struct device *dev)
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* be provided
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*/
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if (dl_chan->lpm_notify && !mhi_drv->status_cb)
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return -EINVAL;
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goto exit_probe;
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/* For non-offload channels then xfer_cb should be provided */
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if (!dl_chan->offload_ch && !mhi_drv->dl_xfer_cb)
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return -EINVAL;
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goto exit_probe;
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mhi_event = &mhi_cntrl->mhi_event[dl_chan->er_index];
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@ -1005,19 +1093,36 @@ static int mhi_driver_probe(struct device *dev)
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* notify pending data
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*/
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if (mhi_event->cl_manage && !mhi_drv->status_cb)
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return -EINVAL;
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goto exit_probe;
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dl_chan->xfer_cb = mhi_drv->dl_xfer_cb;
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}
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/* Call the user provided probe function */
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return mhi_drv->probe(mhi_dev, mhi_dev->id);
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ret = mhi_drv->probe(mhi_dev, mhi_dev->id);
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if (ret)
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goto exit_probe;
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if (dl_chan && dl_chan->auto_start)
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mhi_prepare_channel(mhi_cntrl, dl_chan);
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mhi_device_put(mhi_dev);
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return ret;
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exit_probe:
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mhi_unprepare_from_transfer(mhi_dev);
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mhi_device_put(mhi_dev);
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return ret;
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}
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static int mhi_driver_remove(struct device *dev)
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{
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struct mhi_device *mhi_dev = to_mhi_device(dev);
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struct mhi_driver *mhi_drv = to_mhi_driver(dev->driver);
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struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
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struct mhi_chan *mhi_chan;
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enum mhi_ch_state ch_state[] = {
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MHI_CH_STATE_DISABLED,
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@ -1049,6 +1154,10 @@ static int mhi_driver_remove(struct device *dev)
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mhi_chan->ch_state = MHI_CH_STATE_SUSPENDED;
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write_unlock_irq(&mhi_chan->lock);
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/* Reset the non-offload channel */
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if (!mhi_chan->offload_ch)
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mhi_reset_chan(mhi_cntrl, mhi_chan);
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mutex_unlock(&mhi_chan->mutex);
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}
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@ -1063,11 +1172,20 @@ static int mhi_driver_remove(struct device *dev)
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mutex_lock(&mhi_chan->mutex);
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if (ch_state[dir] == MHI_CH_STATE_ENABLED &&
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!mhi_chan->offload_ch)
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mhi_deinit_chan_ctxt(mhi_cntrl, mhi_chan);
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mhi_chan->ch_state = MHI_CH_STATE_DISABLED;
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mutex_unlock(&mhi_chan->mutex);
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}
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read_lock_bh(&mhi_cntrl->pm_lock);
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while (mhi_dev->dev_wake)
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mhi_device_put(mhi_dev);
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read_unlock_bh(&mhi_cntrl->pm_lock);
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return 0;
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}
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@ -587,6 +587,8 @@ int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl);
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void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl);
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int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl);
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int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl);
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int mhi_send_cmd(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
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enum mhi_cmd_type cmd);
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/* Register access methods */
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void mhi_db_brstmode(struct mhi_controller *mhi_cntrl, struct db_cfg *db_cfg,
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@ -618,6 +620,14 @@ int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl);
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void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl);
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void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
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struct image_info *img_info);
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int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan);
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int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan);
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void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan);
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void mhi_reset_chan(struct mhi_controller *mhi_cntrl,
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struct mhi_chan *mhi_chan);
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/* Memory allocation methods */
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static inline void *mhi_alloc_coherent(struct mhi_controller *mhi_cntrl,
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@ -652,4 +662,16 @@ irqreturn_t mhi_irq_handler(int irq_number, void *dev);
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irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *dev);
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irqreturn_t mhi_intvec_handler(int irq_number, void *dev);
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int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
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void *buf, void *cb, size_t buf_len, enum mhi_flags flags);
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int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info);
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int mhi_map_single_use_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info);
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void mhi_unmap_single_no_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info);
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void mhi_unmap_single_use_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info);
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#endif /* _MHI_INT_H */
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@ -142,11 +142,83 @@ enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl)
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return ret ? MHI_STATE_MAX : state;
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}
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int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info)
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{
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buf_info->p_addr = dma_map_single(mhi_cntrl->cntrl_dev,
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buf_info->v_addr, buf_info->len,
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buf_info->dir);
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if (dma_mapping_error(mhi_cntrl->cntrl_dev, buf_info->p_addr))
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return -ENOMEM;
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return 0;
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}
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int mhi_map_single_use_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info)
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{
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void *buf = mhi_alloc_coherent(mhi_cntrl, buf_info->len,
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&buf_info->p_addr, GFP_ATOMIC);
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if (!buf)
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return -ENOMEM;
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if (buf_info->dir == DMA_TO_DEVICE)
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memcpy(buf, buf_info->v_addr, buf_info->len);
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buf_info->bb_addr = buf;
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return 0;
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}
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void mhi_unmap_single_no_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info)
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{
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dma_unmap_single(mhi_cntrl->cntrl_dev, buf_info->p_addr, buf_info->len,
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buf_info->dir);
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}
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void mhi_unmap_single_use_bb(struct mhi_controller *mhi_cntrl,
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struct mhi_buf_info *buf_info)
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{
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if (buf_info->dir == DMA_FROM_DEVICE)
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memcpy(buf_info->v_addr, buf_info->bb_addr, buf_info->len);
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mhi_free_coherent(mhi_cntrl, buf_info->len, buf_info->bb_addr,
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buf_info->p_addr);
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}
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static int get_nr_avail_ring_elements(struct mhi_controller *mhi_cntrl,
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struct mhi_ring *ring)
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{
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int nr_el;
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if (ring->wp < ring->rp) {
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nr_el = ((ring->rp - ring->wp) / ring->el_size) - 1;
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} else {
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nr_el = (ring->rp - ring->base) / ring->el_size;
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nr_el += ((ring->base + ring->len - ring->wp) /
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ring->el_size) - 1;
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}
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return nr_el;
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}
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static void *mhi_to_virtual(struct mhi_ring *ring, dma_addr_t addr)
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{
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return (addr - ring->iommu_base) + ring->base;
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}
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static void mhi_add_ring_element(struct mhi_controller *mhi_cntrl,
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struct mhi_ring *ring)
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{
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ring->wp += ring->el_size;
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if (ring->wp >= (ring->base + ring->len))
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ring->wp = ring->base;
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/* smp update */
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smp_wmb();
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}
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static void mhi_del_ring_element(struct mhi_controller *mhi_cntrl,
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struct mhi_ring *ring)
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{
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@ -416,14 +488,12 @@ static int parse_xfer_event(struct mhi_controller *mhi_cntrl,
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/* Get the TRB this event points to */
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ev_tre = mhi_to_virtual(tre_ring, ptr);
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/* device rp after servicing the TREs */
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dev_rp = ev_tre + 1;
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if (dev_rp >= (tre_ring->base + tre_ring->len))
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dev_rp = tre_ring->base;
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result.dir = mhi_chan->dir;
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/* local rp */
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local_rp = tre_ring->rp;
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while (local_rp != dev_rp) {
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buf_info = buf_ring->rp;
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@ -433,6 +503,10 @@ static int parse_xfer_event(struct mhi_controller *mhi_cntrl,
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else
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xfer_len = buf_info->len;
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/* Unmap if it's not pre-mapped by client */
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if (likely(!buf_info->pre_mapped))
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mhi_cntrl->unmap_single(mhi_cntrl, buf_info);
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result.buf_addr = buf_info->cb_buf;
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result.bytes_xferd = xfer_len;
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mhi_del_ring_element(mhi_cntrl, buf_ring);
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@ -444,6 +518,23 @@ static int parse_xfer_event(struct mhi_controller *mhi_cntrl,
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if (mhi_chan->dir == DMA_TO_DEVICE)
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atomic_dec(&mhi_cntrl->pending_pkts);
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/*
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* Recycle the buffer if buffer is pre-allocated,
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* if there is an error, not much we can do apart
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* from dropping the packet
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*/
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if (mhi_chan->pre_alloc) {
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if (mhi_queue_buf(mhi_chan->mhi_dev,
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mhi_chan->dir,
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buf_info->cb_buf,
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buf_info->len, MHI_EOT)) {
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dev_err(dev,
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"Error recycling buffer for chan:%d\n",
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mhi_chan->chan);
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kfree(buf_info->cb_buf);
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}
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}
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}
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break;
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} /* CC_EOT */
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@ -803,3 +894,623 @@ void mhi_ctrl_ev_task(unsigned long data)
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schedule_work(&mhi_cntrl->syserr_worker);
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}
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}
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static bool mhi_is_ring_full(struct mhi_controller *mhi_cntrl,
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struct mhi_ring *ring)
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{
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void *tmp = ring->wp + ring->el_size;
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if (tmp >= (ring->base + ring->len))
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tmp = ring->base;
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return (tmp == ring->rp);
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}
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int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
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struct sk_buff *skb, size_t len, enum mhi_flags mflags)
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{
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struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
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struct mhi_chan *mhi_chan = (dir == DMA_TO_DEVICE) ? mhi_dev->ul_chan :
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mhi_dev->dl_chan;
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struct mhi_ring *tre_ring = &mhi_chan->tre_ring;
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struct mhi_ring *buf_ring = &mhi_chan->buf_ring;
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struct mhi_buf_info *buf_info;
|
||||
struct mhi_tre *mhi_tre;
|
||||
int ret;
|
||||
|
||||
/* If MHI host pre-allocates buffers then client drivers cannot queue */
|
||||
if (mhi_chan->pre_alloc)
|
||||
return -EINVAL;
|
||||
|
||||
if (mhi_is_ring_full(mhi_cntrl, tre_ring))
|
||||
return -ENOMEM;
|
||||
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (unlikely(MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state))) {
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* we're in M3 or transitioning to M3 */
|
||||
if (MHI_PM_IN_SUSPEND_STATE(mhi_cntrl->pm_state)) {
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
}
|
||||
|
||||
/* Toggle wake to exit out of M2 */
|
||||
mhi_cntrl->wake_toggle(mhi_cntrl);
|
||||
|
||||
/* Generate the TRE */
|
||||
buf_info = buf_ring->wp;
|
||||
|
||||
buf_info->v_addr = skb->data;
|
||||
buf_info->cb_buf = skb;
|
||||
buf_info->wp = tre_ring->wp;
|
||||
buf_info->dir = mhi_chan->dir;
|
||||
buf_info->len = len;
|
||||
ret = mhi_cntrl->map_single(mhi_cntrl, buf_info);
|
||||
if (ret)
|
||||
goto map_error;
|
||||
|
||||
mhi_tre = tre_ring->wp;
|
||||
|
||||
mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr);
|
||||
mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len);
|
||||
mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0);
|
||||
|
||||
/* increment WP */
|
||||
mhi_add_ring_element(mhi_cntrl, tre_ring);
|
||||
mhi_add_ring_element(mhi_cntrl, buf_ring);
|
||||
|
||||
if (mhi_chan->dir == DMA_TO_DEVICE)
|
||||
atomic_inc(&mhi_cntrl->pending_pkts);
|
||||
|
||||
if (likely(MHI_DB_ACCESS_VALID(mhi_cntrl))) {
|
||||
read_lock_bh(&mhi_chan->lock);
|
||||
mhi_ring_chan_db(mhi_cntrl, mhi_chan);
|
||||
read_unlock_bh(&mhi_chan->lock);
|
||||
}
|
||||
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
|
||||
return 0;
|
||||
|
||||
map_error:
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_queue_skb);
|
||||
|
||||
int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
|
||||
struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
struct mhi_chan *mhi_chan = (dir == DMA_TO_DEVICE) ? mhi_dev->ul_chan :
|
||||
mhi_dev->dl_chan;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
struct mhi_ring *tre_ring = &mhi_chan->tre_ring;
|
||||
struct mhi_ring *buf_ring = &mhi_chan->buf_ring;
|
||||
struct mhi_buf_info *buf_info;
|
||||
struct mhi_tre *mhi_tre;
|
||||
|
||||
/* If MHI host pre-allocates buffers then client drivers cannot queue */
|
||||
if (mhi_chan->pre_alloc)
|
||||
return -EINVAL;
|
||||
|
||||
if (mhi_is_ring_full(mhi_cntrl, tre_ring))
|
||||
return -ENOMEM;
|
||||
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (unlikely(MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state))) {
|
||||
dev_err(dev, "MHI is not in activate state, PM state: %s\n",
|
||||
to_mhi_pm_state_str(mhi_cntrl->pm_state));
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* we're in M3 or transitioning to M3 */
|
||||
if (MHI_PM_IN_SUSPEND_STATE(mhi_cntrl->pm_state)) {
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
}
|
||||
|
||||
/* Toggle wake to exit out of M2 */
|
||||
mhi_cntrl->wake_toggle(mhi_cntrl);
|
||||
|
||||
/* Generate the TRE */
|
||||
buf_info = buf_ring->wp;
|
||||
WARN_ON(buf_info->used);
|
||||
buf_info->p_addr = mhi_buf->dma_addr;
|
||||
buf_info->pre_mapped = true;
|
||||
buf_info->cb_buf = mhi_buf;
|
||||
buf_info->wp = tre_ring->wp;
|
||||
buf_info->dir = mhi_chan->dir;
|
||||
buf_info->len = len;
|
||||
|
||||
mhi_tre = tre_ring->wp;
|
||||
|
||||
mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr);
|
||||
mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_info->len);
|
||||
mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(1, 1, 0, 0);
|
||||
|
||||
/* increment WP */
|
||||
mhi_add_ring_element(mhi_cntrl, tre_ring);
|
||||
mhi_add_ring_element(mhi_cntrl, buf_ring);
|
||||
|
||||
if (mhi_chan->dir == DMA_TO_DEVICE)
|
||||
atomic_inc(&mhi_cntrl->pending_pkts);
|
||||
|
||||
if (likely(MHI_DB_ACCESS_VALID(mhi_cntrl))) {
|
||||
read_lock_bh(&mhi_chan->lock);
|
||||
mhi_ring_chan_db(mhi_cntrl, mhi_chan);
|
||||
read_unlock_bh(&mhi_chan->lock);
|
||||
}
|
||||
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_queue_dma);
|
||||
|
||||
int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
|
||||
void *buf, void *cb, size_t buf_len, enum mhi_flags flags)
|
||||
{
|
||||
struct mhi_ring *buf_ring, *tre_ring;
|
||||
struct mhi_tre *mhi_tre;
|
||||
struct mhi_buf_info *buf_info;
|
||||
int eot, eob, chain, bei;
|
||||
int ret;
|
||||
|
||||
buf_ring = &mhi_chan->buf_ring;
|
||||
tre_ring = &mhi_chan->tre_ring;
|
||||
|
||||
buf_info = buf_ring->wp;
|
||||
buf_info->v_addr = buf;
|
||||
buf_info->cb_buf = cb;
|
||||
buf_info->wp = tre_ring->wp;
|
||||
buf_info->dir = mhi_chan->dir;
|
||||
buf_info->len = buf_len;
|
||||
|
||||
ret = mhi_cntrl->map_single(mhi_cntrl, buf_info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
eob = !!(flags & MHI_EOB);
|
||||
eot = !!(flags & MHI_EOT);
|
||||
chain = !!(flags & MHI_CHAIN);
|
||||
bei = !!(mhi_chan->intmod);
|
||||
|
||||
mhi_tre = tre_ring->wp;
|
||||
mhi_tre->ptr = MHI_TRE_DATA_PTR(buf_info->p_addr);
|
||||
mhi_tre->dword[0] = MHI_TRE_DATA_DWORD0(buf_len);
|
||||
mhi_tre->dword[1] = MHI_TRE_DATA_DWORD1(bei, eot, eob, chain);
|
||||
|
||||
/* increment WP */
|
||||
mhi_add_ring_element(mhi_cntrl, tre_ring);
|
||||
mhi_add_ring_element(mhi_cntrl, buf_ring);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
|
||||
void *buf, size_t len, enum mhi_flags mflags)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
struct mhi_chan *mhi_chan = (dir == DMA_TO_DEVICE) ? mhi_dev->ul_chan :
|
||||
mhi_dev->dl_chan;
|
||||
struct mhi_ring *tre_ring;
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* this check here only as a guard, it's always
|
||||
* possible mhi can enter error while executing rest of function,
|
||||
* which is not fatal so we do not need to hold pm_lock
|
||||
*/
|
||||
if (unlikely(MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)))
|
||||
return -EIO;
|
||||
|
||||
tre_ring = &mhi_chan->tre_ring;
|
||||
if (mhi_is_ring_full(mhi_cntrl, tre_ring))
|
||||
return -ENOMEM;
|
||||
|
||||
ret = mhi_gen_tre(mhi_cntrl, mhi_chan, buf, buf, len, mflags);
|
||||
if (unlikely(ret))
|
||||
return ret;
|
||||
|
||||
read_lock_irqsave(&mhi_cntrl->pm_lock, flags);
|
||||
|
||||
/* we're in M3 or transitioning to M3 */
|
||||
if (MHI_PM_IN_SUSPEND_STATE(mhi_cntrl->pm_state)) {
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
}
|
||||
|
||||
/* Toggle wake to exit out of M2 */
|
||||
mhi_cntrl->wake_toggle(mhi_cntrl);
|
||||
|
||||
if (mhi_chan->dir == DMA_TO_DEVICE)
|
||||
atomic_inc(&mhi_cntrl->pending_pkts);
|
||||
|
||||
if (likely(MHI_DB_ACCESS_VALID(mhi_cntrl))) {
|
||||
unsigned long flags;
|
||||
|
||||
read_lock_irqsave(&mhi_chan->lock, flags);
|
||||
mhi_ring_chan_db(mhi_cntrl, mhi_chan);
|
||||
read_unlock_irqrestore(&mhi_chan->lock, flags);
|
||||
}
|
||||
|
||||
read_unlock_irqrestore(&mhi_cntrl->pm_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_queue_buf);
|
||||
|
||||
int mhi_send_cmd(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan,
|
||||
enum mhi_cmd_type cmd)
|
||||
{
|
||||
struct mhi_tre *cmd_tre = NULL;
|
||||
struct mhi_cmd *mhi_cmd = &mhi_cntrl->mhi_cmd[PRIMARY_CMD_RING];
|
||||
struct mhi_ring *ring = &mhi_cmd->ring;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
int chan = 0;
|
||||
|
||||
if (mhi_chan)
|
||||
chan = mhi_chan->chan;
|
||||
|
||||
spin_lock_bh(&mhi_cmd->lock);
|
||||
if (!get_nr_avail_ring_elements(mhi_cntrl, ring)) {
|
||||
spin_unlock_bh(&mhi_cmd->lock);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* prepare the cmd tre */
|
||||
cmd_tre = ring->wp;
|
||||
switch (cmd) {
|
||||
case MHI_CMD_RESET_CHAN:
|
||||
cmd_tre->ptr = MHI_TRE_CMD_RESET_PTR;
|
||||
cmd_tre->dword[0] = MHI_TRE_CMD_RESET_DWORD0;
|
||||
cmd_tre->dword[1] = MHI_TRE_CMD_RESET_DWORD1(chan);
|
||||
break;
|
||||
case MHI_CMD_START_CHAN:
|
||||
cmd_tre->ptr = MHI_TRE_CMD_START_PTR;
|
||||
cmd_tre->dword[0] = MHI_TRE_CMD_START_DWORD0;
|
||||
cmd_tre->dword[1] = MHI_TRE_CMD_START_DWORD1(chan);
|
||||
break;
|
||||
default:
|
||||
dev_err(dev, "Command not supported\n");
|
||||
break;
|
||||
}
|
||||
|
||||
/* queue to hardware */
|
||||
mhi_add_ring_element(mhi_cntrl, ring);
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (likely(MHI_DB_ACCESS_VALID(mhi_cntrl)))
|
||||
mhi_ring_cmd_db(mhi_cntrl, mhi_cmd);
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
spin_unlock_bh(&mhi_cmd->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __mhi_unprepare_channel(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan)
|
||||
{
|
||||
int ret;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
|
||||
dev_dbg(dev, "Entered: unprepare channel:%d\n", mhi_chan->chan);
|
||||
|
||||
/* no more processing events for this channel */
|
||||
mutex_lock(&mhi_chan->mutex);
|
||||
write_lock_irq(&mhi_chan->lock);
|
||||
if (mhi_chan->ch_state != MHI_CH_STATE_ENABLED) {
|
||||
write_unlock_irq(&mhi_chan->lock);
|
||||
mutex_unlock(&mhi_chan->mutex);
|
||||
return;
|
||||
}
|
||||
|
||||
mhi_chan->ch_state = MHI_CH_STATE_DISABLED;
|
||||
write_unlock_irq(&mhi_chan->lock);
|
||||
|
||||
reinit_completion(&mhi_chan->completion);
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
goto error_invalid_state;
|
||||
}
|
||||
|
||||
mhi_cntrl->wake_toggle(mhi_cntrl);
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
ret = mhi_send_cmd(mhi_cntrl, mhi_chan, MHI_CMD_RESET_CHAN);
|
||||
if (ret)
|
||||
goto error_invalid_state;
|
||||
|
||||
/* even if it fails we will still reset */
|
||||
ret = wait_for_completion_timeout(&mhi_chan->completion,
|
||||
msecs_to_jiffies(mhi_cntrl->timeout_ms));
|
||||
if (!ret || mhi_chan->ccs != MHI_EV_CC_SUCCESS)
|
||||
dev_err(dev,
|
||||
"Failed to receive cmd completion, still resetting\n");
|
||||
|
||||
error_invalid_state:
|
||||
if (!mhi_chan->offload_ch) {
|
||||
mhi_reset_chan(mhi_cntrl, mhi_chan);
|
||||
mhi_deinit_chan_ctxt(mhi_cntrl, mhi_chan);
|
||||
}
|
||||
dev_dbg(dev, "chan:%d successfully resetted\n", mhi_chan->chan);
|
||||
mutex_unlock(&mhi_chan->mutex);
|
||||
}
|
||||
|
||||
int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan)
|
||||
{
|
||||
int ret = 0;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
|
||||
dev_dbg(dev, "Preparing channel: %d\n", mhi_chan->chan);
|
||||
|
||||
if (!(BIT(mhi_cntrl->ee) & mhi_chan->ee_mask)) {
|
||||
dev_err(dev,
|
||||
"Current EE: %s Required EE Mask: 0x%x for chan: %s\n",
|
||||
TO_MHI_EXEC_STR(mhi_cntrl->ee), mhi_chan->ee_mask,
|
||||
mhi_chan->name);
|
||||
return -ENOTCONN;
|
||||
}
|
||||
|
||||
mutex_lock(&mhi_chan->mutex);
|
||||
|
||||
/* If channel is not in disable state, do not allow it to start */
|
||||
if (mhi_chan->ch_state != MHI_CH_STATE_DISABLED) {
|
||||
ret = -EIO;
|
||||
dev_dbg(dev, "channel: %d is not in disabled state\n",
|
||||
mhi_chan->chan);
|
||||
goto error_init_chan;
|
||||
}
|
||||
|
||||
/* Check of client manages channel context for offload channels */
|
||||
if (!mhi_chan->offload_ch) {
|
||||
ret = mhi_init_chan_ctxt(mhi_cntrl, mhi_chan);
|
||||
if (ret)
|
||||
goto error_init_chan;
|
||||
}
|
||||
|
||||
reinit_completion(&mhi_chan->completion);
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) {
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
ret = -EIO;
|
||||
goto error_pm_state;
|
||||
}
|
||||
|
||||
mhi_cntrl->wake_toggle(mhi_cntrl);
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
|
||||
ret = mhi_send_cmd(mhi_cntrl, mhi_chan, MHI_CMD_START_CHAN);
|
||||
if (ret)
|
||||
goto error_pm_state;
|
||||
|
||||
ret = wait_for_completion_timeout(&mhi_chan->completion,
|
||||
msecs_to_jiffies(mhi_cntrl->timeout_ms));
|
||||
if (!ret || mhi_chan->ccs != MHI_EV_CC_SUCCESS) {
|
||||
ret = -EIO;
|
||||
goto error_pm_state;
|
||||
}
|
||||
|
||||
write_lock_irq(&mhi_chan->lock);
|
||||
mhi_chan->ch_state = MHI_CH_STATE_ENABLED;
|
||||
write_unlock_irq(&mhi_chan->lock);
|
||||
|
||||
/* Pre-allocate buffer for xfer ring */
|
||||
if (mhi_chan->pre_alloc) {
|
||||
int nr_el = get_nr_avail_ring_elements(mhi_cntrl,
|
||||
&mhi_chan->tre_ring);
|
||||
size_t len = mhi_cntrl->buffer_len;
|
||||
|
||||
while (nr_el--) {
|
||||
void *buf;
|
||||
|
||||
buf = kmalloc(len, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
ret = -ENOMEM;
|
||||
goto error_pre_alloc;
|
||||
}
|
||||
|
||||
/* Prepare transfer descriptors */
|
||||
ret = mhi_gen_tre(mhi_cntrl, mhi_chan, buf, buf,
|
||||
len, MHI_EOT);
|
||||
if (ret) {
|
||||
kfree(buf);
|
||||
goto error_pre_alloc;
|
||||
}
|
||||
}
|
||||
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (MHI_DB_ACCESS_VALID(mhi_cntrl)) {
|
||||
read_lock_irq(&mhi_chan->lock);
|
||||
mhi_ring_chan_db(mhi_cntrl, mhi_chan);
|
||||
read_unlock_irq(&mhi_chan->lock);
|
||||
}
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
}
|
||||
|
||||
mutex_unlock(&mhi_chan->mutex);
|
||||
|
||||
dev_dbg(dev, "Chan: %d successfully moved to start state\n",
|
||||
mhi_chan->chan);
|
||||
|
||||
return 0;
|
||||
|
||||
error_pm_state:
|
||||
if (!mhi_chan->offload_ch)
|
||||
mhi_deinit_chan_ctxt(mhi_cntrl, mhi_chan);
|
||||
|
||||
error_init_chan:
|
||||
mutex_unlock(&mhi_chan->mutex);
|
||||
|
||||
return ret;
|
||||
|
||||
error_pre_alloc:
|
||||
mutex_unlock(&mhi_chan->mutex);
|
||||
__mhi_unprepare_channel(mhi_cntrl, mhi_chan);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mhi_mark_stale_events(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_event *mhi_event,
|
||||
struct mhi_event_ctxt *er_ctxt,
|
||||
int chan)
|
||||
|
||||
{
|
||||
struct mhi_tre *dev_rp, *local_rp;
|
||||
struct mhi_ring *ev_ring;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
unsigned long flags;
|
||||
|
||||
dev_dbg(dev, "Marking all events for chan: %d as stale\n", chan);
|
||||
|
||||
ev_ring = &mhi_event->ring;
|
||||
|
||||
/* mark all stale events related to channel as STALE event */
|
||||
spin_lock_irqsave(&mhi_event->lock, flags);
|
||||
dev_rp = mhi_to_virtual(ev_ring, er_ctxt->rp);
|
||||
|
||||
local_rp = ev_ring->rp;
|
||||
while (dev_rp != local_rp) {
|
||||
if (MHI_TRE_GET_EV_TYPE(local_rp) == MHI_PKT_TYPE_TX_EVENT &&
|
||||
chan == MHI_TRE_GET_EV_CHID(local_rp))
|
||||
local_rp->dword[1] = MHI_TRE_EV_DWORD1(chan,
|
||||
MHI_PKT_TYPE_STALE_EVENT);
|
||||
local_rp++;
|
||||
if (local_rp == (ev_ring->base + ev_ring->len))
|
||||
local_rp = ev_ring->base;
|
||||
}
|
||||
|
||||
dev_dbg(dev, "Finished marking events as stale events\n");
|
||||
spin_unlock_irqrestore(&mhi_event->lock, flags);
|
||||
}
|
||||
|
||||
static void mhi_reset_data_chan(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan)
|
||||
{
|
||||
struct mhi_ring *buf_ring, *tre_ring;
|
||||
struct mhi_result result;
|
||||
|
||||
/* Reset any pending buffers */
|
||||
buf_ring = &mhi_chan->buf_ring;
|
||||
tre_ring = &mhi_chan->tre_ring;
|
||||
result.transaction_status = -ENOTCONN;
|
||||
result.bytes_xferd = 0;
|
||||
while (tre_ring->rp != tre_ring->wp) {
|
||||
struct mhi_buf_info *buf_info = buf_ring->rp;
|
||||
|
||||
if (mhi_chan->dir == DMA_TO_DEVICE)
|
||||
atomic_dec(&mhi_cntrl->pending_pkts);
|
||||
|
||||
if (!buf_info->pre_mapped)
|
||||
mhi_cntrl->unmap_single(mhi_cntrl, buf_info);
|
||||
|
||||
mhi_del_ring_element(mhi_cntrl, buf_ring);
|
||||
mhi_del_ring_element(mhi_cntrl, tre_ring);
|
||||
|
||||
if (mhi_chan->pre_alloc) {
|
||||
kfree(buf_info->cb_buf);
|
||||
} else {
|
||||
result.buf_addr = buf_info->cb_buf;
|
||||
mhi_chan->xfer_cb(mhi_chan->mhi_dev, &result);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void mhi_reset_chan(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan)
|
||||
{
|
||||
struct mhi_event *mhi_event;
|
||||
struct mhi_event_ctxt *er_ctxt;
|
||||
int chan = mhi_chan->chan;
|
||||
|
||||
/* Nothing to reset, client doesn't queue buffers */
|
||||
if (mhi_chan->offload_ch)
|
||||
return;
|
||||
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
mhi_event = &mhi_cntrl->mhi_event[mhi_chan->er_index];
|
||||
er_ctxt = &mhi_cntrl->mhi_ctxt->er_ctxt[mhi_chan->er_index];
|
||||
|
||||
mhi_mark_stale_events(mhi_cntrl, mhi_event, er_ctxt, chan);
|
||||
|
||||
mhi_reset_data_chan(mhi_cntrl, mhi_chan);
|
||||
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
}
|
||||
|
||||
/* Move channel to start state */
|
||||
int mhi_prepare_for_transfer(struct mhi_device *mhi_dev)
|
||||
{
|
||||
int ret, dir;
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
struct mhi_chan *mhi_chan;
|
||||
|
||||
for (dir = 0; dir < 2; dir++) {
|
||||
mhi_chan = dir ? mhi_dev->dl_chan : mhi_dev->ul_chan;
|
||||
if (!mhi_chan)
|
||||
continue;
|
||||
|
||||
ret = mhi_prepare_channel(mhi_cntrl, mhi_chan);
|
||||
if (ret)
|
||||
goto error_open_chan;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
error_open_chan:
|
||||
for (--dir; dir >= 0; dir--) {
|
||||
mhi_chan = dir ? mhi_dev->dl_chan : mhi_dev->ul_chan;
|
||||
if (!mhi_chan)
|
||||
continue;
|
||||
|
||||
__mhi_unprepare_channel(mhi_cntrl, mhi_chan);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_prepare_for_transfer);
|
||||
|
||||
void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
struct mhi_chan *mhi_chan;
|
||||
int dir;
|
||||
|
||||
for (dir = 0; dir < 2; dir++) {
|
||||
mhi_chan = dir ? mhi_dev->ul_chan : mhi_dev->dl_chan;
|
||||
if (!mhi_chan)
|
||||
continue;
|
||||
|
||||
__mhi_unprepare_channel(mhi_cntrl, mhi_chan);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_unprepare_from_transfer);
|
||||
|
||||
int mhi_poll(struct mhi_device *mhi_dev, u32 budget)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
struct mhi_chan *mhi_chan = mhi_dev->dl_chan;
|
||||
struct mhi_event *mhi_event = &mhi_cntrl->mhi_event[mhi_chan->er_index];
|
||||
int ret;
|
||||
|
||||
spin_lock_bh(&mhi_event->lock);
|
||||
ret = mhi_event->process_event(mhi_cntrl, mhi_event, budget);
|
||||
spin_unlock_bh(&mhi_event->lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_poll);
|
||||
|
||||
@ -927,3 +927,43 @@ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl)
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_force_rddm_mode);
|
||||
|
||||
void mhi_device_get(struct mhi_device *mhi_dev)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
|
||||
mhi_dev->dev_wake++;
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
mhi_cntrl->wake_get(mhi_cntrl, true);
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_device_get);
|
||||
|
||||
int mhi_device_get_sync(struct mhi_device *mhi_dev)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
int ret;
|
||||
|
||||
ret = __mhi_device_get_sync(mhi_cntrl);
|
||||
if (!ret)
|
||||
mhi_dev->dev_wake++;
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_device_get_sync);
|
||||
|
||||
void mhi_device_put(struct mhi_device *mhi_dev)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
|
||||
mhi_dev->dev_wake--;
|
||||
read_lock_bh(&mhi_cntrl->pm_lock);
|
||||
if (MHI_PM_IN_SUSPEND_STATE(mhi_cntrl->pm_state)) {
|
||||
mhi_cntrl->runtime_get(mhi_cntrl);
|
||||
mhi_cntrl->runtime_put(mhi_cntrl);
|
||||
}
|
||||
|
||||
mhi_cntrl->wake_put(mhi_cntrl, false);
|
||||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_device_put);
|
||||
|
||||
@ -10,6 +10,7 @@
|
||||
#include <linux/dma-direction.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/rwlock_types.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock_types.h>
|
||||
#include <linux/wait.h>
|
||||
@ -336,6 +337,8 @@ struct mhi_controller_config {
|
||||
* @wake_toggle: CB function to assert and de-assert device wake (optional)
|
||||
* @runtime_get: CB function to controller runtime resume (required)
|
||||
* @runtimet_put: CB function to decrement pm usage (required)
|
||||
* @map_single: CB function to create TRE buffer
|
||||
* @unmap_single: CB function to destroy TRE buffer
|
||||
* @buffer_len: Bounce buffer length
|
||||
* @bounce_buf: Use of bounce buffer
|
||||
* @fbc_download: MHI host needs to do complete image transfer (optional)
|
||||
@ -403,6 +406,10 @@ struct mhi_controller {
|
||||
void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
|
||||
int (*runtime_get)(struct mhi_controller *mhi_cntrl);
|
||||
void (*runtime_put)(struct mhi_controller *mhi_cntrl);
|
||||
int (*map_single)(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_buf_info *buf);
|
||||
void (*unmap_single)(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_buf_info *buf);
|
||||
|
||||
size_t buffer_len;
|
||||
bool bounce_buf;
|
||||
@ -583,4 +590,77 @@ int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
|
||||
*/
|
||||
enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_device_get - Disable device low power mode
|
||||
* @mhi_dev: Device associated with the channel
|
||||
*/
|
||||
void mhi_device_get(struct mhi_device *mhi_dev);
|
||||
|
||||
/**
|
||||
* mhi_device_get_sync - Disable device low power mode. Synchronously
|
||||
* take the controller out of suspended state
|
||||
* @mhi_dev: Device associated with the channel
|
||||
*/
|
||||
int mhi_device_get_sync(struct mhi_device *mhi_dev);
|
||||
|
||||
/**
|
||||
* mhi_device_put - Re-enable device low power mode
|
||||
* @mhi_dev: Device associated with the channel
|
||||
*/
|
||||
void mhi_device_put(struct mhi_device *mhi_dev);
|
||||
|
||||
/**
|
||||
* mhi_prepare_for_transfer - Setup channel for data transfer
|
||||
* @mhi_dev: Device associated with the channels
|
||||
*/
|
||||
int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
|
||||
|
||||
/**
|
||||
* mhi_unprepare_from_transfer - Unprepare the channels
|
||||
* @mhi_dev: Device associated with the channels
|
||||
*/
|
||||
void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
|
||||
|
||||
/**
|
||||
* mhi_poll - Poll for any available data in DL direction
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @budget: # of events to process
|
||||
*/
|
||||
int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
|
||||
|
||||
/**
|
||||
* mhi_queue_dma - Send or receive DMA mapped buffers from client device
|
||||
* over MHI channel
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @dir: DMA direction for the channel
|
||||
* @mhi_buf: Buffer for holding the DMA mapped data
|
||||
* @len: Buffer length
|
||||
* @mflags: MHI transfer flags used for the transfer
|
||||
*/
|
||||
int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
|
||||
struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
|
||||
|
||||
/**
|
||||
* mhi_queue_buf - Send or receive raw buffers from client device over MHI
|
||||
* channel
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @dir: DMA direction for the channel
|
||||
* @buf: Buffer for holding the data
|
||||
* @len: Buffer length
|
||||
* @mflags: MHI transfer flags used for the transfer
|
||||
*/
|
||||
int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
|
||||
void *buf, size_t len, enum mhi_flags mflags);
|
||||
|
||||
/**
|
||||
* mhi_queue_skb - Send or receive SKBs from client device over MHI channel
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @dir: DMA direction for the channel
|
||||
* @skb: Buffer for holding SKBs
|
||||
* @len: Buffer length
|
||||
* @mflags: MHI transfer flags used for the transfer
|
||||
*/
|
||||
int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
|
||||
struct sk_buff *skb, size_t len, enum mhi_flags mflags);
|
||||
|
||||
#endif /* _MHI_H_ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user