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mvebu DT changes for v3.17 (round 2)

Browse Source 
- kirkwood
    - Add d2 Network v2 board
 
  - mvebu
    - Add Armada 375 ethernet node
    - Add CA9 MPcore SoC controller node
    - Add support for dynamic freq scaling on Armada XP
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Merge tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu into next/dt

Merge "ARM: mvebu: DT changes for v3.17 (round 2)" from Jason Cooper:

mvebu DT changes for v3.17 (round 2):

 - kirkwood
  * Add d2 Network v2 board

 - mvebu
  * Add Armada 375 ethernet node
  * Add CA9 MPcore SoC controller node
  * Add support for dynamic freq scaling on Armada XP

* tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: update Armada XP DT for dynamic frequency scaling
  ARM: mvebu: add CA9 MPcore SoC Controller node
  ARM: mvebu: Enable the network controller in Armada 375 DB board
  ARM: mvebu: Add support for the network controller in Armada 375 SoC
  ARM: Kirkwood: add DT support for d2 Network v2
  ARM: Kirkwood: allow to use netxbig DTSI for d2net_v2 DTS

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-07-20 12:23:56 -07:00
commit 185829efb8
13 changed files with 186 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
Documentation/devicetree/bindings/arm/armada-380-mpcore-soc-ctrl.txt Normal file
View File

@ -0,0 +1,14 @@
Marvell Armada 38x CA9 MPcore SoC Controller
============================================
Required properties:
- compatible: Should be "marvell,armada-380-mpcore-soc-ctrl".
- reg: should be the register base and length as documented in the
datasheet for the CA9 MPcore SoC Control registers
mpcore-soc-ctrl@20d20 {
compatible = "marvell,armada-380-mpcore-soc-ctrl";
reg = <0x20d20 0x6c>;
};

1
arch/arm/boot/dts/Makefile
View File

@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \
kirkwood := \
kirkwood-b3.dtb \
kirkwood-cloudbox.dtb \
kirkwood-d2net.dtb \
kirkwood-db-88f6281.dtb \
kirkwood-db-88f6282.dtb \
kirkwood-dns320.dtb \

26
arch/arm/boot/dts/armada-375-db.dts
View File

@ -123,6 +123,32 @@
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
};
ethernet@f0000 {
status = "okay";
eth0@c4000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
eth1@c5000 {
status = "okay";
phy = <&phy3>;
phy-mode = "gmii";
};
};
};
pcie-controller {

31
arch/arm/boot/dts/armada-375.dtsi
View File

@ -151,6 +151,37 @@
<0xc100 0x100>;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0xc0054 0x4>;
};
/* Network controller */
ethernet@f0000 {
compatible = "marvell,armada-375-pp2";
reg = <0xf0000 0xa000>, /* Packet Processor regs */
<0xc0000 0x3060>, /* LMS regs */
<0xc4000 0x100>, /* eth0 regs */
<0xc5000 0x100>; /* eth1 regs */
clocks = <&gateclk 3>, <&gateclk 19>;
clock-names = "pp_clk", "gop_clk";
status = "disabled";
eth0: eth0@c4000 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
port-id = <0>;
status = "disabled";
};
eth1: eth1@c5000 {
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
port-id = <1>;
status = "disabled";
};
};
spi0: spi@10600 {
compatible = "marvell,orion-spi";
reg = <0x10600 0x50>;

5
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -286,6 +286,11 @@
reg = <0x20800 0x10>;
};
mpcore-soc-ctrl@20d20 {
compatible = "marvell,armada-380-mpcore-soc-ctrl";
reg = <0x20d20 0x6c>;
};
coherency-fabric@21010 {
compatible = "marvell,armada-380-coherency-fabric";
reg = <0x21010 0x1c>;

2
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View File

@ -34,6 +34,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -41,6 +42,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
};

2
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View File

@ -36,6 +36,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -43,6 +44,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
};

4
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View File

@ -37,6 +37,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -44,6 +45,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
cpu@2 {
@ -51,6 +53,7 @@
compatible = "marvell,sheeva-v7";
reg = <2>;
clocks = <&cpuclk 2>;
clock-latency = <1000000>;
};
cpu@3 {
@ -58,6 +61,7 @@
compatible = "marvell,sheeva-v7";
reg = <3>;
clocks = <&cpuclk 3>;
clock-latency = <1000000>;
};
};

2
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -99,7 +99,7 @@
cpuclk: clock-complex@18700 {
#clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock";
reg = <0x18700 0xA0>;
reg = <0x18700 0xA0>, <0x1c054 0x10>;
clocks = <&coreclk 1>;
};

42
arch/arm/boot/dts/kirkwood-d2net.dts Normal file
View File

@ -0,0 +1,42 @@
/*
* Device Tree file for d2 Network v2
*
* Copyright (C) 2014 Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
#include "kirkwood-netxbig.dtsi"
/ {
model = "LaCie d2 Network v2";
compatible = "lacie,d2net_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
};
ns2-leds {
compatible = "lacie,ns2-leds";
blue-sata {
label = "d2net_v2:blue:sata";
slow-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
cmd-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
compatible = "gpio-leds";
red-fail {
label = "d2net_v2:red:fail";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
};
};

30
arch/arm/boot/dts/kirkwood-net2big.dts
View File

@ -28,3 +28,33 @@
reg = <0x00000000 0x10000000>;
};
};
&regulators {
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdd1power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
};
clocks {
g762_clk: g762-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&i2c0 {
g762@3e {
compatible = "gmt,g762";
reg = <0x3e>;
clocks = <&g762_clk>;
};
};

28
arch/arm/boot/dts/kirkwood-net5big.dts
View File

@ -31,6 +31,18 @@
};
&regulators {
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdd1power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
};
regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
@ -66,6 +78,14 @@
regulator-boot-on;
gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
clocks {
g762_clk: g762-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
&mdio {
@ -81,3 +101,11 @@
};
};
&i2c0 {
g762@3e {
compatible = "gmt,g762";
reg = <0x3e>;
clocks = <&g762_clk>;
};
};

26
arch/arm/boot/dts/kirkwood-netxbig.dtsi
View File

@ -104,26 +104,6 @@
regulator-boot-on;
gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdd1power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
};
clocks {
g762_clk: g762-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};
};
@ -171,10 +151,4 @@
pagesize = <16>;
reg = <0x50>;
};
g762@3e {
compatible = "gmt,g762";
reg = <0x3e>;
clocks = <&g762_clk>;
};
};