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crypto: caam - defer probing until QMan is available
When QI (Queue Interface) support is enabled on DPAA 1.x platforms, defer probing if dependencies (QMan drivers) are not available yet. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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2ef540476e
commit
176435ad2a
@ -527,15 +527,54 @@ static int caam_probe(struct platform_device *pdev)
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dev_set_drvdata(dev, ctrlpriv);
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nprop = pdev->dev.of_node;
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/* Get configuration properties from device tree */
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/* First, get register page */
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ctrl = of_iomap(nprop, 0);
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if (!ctrl) {
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dev_err(dev, "caam: of_iomap() failed\n");
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return -ENOMEM;
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}
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caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
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(CSTA_PLEND | CSTA_ALT_PLEND));
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caam_imx = (bool)soc_device_match(imx_soc);
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comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
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caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);
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ctrlpriv->qi_present = !!(comp_params & CTPR_MS_QI_MASK);
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#ifdef CONFIG_CAAM_QI
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/* If (DPAA 1.x) QI present, check whether dependencies are available */
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if (ctrlpriv->qi_present && !caam_dpaa2) {
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ret = qman_is_probed();
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if (!ret) {
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ret = -EPROBE_DEFER;
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goto iounmap_ctrl;
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} else if (ret < 0) {
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dev_err(dev, "failing probe due to qman probe error\n");
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ret = -ENODEV;
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goto iounmap_ctrl;
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}
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ret = qman_portals_probed();
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if (!ret) {
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ret = -EPROBE_DEFER;
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goto iounmap_ctrl;
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} else if (ret < 0) {
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dev_err(dev, "failing probe due to qman portals probe error\n");
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ret = -ENODEV;
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goto iounmap_ctrl;
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}
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}
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#endif
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/* Enable clocking */
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clk = caam_drv_identify_clk(&pdev->dev, "ipg");
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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dev_err(&pdev->dev,
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"can't identify CAAM ipg clk: %d\n", ret);
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return ret;
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goto iounmap_ctrl;
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}
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ctrlpriv->caam_ipg = clk;
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@ -547,7 +586,7 @@ static int caam_probe(struct platform_device *pdev)
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ret = PTR_ERR(clk);
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dev_err(&pdev->dev,
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"can't identify CAAM mem clk: %d\n", ret);
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return ret;
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goto iounmap_ctrl;
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}
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ctrlpriv->caam_mem = clk;
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}
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@ -557,7 +596,7 @@ static int caam_probe(struct platform_device *pdev)
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ret = PTR_ERR(clk);
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dev_err(&pdev->dev,
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"can't identify CAAM aclk clk: %d\n", ret);
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return ret;
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goto iounmap_ctrl;
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}
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ctrlpriv->caam_aclk = clk;
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@ -570,7 +609,7 @@ static int caam_probe(struct platform_device *pdev)
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ret = PTR_ERR(clk);
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dev_err(&pdev->dev,
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"can't identify CAAM emi_slow clk: %d\n", ret);
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return ret;
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goto iounmap_ctrl;
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}
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ctrlpriv->caam_emi_slow = clk;
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}
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@ -578,7 +617,7 @@ static int caam_probe(struct platform_device *pdev)
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ret = clk_prepare_enable(ctrlpriv->caam_ipg);
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if (ret < 0) {
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dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);
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return ret;
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goto iounmap_ctrl;
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}
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if (ctrlpriv->caam_mem) {
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@ -605,25 +644,10 @@ static int caam_probe(struct platform_device *pdev)
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}
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}
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/* Get configuration properties from device tree */
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/* First, get register page */
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ctrl = of_iomap(nprop, 0);
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if (ctrl == NULL) {
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dev_err(dev, "caam: of_iomap() failed\n");
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ret = -ENOMEM;
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goto disable_caam_emi_slow;
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}
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caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
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(CSTA_PLEND | CSTA_ALT_PLEND));
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/* Finding the page size for using the CTPR_MS register */
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comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
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pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
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/* Allocating the BLOCK_OFFSET based on the supported page size on
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* the platform
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*/
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pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
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if (pg_size == 0)
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BLOCK_OFFSET = PG_SIZE_4K;
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else
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@ -648,7 +672,6 @@ static int caam_probe(struct platform_device *pdev)
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* In case of SoCs with Management Complex, MC f/w performs
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* the configuration.
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*/
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caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);
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np = of_find_compatible_node(NULL, NULL, "fsl,qoriq-mc");
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ctrlpriv->mc_en = !!np;
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of_node_put(np);
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@ -700,7 +723,7 @@ static int caam_probe(struct platform_device *pdev)
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}
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if (ret) {
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dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret);
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goto iounmap_ctrl;
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goto disable_caam_emi_slow;
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}
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ctrlpriv->era = caam_get_era(ctrl);
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@ -719,7 +742,6 @@ static int caam_probe(struct platform_device *pdev)
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#endif
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/* Check to see if (DPAA 1.x) QI present. If so, enable */
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ctrlpriv->qi_present = !!(comp_params & CTPR_MS_QI_MASK);
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if (ctrlpriv->qi_present && !caam_dpaa2) {
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ctrlpriv->qi = (struct caam_queue_if __iomem __force *)
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((__force uint8_t *)ctrl +
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@ -906,8 +928,6 @@ shutdown_qi:
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if (ctrlpriv->qi_init)
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caam_qi_shutdown(dev);
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#endif
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iounmap_ctrl:
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iounmap(ctrl);
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disable_caam_emi_slow:
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if (ctrlpriv->caam_emi_slow)
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clk_disable_unprepare(ctrlpriv->caam_emi_slow);
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@ -918,6 +938,8 @@ disable_caam_mem:
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clk_disable_unprepare(ctrlpriv->caam_mem);
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disable_caam_ipg:
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clk_disable_unprepare(ctrlpriv->caam_ipg);
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iounmap_ctrl:
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iounmap(ctrl);
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return ret;
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}
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