HID: amd_sfh: Add command response to check command status

Sometimes sensor enable/disable may take time, without checking the
actual status bits from MP2 FW can lead the amd-sfh to misbehave.

Hence add a status check of enable/disable command
by waiting on the command response before sending the next
command to FW.

Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This commit is contained in:
Basavaraj Natikar 2021-08-02 19:33:38 +05:30 committed by Jiri Kosina
parent 3978f54817
commit 173709f50e
3 changed files with 64 additions and 10 deletions

View File

@ -123,14 +123,24 @@ static void amd_sfh_work_buffer(struct work_struct *work)
int i; int i;
for (i = 0; i < cli_data->num_hid_devices; i++) { for (i = 0; i < cli_data->num_hid_devices; i++) {
report_size = get_input_report(i, cli_data->sensor_idx[i], cli_data->report_id[i], if (cli_data->sensor_sts[i] == SENSOR_ENABLED) {
in_data); report_size = get_input_report
hid_input_report(cli_data->hid_sensor_hubs[i], HID_INPUT_REPORT, (i, cli_data->sensor_idx[i], cli_data->report_id[i], in_data);
in_data->input_report[i], report_size, 0); hid_input_report(cli_data->hid_sensor_hubs[i], HID_INPUT_REPORT,
in_data->input_report[i], report_size, 0);
}
} }
schedule_delayed_work(&cli_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP)); schedule_delayed_work(&cli_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
} }
u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts)
{
if (mp2->mp2_ops->response)
sensor_sts = mp2->mp2_ops->response(mp2, sid, sensor_sts);
return sensor_sts;
}
int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata) int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata)
{ {
struct amd_input_data *in_data = &privdata->in_data; struct amd_input_data *in_data = &privdata->in_data;
@ -139,8 +149,8 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata)
struct device *dev; struct device *dev;
u32 feature_report_size; u32 feature_report_size;
u32 input_report_size; u32 input_report_size;
int rc, i, status;
u8 cl_idx; u8 cl_idx;
int rc, i;
dev = &privdata->pdev->dev; dev = &privdata->pdev->dev;
@ -155,7 +165,7 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata)
in_data->sensor_virt_addr[i] = dma_alloc_coherent(dev, sizeof(int) * 8, in_data->sensor_virt_addr[i] = dma_alloc_coherent(dev, sizeof(int) * 8,
&cl_data->sensor_dma_addr[i], &cl_data->sensor_dma_addr[i],
GFP_KERNEL); GFP_KERNEL);
cl_data->sensor_sts[i] = 0; cl_data->sensor_sts[i] = SENSOR_DISABLED;
cl_data->sensor_requested_cnt[i] = 0; cl_data->sensor_requested_cnt[i] = 0;
cl_data->cur_hid_dev = i; cl_data->cur_hid_dev = i;
cl_idx = cl_data->sensor_idx[i]; cl_idx = cl_data->sensor_idx[i];
@ -201,7 +211,10 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata)
if (rc) if (rc)
return rc; return rc;
privdata->mp2_ops->start(privdata, info); privdata->mp2_ops->start(privdata, info);
cl_data->sensor_sts[i] = 1; status = amd_sfh_wait_for_response
(privdata, cl_data->sensor_idx[i], SENSOR_ENABLED);
if (status == SENSOR_ENABLED)
cl_data->sensor_sts[i] = SENSOR_ENABLED;
} }
schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP)); schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
return 0; return 0;
@ -224,10 +237,17 @@ int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata)
{ {
struct amdtp_cl_data *cl_data = privdata->cl_data; struct amdtp_cl_data *cl_data = privdata->cl_data;
struct amd_input_data *in_data = cl_data->in_data; struct amd_input_data *in_data = cl_data->in_data;
int i; int i, status;
for (i = 0; i < cl_data->num_hid_devices; i++) for (i = 0; i < cl_data->num_hid_devices; i++) {
privdata->mp2_ops->stop(privdata, i); if (cl_data->sensor_sts[i] == SENSOR_ENABLED) {
privdata->mp2_ops->stop(privdata, cl_data->sensor_idx[i]);
status = amd_sfh_wait_for_response
(privdata, cl_data->sensor_idx[i], SENSOR_DISABLED);
if (status != SENSOR_ENABLED)
cl_data->sensor_sts[i] = SENSOR_DISABLED;
}
}
cancel_delayed_work_sync(&cl_data->work); cancel_delayed_work_sync(&cl_data->work);
cancel_delayed_work_sync(&cl_data->work_buffer); cancel_delayed_work_sync(&cl_data->work_buffer);

View File

@ -13,6 +13,7 @@
#include <linux/dmi.h> #include <linux/dmi.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/io-64-nonatomic-lo-hi.h> #include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/iopoll.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/slab.h> #include <linux/slab.h>
@ -31,6 +32,20 @@ static int sensor_mask_override = -1;
module_param_named(sensor_mask, sensor_mask_override, int, 0444); module_param_named(sensor_mask, sensor_mask_override, int, 0444);
MODULE_PARM_DESC(sensor_mask, "override the detected sensors mask"); MODULE_PARM_DESC(sensor_mask, "override the detected sensors mask");
static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts)
{
union cmd_response cmd_resp;
/* Get response with status within a max of 800 ms timeout */
if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
(cmd_resp.response_v2.response == sensor_sts &&
cmd_resp.response_v2.status == 0 && (sid == 0xff ||
cmd_resp.response_v2.sensor_id == sid)), 500, 800000))
return cmd_resp.response_v2.response;
return SENSOR_DISABLED;
}
static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info) static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
{ {
union sfh_cmd_base cmd_base; union sfh_cmd_base cmd_base;
@ -183,6 +198,7 @@ static const struct amd_mp2_ops amd_sfh_ops_v2 = {
.start = amd_start_sensor_v2, .start = amd_start_sensor_v2,
.stop = amd_stop_sensor_v2, .stop = amd_stop_sensor_v2,
.stop_all = amd_stop_all_sensor_v2, .stop_all = amd_stop_all_sensor_v2,
.response = amd_sfh_wait_response_v2,
}; };
static const struct amd_mp2_ops amd_sfh_ops = { static const struct amd_mp2_ops amd_sfh_ops = {

View File

@ -24,12 +24,16 @@
#define AMD_C2P_MSG2 0x10508 #define AMD_C2P_MSG2 0x10508
#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
/* MP2 P2C Message Registers */ /* MP2 P2C Message Registers */
#define AMD_P2C_MSG3 0x1068C /* Supported Sensors info */ #define AMD_P2C_MSG3 0x1068C /* Supported Sensors info */
#define V2_STATUS 0x2 #define V2_STATUS 0x2
#define SENSOR_ENABLED 4
#define SENSOR_DISABLED 5
#define HPD_IDX 16 #define HPD_IDX 16
/* SFH Command register */ /* SFH Command register */
@ -51,6 +55,19 @@ union sfh_cmd_base {
} cmd_v2; } cmd_v2;
}; };
union cmd_response {
u32 resp;
struct {
u32 status : 2;
u32 out_in_c2p : 1;
u32 rsvd1 : 1;
u32 response : 4;
u32 sub_cmd : 8;
u32 sensor_id : 6;
u32 rsvd2 : 10;
} response_v2;
};
union sfh_cmd_param { union sfh_cmd_param {
u32 ul; u32 ul;
struct { struct {
@ -117,5 +134,6 @@ struct amd_mp2_ops {
void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx); void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
void (*stop_all)(struct amd_mp2_dev *privdata); void (*stop_all)(struct amd_mp2_dev *privdata);
int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
}; };
#endif #endif