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ARM development updates for v6.12-rc1

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- clean up TTBCR magic numbers and use u32 for this register
 - fix clang issue in VFP code leading to kernel oops, caused by
   compiler instruction scheduling.
 - switch 32-bit Arm to use GENERIC_CPU_DEVICES and use the
   arch_cpu_is_hotpluggable() hook.
 - pass struct device to arm_iommu_create_mapping() and move over
   to use iommu_paging_domain_alloc() rather than iommu_domain_alloc()
 - make amba_bustype constant
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux

Pull ARM updates from Russell King:

 - clean up TTBCR magic numbers and use u32 for this register

 - fix clang issue in VFP code leading to kernel oops, caused by
   compiler instruction scheduling.

 - switch 32-bit Arm to use GENERIC_CPU_DEVICES and use the
   arch_cpu_is_hotpluggable() hook.

 - pass struct device to arm_iommu_create_mapping() and move over to use
   iommu_paging_domain_alloc() rather than iommu_domain_alloc()

 - make amba_bustype constant

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux:
  ARM: 9418/1: dma-mapping: Use iommu_paging_domain_alloc()
  ARM: 9417/1: dma-mapping: Pass device to arm_iommu_create_mapping()
  ARM: 9416/1: amba: make amba_bustype constant
  ARM: 9412/1: Convert to arch_cpu_is_hotpluggable()
  ARM: 9411/1: Switch over to GENERIC_CPU_DEVICES using arch_register_cpu()
  ARM: 9410/1: vfp: Use asm volatile in fmrx/fmxr macros
  ARM: 9409/1: mmu: Do not use magic number for TTBCR settings
This commit is contained in:
Linus Torvalds 2024-09-16 06:32:08 +02:00
commit 1636f57c78
14 changed files with 50 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@ -64,6 +64,7 @@ config ARM
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select GENERIC_IRQ_IPI if SMP
select GENERIC_CPU_AUTOPROBE
select GENERIC_CPU_DEVICES
select GENERIC_EARLY_IOREMAP
select GENERIC_IDLE_POLL_SETUP
select GENERIC_IRQ_MULTI_HANDLER

1
arch/arm/include/asm/cpu.h
View File

@ -11,7 +11,6 @@
#include <linux/cpu.h>
struct cpuinfo_arm {
struct cpu cpu;
u32 cpuid;
#ifdef CONFIG_SMP
unsigned int loops_per_jiffy;

2
arch/arm/include/asm/dma-iommu.h
View File

@ -24,7 +24,7 @@ struct dma_iommu_mapping {
};
struct dma_iommu_mapping *
arm_iommu_create_mapping(const struct bus_type *bus, dma_addr_t base, u64 size);
arm_iommu_create_mapping(struct device *dev, dma_addr_t base, u64 size);
void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping);

5
arch/arm/include/asm/pgtable-3level-hwdef.h
View File

@ -106,6 +106,11 @@
/*
* TTBCR register bits.
*
* The ORGN0 and IRGN0 bits enables different forms of caching when
* walking the translation table. Clearing these bits (which is claimed
* to be the reset default) means "normal memory, [outer|inner]
* non-cacheable"
*/
#define TTBCR_EAE (1 << 31)
#define TTBCR_IMP (1 << 30)

14
arch/arm/kernel/setup.c
View File

@ -1201,20 +1201,10 @@ void __init setup_arch(char **cmdline_p)
mdesc->init_early();
}
static int __init topology_init(void)
bool arch_cpu_is_hotpluggable(int num)
{
int cpu;
for_each_possible_cpu(cpu) {
struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
cpuinfo->cpu.hotpluggable = platform_can_hotplug_cpu(cpu);
register_cpu(&cpuinfo->cpu, cpu);
}
return 0;
return platform_can_hotplug_cpu(num);
}
subsys_initcall(topology_init);
#ifdef CONFIG_HAVE_PROC_CPU
static int __init proc_cpu_init(void)

12
arch/arm/mm/dma-mapping.c
View File

@ -1532,7 +1532,7 @@ static const struct dma_map_ops iommu_ops = {
/**
* arm_iommu_create_mapping
* @bus: pointer to the bus holding the client device (for IOMMU calls)
* @dev: pointer to the client device (for IOMMU calls)
* @base: start address of the valid IO address space
* @size: maximum size of the valid IO address space
*
@ -1544,7 +1544,7 @@ static const struct dma_map_ops iommu_ops = {
* arm_iommu_attach_device function.
*/
struct dma_iommu_mapping *
arm_iommu_create_mapping(const struct bus_type *bus, dma_addr_t base, u64 size)
arm_iommu_create_mapping(struct device *dev, dma_addr_t base, u64 size)
{
unsigned int bits = size >> PAGE_SHIFT;
unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
@ -1585,9 +1585,11 @@ arm_iommu_create_mapping(const struct bus_type *bus, dma_addr_t base, u64 size)
spin_lock_init(&mapping->lock);
mapping->domain = iommu_domain_alloc(bus);
if (!mapping->domain)
mapping->domain = iommu_paging_domain_alloc(dev);
if (IS_ERR(mapping->domain)) {
err = PTR_ERR(mapping->domain);
goto err4;
}
kref_init(&mapping->kref);
return mapping;
@ -1718,7 +1720,7 @@ static void arm_setup_iommu_dma_ops(struct device *dev)
dma_base = dma_range_map_min(dev->dma_range_map);
size = dma_range_map_max(dev->dma_range_map) - dma_base;
}
mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
mapping = arm_iommu_create_mapping(dev, dma_base, size);
if (IS_ERR(mapping)) {
pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
size, dev_name(dev));

6
arch/arm/mm/mmu.c
View File

@ -1638,7 +1638,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
{
pgtables_remap *lpae_pgtables_remap;
unsigned long pa_pgd;
unsigned int cr, ttbcr;
u32 cr, ttbcr, tmp;
long long offset;
if (!mdesc->pv_fixup)
@ -1688,7 +1688,9 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
cr = get_cr();
set_cr(cr & ~(CR_I | CR_C));
ttbcr = cpu_get_ttbcr();
cpu_set_ttbcr(ttbcr & ~(3 << 8 | 3 << 10));
/* Disable all kind of caching of the translation table */
tmp = ttbcr & ~(TTBCR_ORGN0_MASK | TTBCR_IRGN0_MASK);
cpu_set_ttbcr(tmp);
flush_cache_all();
/*

44
arch/arm/vfp/vfpinstr.h
View File

@ -64,33 +64,37 @@
#ifdef CONFIG_AS_VFP_VMRS_FPINST
#define fmrx(_vfp_) ({ \
u32 __v; \
asm(".fpu vfpv2\n" \
"vmrs %0, " #_vfp_ \
: "=r" (__v) : : "cc"); \
__v; \
})
#define fmrx(_vfp_) ({ \
u32 __v; \
asm volatile (".fpu vfpv2\n" \
"vmrs %0, " #_vfp_ \
: "=r" (__v) : : "cc"); \
__v; \
})
#define fmxr(_vfp_,_var_) \
asm(".fpu vfpv2\n" \
"vmsr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc")
#define fmxr(_vfp_, _var_) ({ \
asm volatile (".fpu vfpv2\n" \
"vmsr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc"); \
})
#else
#define vfpreg(_vfp_) #_vfp_
#define fmrx(_vfp_) ({ \
u32 __v; \
asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \
: "=r" (__v) : : "cc"); \
__v; \
})
#define fmrx(_vfp_) ({ \
u32 __v; \
asm volatile ("mrc p10, 7, %0, " vfpreg(_vfp_) "," \
"cr0, 0 @ fmrx %0, " #_vfp_ \
: "=r" (__v) : : "cc"); \
__v; \
})
#define fmxr(_vfp_,_var_) \
asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc")
#define fmxr(_vfp_, _var_) ({ \
asm volatile ("mcr p10, 7, %0, " vfpreg(_vfp_) "," \
"cr0, 0 @ fmxr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc"); \
})
#endif

2
drivers/amba/bus.c
View File

@ -435,7 +435,7 @@ static const struct dev_pm_ops amba_pm = {
* DMA configuration for platform and AMBA bus is same. So here we reuse
* platform's DMA config routine.
*/
struct bus_type amba_bustype = {
const struct bus_type amba_bustype = {
.name = "amba",
.dev_groups = amba_dev_groups,
.match = amba_match,

2
drivers/gpu/drm/exynos/exynos_drm_dma.c
View File

@ -110,7 +110,7 @@ int exynos_drm_register_dma(struct drm_device *drm, struct device *dev,
void *mapping = NULL;
if (IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU))
mapping = arm_iommu_create_mapping(&platform_bus_type,
mapping = arm_iommu_create_mapping(dev,
EXYNOS_DEV_ADDR_START, EXYNOS_DEV_ADDR_SIZE);
else if (IS_ENABLED(CONFIG_IOMMU_DMA))
mapping = iommu_get_domain_for_dev(priv->dma_dev);

3
drivers/iommu/ipmmu-vmsa.c
View File

@ -804,8 +804,7 @@ static int ipmmu_init_arm_mapping(struct device *dev)
if (!mmu->mapping) {
struct dma_iommu_mapping *mapping;
mapping = arm_iommu_create_mapping(&platform_bus_type,
SZ_1G, SZ_2G);
mapping = arm_iommu_create_mapping(dev, SZ_1G, SZ_2G);
if (IS_ERR(mapping)) {
dev_err(mmu->dev, "failed to create ARM IOMMU mapping\n");
ret = PTR_ERR(mapping);

3
drivers/iommu/mtk_iommu_v1.c
View File

@ -433,8 +433,7 @@ static int mtk_iommu_v1_create_mapping(struct device *dev,
mtk_mapping = data->mapping;
if (!mtk_mapping) {
/* MTK iommu support 4GB iova address space. */
mtk_mapping = arm_iommu_create_mapping(&platform_bus_type,
0, 1ULL << 32);
mtk_mapping = arm_iommu_create_mapping(dev, 0, 1ULL << 32);
if (IS_ERR(mtk_mapping))
return PTR_ERR(mtk_mapping);

2
drivers/media/platform/ti/omap3isp/isp.c
View File

@ -1965,7 +1965,7 @@ static int isp_attach_iommu(struct isp_device *isp)
* Create the ARM mapping, used by the ARM DMA mapping core to allocate
* VAs. This will allocate a corresponding IOMMU domain.
*/
mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
mapping = arm_iommu_create_mapping(isp->dev, SZ_1G, SZ_2G);
if (IS_ERR(mapping)) {
dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
return PTR_ERR(mapping);

2
include/linux/amba/bus.h
View File

@ -105,7 +105,7 @@ enum amba_vendor {
AMBA_VENDOR_LSI = 0xb6,
};
extern struct bus_type amba_bustype;
extern const struct bus_type amba_bustype;
#define to_amba_device(d) container_of_const(d, struct amba_device, dev)