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ARM: dts: omap3-beagle: Use OMAP3_*_IOPAD pinmux macros
Use the pinmux IOPAD macros to define the register absolute physical address instead of the offset from the padconf base address. This makes the DTS easier to read since matches the addresses listed in the Technical Reference Manual. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -171,7 +171,7 @@
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&omap3_pmx_wkup {
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gpio1_pins: pinmux_gpio1_pins {
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pinctrl-single,pins = <
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0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
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OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
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>;
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};
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};
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@ -195,47 +195,47 @@
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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>;
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};
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tfp410_pins: pinmux_tfp410_pins {
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pinctrl-single,pins = <
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0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
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OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
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>;
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};
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dss_dpi_pins: pinmux_dss_dpi_pins {
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pinctrl-single,pins = <
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0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
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0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
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0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
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0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
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0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
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0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
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OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
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OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
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OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
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OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
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OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
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>;
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};
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};
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