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usb: host: xhci-tegra: Selectively program IPFS
Starting with Tegra186, the XUSB controller no longer has the IPFS wrapper. This commit adds a "has_ipfs" field to struct tegra_xusb_soc that can be used to declare the existence of the IPFS wrapper. For the existing chips (i.e. Tegra124 and Tegra210), the new field is set to true. A future patch adding support for Tegra186 will set it to false. Signed-off-by: JC Kuo <jckuo@nvidia.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -161,6 +161,7 @@ struct tegra_xusb_soc {
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} ports;
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bool scale_ss_clock;
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bool has_ipfs;
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};
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struct tegra_xusb {
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@ -637,16 +638,18 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void *data)
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return IRQ_HANDLED;
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}
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static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra,
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struct resource *regs)
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static void tegra_xusb_config(struct tegra_xusb *tegra,
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struct resource *regs)
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{
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u32 value;
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value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0);
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value |= IPFS_EN_FPCI;
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ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0);
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if (tegra->soc->has_ipfs) {
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value = ipfs_readl(tegra, IPFS_XUSB_HOST_CONFIGURATION_0);
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value |= IPFS_EN_FPCI;
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ipfs_writel(tegra, value, IPFS_XUSB_HOST_CONFIGURATION_0);
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usleep_range(10, 20);
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usleep_range(10, 20);
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}
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/* Program BAR0 space */
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value = fpci_readl(tegra, XUSB_CFG_4);
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@ -661,13 +664,15 @@ static void tegra_xusb_ipfs_config(struct tegra_xusb *tegra,
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value |= XUSB_IO_SPACE_EN | XUSB_MEM_SPACE_EN | XUSB_BUS_MASTER_EN;
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fpci_writel(tegra, value, XUSB_CFG_1);
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/* Enable interrupt assertion */
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value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0);
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value |= IPFS_IP_INT_MASK;
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ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0);
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if (tegra->soc->has_ipfs) {
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/* Enable interrupt assertion */
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value = ipfs_readl(tegra, IPFS_XUSB_HOST_INTR_MASK_0);
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value |= IPFS_IP_INT_MASK;
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ipfs_writel(tegra, value, IPFS_XUSB_HOST_INTR_MASK_0);
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/* Set hysteresis */
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ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0);
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/* Set hysteresis */
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ipfs_writel(tegra, 0x80, IPFS_XUSB_HOST_CLKGATE_HYSTERESIS_0);
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}
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}
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static int tegra_xusb_clk_enable(struct tegra_xusb *tegra)
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@ -1015,10 +1020,12 @@ static int tegra_xusb_probe(struct platform_device *pdev)
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if (IS_ERR(tegra->fpci_base))
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return PTR_ERR(tegra->fpci_base);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(tegra->ipfs_base))
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return PTR_ERR(tegra->ipfs_base);
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if (tegra->soc->has_ipfs) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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tegra->ipfs_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(tegra->ipfs_base))
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return PTR_ERR(tegra->ipfs_base);
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}
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tegra->xhci_irq = platform_get_irq(pdev, 0);
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if (tegra->xhci_irq < 0)
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@ -1208,7 +1215,7 @@ static int tegra_xusb_probe(struct platform_device *pdev)
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goto disable_rpm;
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}
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tegra_xusb_ipfs_config(tegra, regs);
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tegra_xusb_config(tegra, regs);
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err = tegra_xusb_load_firmware(tegra);
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if (err < 0) {
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@ -1380,6 +1387,7 @@ static const struct tegra_xusb_soc tegra124_soc = {
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.usb3 = { .offset = 0, .count = 2, },
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},
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.scale_ss_clock = true,
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.has_ipfs = true,
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};
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MODULE_FIRMWARE("nvidia/tegra124/xusb.bin");
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@ -1411,6 +1419,7 @@ static const struct tegra_xusb_soc tegra210_soc = {
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.usb3 = { .offset = 0, .count = 4, },
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},
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.scale_ss_clock = false,
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.has_ipfs = true,
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};
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MODULE_FIRMWARE("nvidia/tegra210/xusb.bin");
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