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Merge branch 'drivers/rtc-sa1100' into next/drivers
* drivers/rtc-sa1100: ARM: sa1100: clean up of the clock support ARM: pxa: add dummy clock for sa1100-rtc RTC: sa1100: support sa1100, pxa and mmp soc families RTC: sa1100: remove redundant code of setting alarm RTC: sa1100: Clean out ost register Conflicts: arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c
This commit is contained in:
commit
15db3e823c
@ -741,7 +741,7 @@ config ARCH_SA1100
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select ARCH_HAS_CPUFREQ
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select CPU_FREQ
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select GENERIC_CLOCKEVENTS
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select HAVE_SCHED_CLOCK
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select TICK_ONESHOT
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select ARCH_REQUIRE_GPIOLIB
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@ -415,9 +415,29 @@ static struct resource pxa_rtc_resources[] = {
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},
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};
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static struct resource sa1100_rtc_resources[] = {
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[0] = {
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.start = 0x40900000,
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.end = 0x409000ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_RTC1Hz,
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.end = IRQ_RTC1Hz,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_RTCAlrm,
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.end = IRQ_RTCAlrm,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device sa1100_device_rtc = {
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.name = "sa1100-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa1100_rtc_resources),
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.resource = sa1100_rtc_resources,
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};
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struct platform_device pxa_device_rtc = {
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@ -210,6 +210,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
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INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
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INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
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INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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};
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static struct clk_lookup pxa25x_hwuart_clkreg =
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@ -231,6 +231,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
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INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
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INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
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INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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};
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#ifdef CONFIG_PM
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@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
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static struct clk_lookup common_clkregs[] = {
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INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
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INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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};
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static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
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@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
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static struct clk_lookup pxa320_clkregs[] = {
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INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
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INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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};
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static int __init pxa320_init(void)
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@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
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INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
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/* Power I2C clock is always on */
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INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
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INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
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INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
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@ -217,6 +217,7 @@ static struct clk_lookup pxa95x_clkregs[] = {
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INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
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/* Power I2C clock is always on */
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INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
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INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
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INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
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@ -11,17 +11,39 @@
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <linux/clkdev.h>
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#include <mach/hardware.h>
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/*
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* Very simple clock implementation - we only have one clock to deal with.
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*/
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struct clkops {
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void (*enable)(struct clk *);
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void (*disable)(struct clk *);
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unsigned long (*getrate)(struct clk *);
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};
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struct clk {
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const struct clkops *ops;
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unsigned long rate;
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unsigned int enabled;
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};
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static void clk_gpio27_enable(void)
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#define INIT_CLKREG(_clk, _devname, _conname) \
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{ \
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.clk = _clk, \
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.dev_id = _devname, \
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.con_id = _conname, \
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}
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#define DEFINE_CLK(_name, _ops, _rate) \
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struct clk clk_##_name = { \
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.ops = _ops, \
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.rate = _rate, \
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}
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static DEFINE_SPINLOCK(clocks_lock);
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static void clk_gpio27_enable(struct clk *clk)
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{
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/*
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* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
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@ -32,38 +54,22 @@ static void clk_gpio27_enable(void)
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TUCR = TUCR_3_6864MHz;
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}
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static void clk_gpio27_disable(void)
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static void clk_gpio27_disable(struct clk *clk)
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{
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TUCR = 0;
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GPDR &= ~GPIO_32_768kHz;
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GAFR &= ~GPIO_32_768kHz;
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}
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static struct clk clk_gpio27;
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static DEFINE_SPINLOCK(clocks_lock);
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struct clk *clk_get(struct device *dev, const char *id)
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{
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const char *devname = dev_name(dev);
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return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk_gpio27_enable();
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clk->ops->enable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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@ -76,13 +82,48 @@ void clk_disable(struct clk *clk)
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk_gpio27_disable();
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clk->ops->disable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return 3686400;
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unsigned long rate;
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rate = clk->rate;
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if (clk->ops->getrate)
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rate = clk->ops->getrate(clk);
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return rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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const struct clkops clk_gpio27_ops = {
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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static void clk_dummy_enable(struct clk *clk) { }
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static void clk_dummy_disable(struct clk *clk) { }
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const struct clkops clk_dummy_ops = {
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.enable = clk_dummy_enable,
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.disable = clk_dummy_disable,
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};
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static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
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static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
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static struct clk_lookup sa11xx_clkregs[] = {
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INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
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INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
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};
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static int __init sa11xx_clk_init(void)
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{
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clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
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return 0;
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}
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postcore_initcall(sa11xx_clk_init);
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@ -334,9 +334,29 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
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sa11x0_register_device(&sa11x0ir_device, irda);
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}
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static struct resource sa11x0rtc_resources[] = {
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[0] = {
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.start = 0x90010000,
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.end = 0x900100ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_RTC1Hz,
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.end = IRQ_RTC1Hz,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_RTCAlrm,
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.end = IRQ_RTCAlrm,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sa11x0rtc_device = {
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.name = "sa1100-rtc",
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.id = -1,
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.resource = sa11x0rtc_resources,
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.num_resources = ARRAY_SIZE(sa11x0rtc_resources),
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};
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static struct platform_device *sa11x0_devices[] __initdata = {
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@ -774,7 +774,7 @@ config RTC_DRV_EP93XX
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config RTC_DRV_SA1100
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tristate "SA11x0/PXA2xx"
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depends on ARCH_SA1100 || ARCH_PXA
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depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP
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help
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If you say Y here you will get access to the real time clock
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built into your SA11x0 or PXA2xx CPU.
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@ -27,35 +27,42 @@
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/interrupt.h>
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#include <linux/string.h>
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#include <linux/pm.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#ifdef CONFIG_ARCH_PXA
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#include <mach/regs-rtc.h>
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#include <mach/regs-ost.h>
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#endif
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#define RTC_DEF_DIVIDER (32768 - 1)
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#define RTC_DEF_TRIM 0
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#define RTC_FREQ 1024
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static const unsigned long RTC_FREQ = 1024;
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static struct rtc_time rtc_alarm;
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static DEFINE_SPINLOCK(sa1100_rtc_lock);
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#define RCNR 0x00 /* RTC Count Register */
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#define RTAR 0x04 /* RTC Alarm Register */
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#define RTSR 0x08 /* RTC Status Register */
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#define RTTR 0x0c /* RTC Timer Trim Register */
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static inline int rtc_periodic_alarm(struct rtc_time *tm)
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{
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return (tm->tm_year == -1) ||
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((unsigned)tm->tm_mon >= 12) ||
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((unsigned)(tm->tm_mday - 1) >= 31) ||
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((unsigned)tm->tm_hour > 23) ||
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((unsigned)tm->tm_min > 59) ||
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((unsigned)tm->tm_sec > 59);
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}
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#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
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#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
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#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
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#define RTSR_AL (1 << 0) /* RTC alarm detected */
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#define rtc_readl(sa1100_rtc, reg) \
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readl_relaxed((sa1100_rtc)->base + (reg))
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#define rtc_writel(sa1100_rtc, reg, value) \
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writel_relaxed((value), (sa1100_rtc)->base + (reg))
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struct sa1100_rtc {
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struct resource *ress;
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void __iomem *base;
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struct clk *clk;
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int irq_1Hz;
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int irq_Alrm;
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struct rtc_device *rtc;
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spinlock_t lock; /* Protects this structure */
|
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};
|
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/*
|
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* Calculate the next alarm time given the requested alarm time mask
|
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* and the current time.
|
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@ -83,46 +90,26 @@ static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
|
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}
|
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}
|
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|
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static int rtc_update_alarm(struct rtc_time *alrm)
|
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{
|
||||
struct rtc_time alarm_tm, now_tm;
|
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unsigned long now, time;
|
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int ret;
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|
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do {
|
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now = RCNR;
|
||||
rtc_time_to_tm(now, &now_tm);
|
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rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
|
||||
ret = rtc_tm_to_time(&alarm_tm, &time);
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if (ret != 0)
|
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break;
|
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|
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RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
|
||||
RTAR = time;
|
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} while (now != RCNR);
|
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|
||||
return ret;
|
||||
}
|
||||
|
||||
static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev_id);
|
||||
struct rtc_device *rtc = platform_get_drvdata(pdev);
|
||||
struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
|
||||
unsigned int rtsr;
|
||||
unsigned long events = 0;
|
||||
|
||||
spin_lock(&sa1100_rtc_lock);
|
||||
spin_lock(&sa1100_rtc->lock);
|
||||
|
||||
rtsr = RTSR;
|
||||
/* clear interrupt sources */
|
||||
RTSR = 0;
|
||||
rtsr = rtc_readl(sa1100_rtc, RTSR);
|
||||
rtc_writel(sa1100_rtc, RTSR, 0);
|
||||
|
||||
/* Fix for a nasty initialization problem the in SA11xx RTSR register.
|
||||
* See also the comments in sa1100_rtc_probe(). */
|
||||
if (rtsr & (RTSR_ALE | RTSR_HZE)) {
|
||||
/* This is the original code, before there was the if test
|
||||
* above. This code does not clear interrupts that were not
|
||||
* enabled. */
|
||||
RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
|
||||
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2));
|
||||
} else {
|
||||
/* For some reason, it is possible to enter this routine
|
||||
* without interruptions enabled, it has been tested with
|
||||
@ -131,13 +118,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
|
||||
* This situation leads to an infinite "loop" of interrupt
|
||||
* routine calling and as a result the processor seems to
|
||||
* lock on its first call to open(). */
|
||||
RTSR = RTSR_AL | RTSR_HZ;
|
||||
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
|
||||
}
|
||||
|
||||
/* clear alarm interrupt if it has occurred */
|
||||
if (rtsr & RTSR_AL)
|
||||
rtsr &= ~RTSR_ALE;
|
||||
RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
|
||||
rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE));
|
||||
|
||||
/* update irq data & counter */
|
||||
if (rtsr & RTSR_AL)
|
||||
@ -145,91 +132,100 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
|
||||
if (rtsr & RTSR_HZ)
|
||||
events |= RTC_UF | RTC_IRQF;
|
||||
|
||||
rtc_update_irq(rtc, 1, events);
|
||||
rtc_update_irq(sa1100_rtc->rtc, 1, events);
|
||||
|
||||
if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
|
||||
rtc_update_alarm(&rtc_alarm);
|
||||
|
||||
spin_unlock(&sa1100_rtc_lock);
|
||||
spin_unlock(&sa1100_rtc->lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_open(struct device *dev)
|
||||
{
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
struct platform_device *plat_dev = to_platform_device(dev);
|
||||
struct rtc_device *rtc = platform_get_drvdata(plat_dev);
|
||||
|
||||
ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
|
||||
"rtc 1Hz", dev);
|
||||
ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt,
|
||||
IRQF_DISABLED, "rtc 1Hz", dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
|
||||
dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz);
|
||||
goto fail_ui;
|
||||
}
|
||||
ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
|
||||
"rtc Alrm", dev);
|
||||
ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt,
|
||||
IRQF_DISABLED, "rtc Alrm", dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
|
||||
dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm);
|
||||
goto fail_ai;
|
||||
}
|
||||
rtc->max_user_freq = RTC_FREQ;
|
||||
rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
|
||||
sa1100_rtc->rtc->max_user_freq = RTC_FREQ;
|
||||
rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ);
|
||||
|
||||
return 0;
|
||||
|
||||
fail_ai:
|
||||
free_irq(IRQ_RTC1Hz, dev);
|
||||
free_irq(sa1100_rtc->irq_1Hz, dev);
|
||||
fail_ui:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sa1100_rtc_release(struct device *dev)
|
||||
{
|
||||
spin_lock_irq(&sa1100_rtc_lock);
|
||||
RTSR = 0;
|
||||
OIER &= ~OIER_E1;
|
||||
OSSR = OSSR_M1;
|
||||
spin_unlock_irq(&sa1100_rtc_lock);
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
|
||||
free_irq(IRQ_RTCAlrm, dev);
|
||||
free_irq(IRQ_RTC1Hz, dev);
|
||||
spin_lock_irq(&sa1100_rtc->lock);
|
||||
rtc_writel(sa1100_rtc, RTSR, 0);
|
||||
spin_unlock_irq(&sa1100_rtc->lock);
|
||||
|
||||
free_irq(sa1100_rtc->irq_Alrm, dev);
|
||||
free_irq(sa1100_rtc->irq_1Hz, dev);
|
||||
}
|
||||
|
||||
static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
||||
{
|
||||
spin_lock_irq(&sa1100_rtc_lock);
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
unsigned int rtsr;
|
||||
|
||||
spin_lock_irq(&sa1100_rtc->lock);
|
||||
|
||||
rtsr = rtc_readl(sa1100_rtc, RTSR);
|
||||
if (enabled)
|
||||
RTSR |= RTSR_ALE;
|
||||
rtsr |= RTSR_ALE;
|
||||
else
|
||||
RTSR &= ~RTSR_ALE;
|
||||
spin_unlock_irq(&sa1100_rtc_lock);
|
||||
rtsr &= ~RTSR_ALE;
|
||||
rtc_writel(sa1100_rtc, RTSR, rtsr);
|
||||
|
||||
spin_unlock_irq(&sa1100_rtc->lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
|
||||
{
|
||||
rtc_time_to_tm(RCNR, tm);
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
|
||||
rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
|
||||
{
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
unsigned long time;
|
||||
int ret;
|
||||
|
||||
ret = rtc_tm_to_time(tm, &time);
|
||||
if (ret == 0)
|
||||
RCNR = time;
|
||||
rtc_writel(sa1100_rtc, RCNR, time);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
||||
{
|
||||
u32 rtsr;
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
unsigned long time;
|
||||
unsigned int rtsr;
|
||||
|
||||
memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
|
||||
rtsr = RTSR;
|
||||
time = rtc_readl(sa1100_rtc, RCNR);
|
||||
rtc_time_to_tm(time, &alrm->time);
|
||||
rtsr = rtc_readl(sa1100_rtc, RTSR);
|
||||
alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
|
||||
alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
|
||||
return 0;
|
||||
@ -237,26 +233,39 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
||||
|
||||
static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
||||
{
|
||||
int ret;
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
struct rtc_time now_tm, alarm_tm;
|
||||
unsigned long time, alarm;
|
||||
unsigned int rtsr;
|
||||
|
||||
spin_lock_irq(&sa1100_rtc_lock);
|
||||
ret = rtc_update_alarm(&alrm->time);
|
||||
if (ret == 0) {
|
||||
if (alrm->enabled)
|
||||
RTSR |= RTSR_ALE;
|
||||
else
|
||||
RTSR &= ~RTSR_ALE;
|
||||
}
|
||||
spin_unlock_irq(&sa1100_rtc_lock);
|
||||
spin_lock_irq(&sa1100_rtc->lock);
|
||||
|
||||
return ret;
|
||||
time = rtc_readl(sa1100_rtc, RCNR);
|
||||
rtc_time_to_tm(time, &now_tm);
|
||||
rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
|
||||
rtc_tm_to_time(&alarm_tm, &alarm);
|
||||
rtc_writel(sa1100_rtc, RTAR, alarm);
|
||||
|
||||
rtsr = rtc_readl(sa1100_rtc, RTSR);
|
||||
if (alrm->enabled)
|
||||
rtsr |= RTSR_ALE;
|
||||
else
|
||||
rtsr &= ~RTSR_ALE;
|
||||
rtc_writel(sa1100_rtc, RTSR, rtsr);
|
||||
|
||||
spin_unlock_irq(&sa1100_rtc->lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
|
||||
{
|
||||
seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
|
||||
seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
|
||||
seq_printf(seq, "trim/divider\t\t: 0x%08x\n",
|
||||
rtc_readl(sa1100_rtc, RTTR));
|
||||
seq_printf(seq, "RTSR\t\t\t: 0x%08x\n",
|
||||
rtc_readl(sa1100_rtc, RTSR));
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -273,7 +282,51 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
|
||||
|
||||
static int sa1100_rtc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct rtc_device *rtc;
|
||||
struct sa1100_rtc *sa1100_rtc;
|
||||
unsigned int rttr;
|
||||
int ret;
|
||||
|
||||
sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
|
||||
if (!sa1100_rtc)
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_init(&sa1100_rtc->lock);
|
||||
platform_set_drvdata(pdev, sa1100_rtc);
|
||||
|
||||
ret = -ENXIO;
|
||||
sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!sa1100_rtc->ress) {
|
||||
dev_err(&pdev->dev, "No I/O memory resource defined\n");
|
||||
goto err_ress;
|
||||
}
|
||||
|
||||
sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0);
|
||||
if (sa1100_rtc->irq_1Hz < 0) {
|
||||
dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n");
|
||||
goto err_ress;
|
||||
}
|
||||
sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1);
|
||||
if (sa1100_rtc->irq_Alrm < 0) {
|
||||
dev_err(&pdev->dev, "No alarm IRQ resource defined\n");
|
||||
goto err_ress;
|
||||
}
|
||||
|
||||
ret = -ENOMEM;
|
||||
sa1100_rtc->base = ioremap(sa1100_rtc->ress->start,
|
||||
resource_size(sa1100_rtc->ress));
|
||||
if (!sa1100_rtc->base) {
|
||||
dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n");
|
||||
goto err_map;
|
||||
}
|
||||
|
||||
sa1100_rtc->clk = clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(sa1100_rtc->clk)) {
|
||||
dev_err(&pdev->dev, "failed to find rtc clock source\n");
|
||||
ret = PTR_ERR(sa1100_rtc->clk);
|
||||
goto err_clk;
|
||||
}
|
||||
clk_prepare(sa1100_rtc->clk);
|
||||
clk_enable(sa1100_rtc->clk);
|
||||
|
||||
/*
|
||||
* According to the manual we should be able to let RTTR be zero
|
||||
@ -282,24 +335,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
|
||||
* If the clock divider is uninitialized then reset it to the
|
||||
* default value to get the 1Hz clock.
|
||||
*/
|
||||
if (RTTR == 0) {
|
||||
RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
|
||||
dev_warn(&pdev->dev, "warning: "
|
||||
"initializing default clock divider/trim value\n");
|
||||
if (rtc_readl(sa1100_rtc, RTTR) == 0) {
|
||||
rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
|
||||
rtc_writel(sa1100_rtc, RTTR, rttr);
|
||||
dev_warn(&pdev->dev, "warning: initializing default clock"
|
||||
" divider/trim value\n");
|
||||
/* The current RTC value probably doesn't make sense either */
|
||||
RCNR = 0;
|
||||
rtc_writel(sa1100_rtc, RCNR, 0);
|
||||
}
|
||||
|
||||
device_init_wakeup(&pdev->dev, 1);
|
||||
|
||||
rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
|
||||
THIS_MODULE);
|
||||
|
||||
if (IS_ERR(rtc))
|
||||
return PTR_ERR(rtc);
|
||||
|
||||
platform_set_drvdata(pdev, rtc);
|
||||
|
||||
sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
|
||||
&sa1100_rtc_ops, THIS_MODULE);
|
||||
if (IS_ERR(sa1100_rtc->rtc)) {
|
||||
dev_err(&pdev->dev, "Failed to register RTC device -> %d\n",
|
||||
ret);
|
||||
goto err_rtc_reg;
|
||||
}
|
||||
/* Fix for a nasty initialization problem the in SA11xx RTSR register.
|
||||
* See also the comments in sa1100_rtc_interrupt().
|
||||
*
|
||||
@ -322,33 +375,46 @@ static int sa1100_rtc_probe(struct platform_device *pdev)
|
||||
*
|
||||
* Notice that clearing bit 1 and 0 is accomplished by writting ONES to
|
||||
* the corresponding bits in RTSR. */
|
||||
RTSR = RTSR_AL | RTSR_HZ;
|
||||
rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
|
||||
|
||||
return 0;
|
||||
|
||||
err_rtc_reg:
|
||||
err_clk:
|
||||
iounmap(sa1100_rtc->base);
|
||||
err_ress:
|
||||
err_map:
|
||||
kfree(sa1100_rtc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rtc_device *rtc = platform_get_drvdata(pdev);
|
||||
|
||||
if (rtc)
|
||||
rtc_device_unregister(rtc);
|
||||
struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
|
||||
|
||||
rtc_device_unregister(sa1100_rtc->rtc);
|
||||
clk_disable(sa1100_rtc->clk);
|
||||
clk_unprepare(sa1100_rtc->clk);
|
||||
iounmap(sa1100_rtc->base);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int sa1100_rtc_suspend(struct device *dev)
|
||||
{
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
enable_irq_wake(IRQ_RTCAlrm);
|
||||
enable_irq_wake(sa1100_rtc->irq_Alrm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sa1100_rtc_resume(struct device *dev)
|
||||
{
|
||||
struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
disable_irq_wake(IRQ_RTCAlrm);
|
||||
disable_irq_wake(sa1100_rtc->irq_Alrm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user