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clk: Add __clk_mux_determine_rate_closest
Some clock drivers want to find the closest rate on the input of a mux instead of a rate that's less than or equal to the desired rate. Add a generic mux function to support this. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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@ -690,14 +690,20 @@ struct clk *__clk_lookup(const char *name)
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return NULL;
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}
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/*
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* Helper for finding best parent to provide a given frequency. This can be used
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* directly as a determine_rate callback (e.g. for a mux), or from a more
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* complex clock that may combine a mux with other operations.
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*/
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long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p)
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static bool mux_is_better_rate(unsigned long rate, unsigned long now,
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unsigned long best, unsigned long flags)
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{
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if (flags & CLK_MUX_ROUND_CLOSEST)
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return abs(now - rate) < abs(best - rate);
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return now <= rate && now > best;
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}
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static long
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clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p,
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unsigned long flags)
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{
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struct clk *clk = hw->clk, *parent, *best_parent = NULL;
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int i, num_parents;
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@ -725,7 +731,7 @@ long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
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parent_rate = __clk_round_rate(parent, rate);
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else
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parent_rate = __clk_get_rate(parent);
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if (parent_rate <= rate && parent_rate > best) {
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if (mux_is_better_rate(rate, parent_rate, best, flags)) {
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best_parent = parent;
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best = parent_rate;
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}
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@ -738,8 +744,31 @@ out:
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return best;
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}
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/*
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* Helper for finding best parent to provide a given frequency. This can be used
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* directly as a determine_rate callback (e.g. for a mux), or from a more
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* complex clock that may combine a mux with other operations.
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*/
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long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p)
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{
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return clk_mux_determine_rate_flags(hw, rate, best_parent_rate,
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best_parent_p, 0);
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}
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EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
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long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p)
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{
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return clk_mux_determine_rate_flags(hw, rate, best_parent_rate,
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best_parent_p,
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CLK_MUX_ROUND_CLOSEST);
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}
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EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
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/*** clk api ***/
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void __clk_unprepare(struct clk *clk)
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@ -384,6 +384,8 @@ void clk_unregister_divider(struct clk *clk);
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* register, and mask of mux bits are in higher 16-bit of this register.
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* While setting the mux bits, higher 16-bit should also be updated to
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* indicate changing mux bits.
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* CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired
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* frequency.
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*/
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struct clk_mux {
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struct clk_hw hw;
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@ -398,7 +400,8 @@ struct clk_mux {
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#define CLK_MUX_INDEX_ONE BIT(0)
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#define CLK_MUX_INDEX_BIT BIT(1)
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#define CLK_MUX_HIWORD_MASK BIT(2)
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#define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */
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#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */
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#define CLK_MUX_ROUND_CLOSEST BIT(4)
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extern const struct clk_ops clk_mux_ops;
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extern const struct clk_ops clk_mux_ro_ops;
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@ -556,6 +559,9 @@ struct clk *__clk_lookup(const char *name);
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long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p);
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long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_p);
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/*
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* FIXME clock api without lock protection
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