mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-16 23:45:31 +08:00
ARM: dts: Configure system timers for omap4
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
545a95582e
commit
14b1925a72
@ -974,7 +974,6 @@
|
||||
|
||||
target-module@4000 { /* 0x4a304000, ap 17 24.0 */
|
||||
compatible = "ti,sysc-omap2", "ti,sysc";
|
||||
ti,hwmods = "counter_32k";
|
||||
reg = <0x4000 0x4>,
|
||||
<0x4004 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
@ -1139,9 +1138,8 @@
|
||||
};
|
||||
};
|
||||
|
||||
target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
|
||||
timer1_target: target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
|
||||
compatible = "ti,sysc-omap2-timer", "ti,sysc";
|
||||
ti,hwmods = "timer1";
|
||||
reg = <0x8000 0x4>,
|
||||
<0x8010 0x4>,
|
||||
<0x8014 0x4>;
|
||||
|
@ -655,3 +655,13 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Preferred always-on timer for clockevent */
|
||||
&timer1_target {
|
||||
ti,no-reset-on-init;
|
||||
ti,no-idle;
|
||||
timer@0 {
|
||||
assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
|
||||
assigned-clock-parents = <&sys_clkin_ck>;
|
||||
};
|
||||
};
|
||||
|
@ -261,7 +261,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
|
||||
.init_irq = omap_gic_of_init,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap4430_init_late,
|
||||
.init_time = omap4_local_timer_init,
|
||||
.init_time = omap_init_time_of,
|
||||
.dt_compat = omap4_boards_compat,
|
||||
.restart = omap44xx_restart,
|
||||
MACHINE_END
|
||||
|
@ -231,39 +231,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {
|
||||
* usim
|
||||
*/
|
||||
|
||||
/*
|
||||
* 'counter' class
|
||||
* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0004,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE,
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
|
||||
.name = "counter",
|
||||
.sysc = &omap44xx_counter_sysc,
|
||||
};
|
||||
|
||||
/* counter_32k */
|
||||
static struct omap_hwmod omap44xx_counter_32k_hwmod = {
|
||||
.name = "counter_32k",
|
||||
.class = &omap44xx_counter_hwmod_class,
|
||||
.clkdm_name = "l4_wkup_clkdm",
|
||||
.flags = HWMOD_SWSUP_SIDLE,
|
||||
.main_clk = "sys_32k_ck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'ctrl_module' class
|
||||
* attila core control module + core pad control module + wkup pad control
|
||||
@ -672,45 +639,6 @@ static struct omap_hwmod omap44xx_sl2if_hwmod = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'timer' class
|
||||
* general purpose timer module with accurate 1ms tick
|
||||
* This class contains several variants: ['timer_1ms', 'timer']
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
|
||||
.name = "timer",
|
||||
.sysc = &omap44xx_timer_1ms_sysc,
|
||||
};
|
||||
|
||||
/* timer1 */
|
||||
static struct omap_hwmod omap44xx_timer1_hwmod = {
|
||||
.name = "timer1",
|
||||
.class = &omap44xx_timer_1ms_hwmod_class,
|
||||
.clkdm_name = "l4_wkup_clkdm",
|
||||
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.main_clk = "dmt1_clk_mux",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_host_fs' class
|
||||
* full-speed usb host controller
|
||||
@ -1063,14 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_wkup -> counter_32k */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
|
||||
.master = &omap44xx_l4_wkup_hwmod,
|
||||
.slave = &omap44xx_counter_32k_hwmod,
|
||||
.clk = "l4_wkup_clk_mux_ck",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_cfg -> ctrl_module_core */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
@ -1199,14 +1119,6 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_wkup -> timer1 */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
|
||||
.master = &omap44xx_l4_wkup_hwmod,
|
||||
.slave = &omap44xx_timer1_hwmod,
|
||||
.clk = "l4_wkup_clk_mux_ck",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_cfg -> usb_host_fs */
|
||||
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
@ -1273,7 +1185,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&omap44xx_l4_cfg__l4_wkup,
|
||||
&omap44xx_mpu__mpu_private,
|
||||
&omap44xx_l4_cfg__ocp_wp_noc,
|
||||
&omap44xx_l4_wkup__counter_32k,
|
||||
&omap44xx_l4_cfg__ctrl_module_core,
|
||||
&omap44xx_l4_cfg__ctrl_module_pad_core,
|
||||
&omap44xx_l4_wkup__ctrl_module_wkup,
|
||||
@ -1290,7 +1201,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&omap44xx_l4_wkup__prm,
|
||||
&omap44xx_l4_wkup__scrm,
|
||||
/* &omap44xx_l3_main_2__sl2if, */
|
||||
&omap44xx_l4_wkup__timer1,
|
||||
/* &omap44xx_l4_cfg__usb_host_fs, */
|
||||
&omap44xx_l4_cfg__usb_host_hs,
|
||||
&omap44xx_l4_cfg__usb_tll_hs,
|
||||
|
Loading…
Reference in New Issue
Block a user