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[PATCH] i386: pte xchg optimization
In situations where page table updates need only be made locally, and there is no cross-processor A/D bit races involved, we need not use the heavyweight xchg instruction to atomically fetch and clear page table entries. Instead, we can just read and clear them directly. This introduces a neat optimization for non-SMP kernels; drop the atomic xchg operations from page table updates. Thanks to Michel Lespinasse for noting this potential optimization. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
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@ -41,10 +41,24 @@ static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pt
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*xp = __pte(0);
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}
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/* local pte updates need not use xchg for locking */
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static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
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{
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pte_t res;
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res = *ptep;
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native_pte_clear(NULL, 0, ptep);
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return res;
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}
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#ifdef CONFIG_SMP
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static inline pte_t native_ptep_get_and_clear(pte_t *xp)
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{
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return __pte(xchg(&xp->pte_low, 0));
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}
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#else
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#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
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#endif
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define pte_none(x) (!(x).pte_low)
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@ -139,6 +139,17 @@ static inline void pud_clear (pud_t * pud) { }
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#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
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pmd_index(address))
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/* local pte updates need not use xchg for locking */
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static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
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{
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pte_t res;
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res = *ptep;
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native_pte_clear(NULL, 0, ptep);
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return res;
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}
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#ifdef CONFIG_SMP
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static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
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{
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pte_t res;
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@ -150,6 +161,9 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
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return res;
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}
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#else
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#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
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#endif
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#define __HAVE_ARCH_PTE_SAME
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static inline int pte_same(pte_t a, pte_t b)
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