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kvm: arm64: Switch to per VM IPA limit
Now that we can manage the stage2 page table per VM, switch the configuration details to per VM instance. The VTCR is updated with the values specific to the VM based on the configuration. We store the IPA size and the number of stage2 page table levels for the guest already in VTCR. Decode it back from the vtcr field wherever we need it. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <cdall@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -197,6 +197,8 @@
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VTCR_EL2_SL0_TO_LVLS(((vtcr) & VTCR_EL2_SL0_MASK) >> VTCR_EL2_SL0_SHIFT)
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#define VTCR_EL2_FLAGS (VTCR_EL2_COMMON_BITS | VTCR_EL2_TGRAN)
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#define VTCR_EL2_IPA(vtcr) (64 - ((vtcr) & VTCR_EL2_T0SZ_MASK))
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/*
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* ARM VMSAv8-64 defines an algorithm for finding the translation table
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* descriptors in section D4.2.8 in ARM DDI 0487C.a.
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@ -142,7 +142,7 @@ static inline unsigned long __kern_hyp_va(unsigned long v)
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*/
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#define KVM_PHYS_SHIFT (40)
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#define kvm_phys_shift(kvm) KVM_PHYS_SHIFT
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#define kvm_phys_shift(kvm) VTCR_EL2_IPA(kvm->arch.vtcr)
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#define kvm_phys_size(kvm) (_AC(1, ULL) << kvm_phys_shift(kvm))
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#define kvm_phys_mask(kvm) (kvm_phys_size(kvm) - _AC(1, ULL))
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@ -43,7 +43,7 @@
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*/
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#define stage2_pgtable_levels(ipa) ARM64_HW_PGTABLE_LEVELS((ipa) - 4)
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#define STAGE2_PGTABLE_LEVELS stage2_pgtable_levels(KVM_PHYS_SHIFT)
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#define kvm_stage2_levels(kvm) stage2_pgtable_levels(kvm_phys_shift(kvm))
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#define kvm_stage2_levels(kvm) VTCR_EL2_LVLS(kvm->arch.vtcr)
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/*
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* With all the supported VA_BITs and 40bit guest IPA, the following condition
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@ -160,7 +160,7 @@ int kvm_arm_config_vm(struct kvm *kvm, unsigned long type)
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if (phys_shift > KVM_PHYS_SHIFT)
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phys_shift = KVM_PHYS_SHIFT;
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vtcr |= VTCR_EL2_T0SZ(phys_shift);
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vtcr |= VTCR_EL2_LVLS_TO_SL0(kvm_stage2_levels(kvm));
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vtcr |= VTCR_EL2_LVLS_TO_SL0(stage2_pgtable_levels(phys_shift));
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/*
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* Enable the Hardware Access Flag management, unconditionally
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