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Merge branch 'msm-fixes-4.11-rc6' of git://people.freedesktop.org/~robclark/linux into drm-fixes

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misc msm fixes.

* 'msm-fixes-4.11-rc6' of git://people.freedesktop.org/~robclark/linux:
  drm/msm: Make sure to detach the MMU during GPU cleanup
  drm/msm/hdmi: redefinitions of macros not required
  drm/msm/mdp5: Update SSPP_MAX value
  drm/msm/dsi: Fix bug in dsi_mgr_phy_enable
  drm/msm: Don't allow zero sized buffer objects
  drm/msm: Fix wrong pointer check in a5xx_destroy
  drm/msm: adreno: fix build error without debugfs
This commit is contained in:
Dave Airlie 2017-04-04 10:13:40 +10:00
commit 130e35e4bb
7 changed files with 32 additions and 24 deletions
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6
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
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@ -1,4 +1,4 @@
/* Copyright (c) 2016 The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and
@ -534,7 +534,7 @@ static void a5xx_destroy(struct msm_gpu *gpu)
} }
if (a5xx_gpu->gpmu_bo) { if (a5xx_gpu->gpmu_bo) {
if (a5xx_gpu->gpmu_bo) if (a5xx_gpu->gpmu_iova)
msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->id); msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->id);
drm_gem_object_unreference_unlocked(a5xx_gpu->gpmu_bo); drm_gem_object_unreference_unlocked(a5xx_gpu->gpmu_bo);
} }
@ -860,7 +860,9 @@ static const struct adreno_gpu_funcs funcs = {
.idle = a5xx_idle, .idle = a5xx_idle,
.irq = a5xx_irq, .irq = a5xx_irq,
.destroy = a5xx_destroy, .destroy = a5xx_destroy,
#ifdef CONFIG_DEBUG_FS
.show = a5xx_show, .show = a5xx_show,
#endif
}, },
.get_timestamp = a5xx_get_timestamp, .get_timestamp = a5xx_get_timestamp,
}; };

29
drivers/gpu/drm/msm/adreno/adreno_gpu.c
View File

@ -418,18 +418,27 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
return 0; return 0;
} }
void adreno_gpu_cleanup(struct adreno_gpu *gpu) void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
{ {
if (gpu->memptrs_bo) { struct msm_gpu *gpu = &adreno_gpu->base;
if (gpu->memptrs)
msm_gem_put_vaddr(gpu->memptrs_bo);
if (gpu->memptrs_iova) if (adreno_gpu->memptrs_bo) {
msm_gem_put_iova(gpu->memptrs_bo, gpu->base.id); if (adreno_gpu->memptrs)
msm_gem_put_vaddr(adreno_gpu->memptrs_bo);
drm_gem_object_unreference_unlocked(gpu->memptrs_bo); if (adreno_gpu->memptrs_iova)
msm_gem_put_iova(adreno_gpu->memptrs_bo, gpu->id);
drm_gem_object_unreference_unlocked(adreno_gpu->memptrs_bo);
}
release_firmware(adreno_gpu->pm4);
release_firmware(adreno_gpu->pfp);
msm_gpu_cleanup(gpu);
if (gpu->aspace) {
gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu,
iommu_ports, ARRAY_SIZE(iommu_ports));
msm_gem_address_space_destroy(gpu->aspace);
} }
release_firmware(gpu->pm4);
release_firmware(gpu->pfp);
msm_gpu_cleanup(&gpu->base);
} }

2
drivers/gpu/drm/msm/dsi/dsi_manager.c
View File

@ -171,7 +171,7 @@ dsi_mgr_phy_enable(int id,
} }
} }
} else { } else {
msm_dsi_host_reset_phy(mdsi->host); msm_dsi_host_reset_phy(msm_dsi->host);
ret = enable_phy(msm_dsi, src_pll_id, &shared_timings[id]); ret = enable_phy(msm_dsi, src_pll_id, &shared_timings[id]);
if (ret) if (ret)
return ret; return ret;

7
drivers/gpu/drm/msm/hdmi/hdmi_audio.c
View File

@ -18,13 +18,6 @@
#include <linux/hdmi.h> #include <linux/hdmi.h>
#include "hdmi.h" #include "hdmi.h"
/* Supported HDMI Audio channels */
#define MSM_HDMI_AUDIO_CHANNEL_2 0
#define MSM_HDMI_AUDIO_CHANNEL_4 1
#define MSM_HDMI_AUDIO_CHANNEL_6 2
#define MSM_HDMI_AUDIO_CHANNEL_8 3
/* maps MSM_HDMI_AUDIO_CHANNEL_n consts used by audio driver to # of channels: */ /* maps MSM_HDMI_AUDIO_CHANNEL_n consts used by audio driver to # of channels: */
static int nchannels[] = { 2, 4, 6, 8 }; static int nchannels[] = { 2, 4, 6, 8 };

3
drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h
View File

@ -18,7 +18,8 @@
#ifndef __MDP5_PIPE_H__ #ifndef __MDP5_PIPE_H__
#define __MDP5_PIPE_H__ #define __MDP5_PIPE_H__
#define SSPP_MAX (SSPP_RGB3 + 1) /* TODO: Add SSPP_MAX in mdp5.xml.h */ /* TODO: Add SSPP_MAX in mdp5.xml.h */
#define SSPP_MAX (SSPP_CURSOR1 + 1)
/* represents a hw pipe, which is dynamically assigned to a plane */ /* represents a hw pipe, which is dynamically assigned to a plane */
struct mdp5_hw_pipe { struct mdp5_hw_pipe {

6
drivers/gpu/drm/msm/msm_gem.c
View File

@ -812,6 +812,12 @@ struct drm_gem_object *msm_gem_new(struct drm_device *dev,
size = PAGE_ALIGN(size); size = PAGE_ALIGN(size);
/* Disallow zero sized objects as they make the underlying
* infrastructure grumpy
*/
if (size == 0)
return ERR_PTR(-EINVAL);
ret = msm_gem_new_impl(dev, size, flags, NULL, &obj); ret = msm_gem_new_impl(dev, size, flags, NULL, &obj);
if (ret) if (ret)
goto fail; goto fail;

3
drivers/gpu/drm/msm/msm_gpu.c
View File

@ -706,9 +706,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu)
msm_ringbuffer_destroy(gpu->rb); msm_ringbuffer_destroy(gpu->rb);
} }
if (gpu->aspace)
msm_gem_address_space_destroy(gpu->aspace);
if (gpu->fctx) if (gpu->fctx)
msm_fence_context_free(gpu->fctx); msm_fence_context_free(gpu->fctx);
} }