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spi: spi-ep93xx: remove io wrappers
The io wrappers just add obfuscation to the driver. Remove them. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
H Hartley Sweeten
Mark Brown
parent
5771a8c088
commit
1232978a0d
@ -72,7 +72,7 @@
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* struct ep93xx_spi - EP93xx SPI controller structure
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* @pdev: pointer to platform device
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* @clk: clock for the controller
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* @regs_base: pointer to ioremap()'d registers
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* @mmio: pointer to ioremap()'d registers
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* @sspdr_phys: physical address of the SSPDR register
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* @wait: wait here until given transfer is completed
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* @current_msg: message that is currently processed (or %NULL if none)
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@ -92,7 +92,7 @@
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struct ep93xx_spi {
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const struct platform_device *pdev;
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struct clk *clk;
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void __iomem *regs_base;
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void __iomem *mmio;
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unsigned long sspdr_phys;
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struct completion wait;
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struct spi_message *current_msg;
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@ -111,28 +111,6 @@ struct ep93xx_spi {
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/* converts bits per word to CR0.DSS value */
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#define bits_per_word_to_dss(bpw) ((bpw) - 1)
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static void ep93xx_spi_write_u8(const struct ep93xx_spi *espi,
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u16 reg, u8 value)
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{
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writeb(value, espi->regs_base + reg);
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}
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static u8 ep93xx_spi_read_u8(const struct ep93xx_spi *spi, u16 reg)
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{
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return readb(spi->regs_base + reg);
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}
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static void ep93xx_spi_write_u16(const struct ep93xx_spi *espi,
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u16 reg, u16 value)
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{
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writew(value, espi->regs_base + reg);
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}
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static u16 ep93xx_spi_read_u16(const struct ep93xx_spi *spi, u16 reg)
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{
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return readw(spi->regs_base + reg);
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}
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static int ep93xx_spi_enable(const struct ep93xx_spi *espi)
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{
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u8 regval;
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@ -142,9 +120,9 @@ static int ep93xx_spi_enable(const struct ep93xx_spi *espi)
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if (err)
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return err;
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regval = ep93xx_spi_read_u8(espi, SSPCR1);
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regval = readb(espi->mmio + SSPCR1);
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regval |= SSPCR1_SSE;
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ep93xx_spi_write_u8(espi, SSPCR1, regval);
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writeb(regval, espi->mmio + SSPCR1);
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return 0;
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}
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@ -153,9 +131,9 @@ static void ep93xx_spi_disable(const struct ep93xx_spi *espi)
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{
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u8 regval;
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regval = ep93xx_spi_read_u8(espi, SSPCR1);
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regval = readb(espi->mmio + SSPCR1);
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regval &= ~SSPCR1_SSE;
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ep93xx_spi_write_u8(espi, SSPCR1, regval);
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writeb(regval, espi->mmio + SSPCR1);
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clk_disable(espi->clk);
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}
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@ -164,18 +142,18 @@ static void ep93xx_spi_enable_interrupts(const struct ep93xx_spi *espi)
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{
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u8 regval;
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regval = ep93xx_spi_read_u8(espi, SSPCR1);
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regval = readb(espi->mmio + SSPCR1);
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regval |= (SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
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ep93xx_spi_write_u8(espi, SSPCR1, regval);
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writeb(regval, espi->mmio + SSPCR1);
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}
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static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi)
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{
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u8 regval;
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regval = ep93xx_spi_read_u8(espi, SSPCR1);
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regval = readb(espi->mmio + SSPCR1);
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regval &= ~(SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE);
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ep93xx_spi_write_u8(espi, SSPCR1, regval);
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writeb(regval, espi->mmio + SSPCR1);
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}
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/**
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@ -252,8 +230,8 @@ static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
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spi->mode, div_cpsr, div_scr, dss);
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dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0);
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ep93xx_spi_write_u8(espi, SSPCPSR, div_cpsr);
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ep93xx_spi_write_u16(espi, SSPCR0, cr0);
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writeb(div_cpsr, espi->mmio + SSPCPSR);
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writew(cr0, espi->mmio + SSPCR0);
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return 0;
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}
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@ -265,14 +243,14 @@ static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t)
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if (t->tx_buf)
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tx_val = ((u16 *)t->tx_buf)[espi->tx];
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ep93xx_spi_write_u16(espi, SSPDR, tx_val);
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writew(tx_val, espi->mmio + SSPDR);
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espi->tx += sizeof(tx_val);
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} else {
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u8 tx_val = 0;
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if (t->tx_buf)
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tx_val = ((u8 *)t->tx_buf)[espi->tx];
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ep93xx_spi_write_u8(espi, SSPDR, tx_val);
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writeb(tx_val, espi->mmio + SSPDR);
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espi->tx += sizeof(tx_val);
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}
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}
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@ -282,14 +260,14 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
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if (t->bits_per_word > 8) {
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u16 rx_val;
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rx_val = ep93xx_spi_read_u16(espi, SSPDR);
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rx_val = readw(espi->mmio + SSPDR);
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if (t->rx_buf)
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((u16 *)t->rx_buf)[espi->rx] = rx_val;
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espi->rx += sizeof(rx_val);
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} else {
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u8 rx_val;
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rx_val = ep93xx_spi_read_u8(espi, SSPDR);
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rx_val = readb(espi->mmio + SSPDR);
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if (t->rx_buf)
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((u8 *)t->rx_buf)[espi->rx] = rx_val;
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espi->rx += sizeof(rx_val);
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@ -313,7 +291,7 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
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struct spi_transfer *t = msg->state;
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/* read as long as RX FIFO has frames in it */
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while ((ep93xx_spi_read_u8(espi, SSPSR) & SSPSR_RNE)) {
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while ((readb(espi->mmio + SSPSR) & SSPSR_RNE)) {
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ep93xx_do_read(espi, t);
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espi->fifo_level--;
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}
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@ -615,14 +593,14 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
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* Just to be sure: flush any data from RX FIFO.
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*/
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timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT);
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while (ep93xx_spi_read_u16(espi, SSPSR) & SSPSR_RNE) {
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while (readw(espi->mmio + SSPSR) & SSPSR_RNE) {
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if (time_after(jiffies, timeout)) {
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dev_warn(&espi->pdev->dev,
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"timeout while flushing RX FIFO\n");
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msg->status = -ETIMEDOUT;
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return;
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}
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ep93xx_spi_read_u16(espi, SSPDR);
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readw(espi->mmio + SSPDR);
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}
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/*
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@ -671,7 +649,7 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
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static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
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{
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struct ep93xx_spi *espi = dev_id;
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u8 irq_status = ep93xx_spi_read_u8(espi, SSPIIR);
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u8 irq_status = readb(espi->mmio + SSPIIR);
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/*
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* If we got ROR (receive overrun) interrupt we know that something is
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@ -679,7 +657,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
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*/
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if (unlikely(irq_status & SSPIIR_RORIS)) {
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/* clear the overrun interrupt */
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ep93xx_spi_write_u8(espi, SSPICR, 0);
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writeb(0, espi->mmio + SSPICR);
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dev_warn(&espi->pdev->dev,
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"receive overrun, aborting the message\n");
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espi->current_msg->status = -EIO;
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@ -862,9 +840,9 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
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espi->sspdr_phys = res->start + SSPDR;
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espi->regs_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(espi->regs_base)) {
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error = PTR_ERR(espi->regs_base);
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espi->mmio = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(espi->mmio)) {
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error = PTR_ERR(espi->mmio);
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goto fail_release_master;
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}
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@ -879,7 +857,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
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dev_warn(&pdev->dev, "DMA setup failed. Falling back to PIO\n");
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/* make sure that the hardware is disabled */
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ep93xx_spi_write_u8(espi, SSPCR1, 0);
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writeb(0, espi->mmio + SSPCR1);
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error = devm_spi_register_master(&pdev->dev, master);
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if (error) {
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