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arm64/sysreg: Convert ID_PFR1_EL1 to automatic generation

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Convert ID_PFR1_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-31-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
James Morse 2022-11-30 17:16:29 +00:00 committed by Will Deacon
parent fb0b8d1a24
commit 1224308075
2 changed files with 40 additions and 10 deletions
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10
arch/arm64/include/asm/sysreg.h
View File

@ -165,7 +165,6 @@
#define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
#define SYS_REVIDR_EL1 sys_reg(3, 0, 0, 0, 6)
#define SYS_ID_PFR1_EL1 sys_reg(3, 0, 0, 1, 1)
#define SYS_ID_PFR2_EL1 sys_reg(3, 0, 0, 3, 4)
#define SYS_ID_DFR0_EL1 sys_reg(3, 0, 0, 1, 2)
#define SYS_ID_DFR1_EL1 sys_reg(3, 0, 0, 3, 5)
@ -716,15 +715,6 @@
#define MVFR1_EL1_FPDNaN_SHIFT 4
#define MVFR1_EL1_FPFtZ_SHIFT 0
#define ID_PFR1_EL1_GIC_SHIFT 28
#define ID_PFR1_EL1_Virt_frac_SHIFT 24
#define ID_PFR1_EL1_Sec_frac_SHIFT 20
#define ID_PFR1_EL1_GenTimer_SHIFT 16
#define ID_PFR1_EL1_Virtualization_SHIFT 12
#define ID_PFR1_EL1_MProgMod_SHIFT 8
#define ID_PFR1_EL1_Security_SHIFT 4
#define ID_PFR1_EL1_ProgMod_SHIFT 0
#if defined(CONFIG_ARM64_4K_PAGES)
#define ID_AA64MMFR0_EL1_TGRAN_SHIFT ID_AA64MMFR0_EL1_TGRAN4_SHIFT
#define ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN

40
arch/arm64/tools/sysreg
View File

@ -87,6 +87,46 @@ Enum 3:0 State0
EndEnum
EndSysreg
Sysreg ID_PFR1_EL1 3 0 0 1 1
Res0 63:32
Enum 31:28 GIC
0b0000 NI
0b0001 GICv3
0b0010 GICv4p1
EndEnum
Enum 27:24 Virt_frac
0b0000 NI
0b0001 IMP
EndEnum
Enum 23:20 Sec_frac
0b0000 NI
0b0001 WALK_DISABLE
0b0010 SECURE_MEMORY
EndEnum
Enum 19:16 GenTimer
0b0000 NI
0b0001 IMP
0b0010 ECV
EndEnum
Enum 15:12 Virtualization
0b0000 NI
0b0001 IMP
EndEnum
Enum 11:8 MProgMod
0b0000 NI
0b0001 IMP
EndEnum
Enum 7:4 Security
0b0000 NI
0b0001 EL3
0b0001 NSACR_RFR
EndEnum
Enum 3:0 ProgMod
0b0000 NI
0b0001 IMP
EndEnum
EndSysreg
Sysreg ID_MMFR0_EL1 3 0 0 1 4
Res0 63:32
Enum 31:28 InnerShr