mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-11 21:14:07 +08:00
soc: renesas: r8a779g0-sysc: Add r8a779g0 support
Add support for R-Car V4H (R8A779G0) SoC power areas and register access. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220420084255.375700-10-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
parent
1c1d0e5dc4
commit
11a5ebb42e
@ -385,6 +385,10 @@ config SYSC_R8A779A0
|
|||||||
bool "System Controller support for R-Car V3U" if COMPILE_TEST
|
bool "System Controller support for R-Car V3U" if COMPILE_TEST
|
||||||
select SYSC_RCAR_GEN4
|
select SYSC_RCAR_GEN4
|
||||||
|
|
||||||
|
config SYSC_R8A779G0
|
||||||
|
bool "System Controller support for R-Car V4H" if COMPILE_TEST
|
||||||
|
select SYSC_RCAR_GEN4
|
||||||
|
|
||||||
config SYSC_RMOBILE
|
config SYSC_RMOBILE
|
||||||
bool "System Controller support for R-Mobile" if COMPILE_TEST
|
bool "System Controller support for R-Mobile" if COMPILE_TEST
|
||||||
|
|
||||||
|
@ -26,6 +26,7 @@ obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o
|
|||||||
obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
|
obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
|
||||||
obj-$(CONFIG_SYSC_R8A779A0) += r8a779a0-sysc.o
|
obj-$(CONFIG_SYSC_R8A779A0) += r8a779a0-sysc.o
|
||||||
obj-$(CONFIG_SYSC_R8A779F0) += r8a779f0-sysc.o
|
obj-$(CONFIG_SYSC_R8A779F0) += r8a779f0-sysc.o
|
||||||
|
obj-$(CONFIG_SYSC_R8A779G0) += r8a779g0-sysc.o
|
||||||
ifdef CONFIG_SMP
|
ifdef CONFIG_SMP
|
||||||
obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o
|
obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o
|
||||||
endif
|
endif
|
||||||
|
62
drivers/soc/renesas/r8a779g0-sysc.c
Normal file
62
drivers/soc/renesas/r8a779g0-sysc.c
Normal file
@ -0,0 +1,62 @@
|
|||||||
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
|
/*
|
||||||
|
* Renesas R-Car V4H System Controller
|
||||||
|
*
|
||||||
|
* Copyright (C) 2022 Renesas Electronics Corp.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/bits.h>
|
||||||
|
#include <linux/clk/renesas.h>
|
||||||
|
#include <linux/delay.h>
|
||||||
|
#include <linux/err.h>
|
||||||
|
#include <linux/io.h>
|
||||||
|
#include <linux/iopoll.h>
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/mm.h>
|
||||||
|
#include <linux/of_address.h>
|
||||||
|
#include <linux/pm_domain.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
|
#include <linux/spinlock.h>
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
#include <dt-bindings/power/r8a779g0-sysc.h>
|
||||||
|
|
||||||
|
#include "rcar-gen4-sysc.h"
|
||||||
|
|
||||||
|
static struct rcar_gen4_sysc_area r8a779g0_areas[] __initdata = {
|
||||||
|
{ "always-on", R8A779G0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
|
||||||
|
{ "a3e0", R8A779G0_PD_A3E0, R8A779G0_PD_ALWAYS_ON, PD_SCU },
|
||||||
|
{ "a2e0d0", R8A779G0_PD_A2E0D0, R8A779G0_PD_A3E0, PD_SCU },
|
||||||
|
{ "a2e0d1", R8A779G0_PD_A2E0D1, R8A779G0_PD_A3E0, PD_SCU },
|
||||||
|
{ "a1e0d0c0", R8A779G0_PD_A1E0D0C0, R8A779G0_PD_A2E0D0, PD_CPU_NOCR },
|
||||||
|
{ "a1e0d0c1", R8A779G0_PD_A1E0D0C1, R8A779G0_PD_A2E0D0, PD_CPU_NOCR },
|
||||||
|
{ "a1e0d1c0", R8A779G0_PD_A1E0D1C0, R8A779G0_PD_A2E0D1, PD_CPU_NOCR },
|
||||||
|
{ "a1e0d1c1", R8A779G0_PD_A1E0D1C1, R8A779G0_PD_A2E0D1, PD_CPU_NOCR },
|
||||||
|
{ "a33dga", R8A779G0_PD_A33DGA, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a23dgb", R8A779G0_PD_A23DGB, R8A779G0_PD_A33DGA },
|
||||||
|
{ "a3vip0", R8A779G0_PD_A3VIP0, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a3vip1", R8A779G0_PD_A3VIP1, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a3vip2", R8A779G0_PD_A3VIP2, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a3isp0", R8A779G0_PD_A3ISP0, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a3isp1", R8A779G0_PD_A3ISP1, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a3ir", R8A779G0_PD_A3IR, R8A779G0_PD_ALWAYS_ON },
|
||||||
|
{ "a2cn0", R8A779G0_PD_A2CN0, R8A779G0_PD_A3IR },
|
||||||
|
{ "a1cnn0", R8A779G0_PD_A1CNN0, R8A779G0_PD_A2CN0 },
|
||||||
|
{ "a1dsp0", R8A779G0_PD_A1DSP0, R8A779G0_PD_A2CN0 },
|
||||||
|
{ "a1dsp1", R8A779G0_PD_A1DSP1, R8A779G0_PD_A2CN0 },
|
||||||
|
{ "a1dsp2", R8A779G0_PD_A1DSP2, R8A779G0_PD_A2CN0 },
|
||||||
|
{ "a1dsp3", R8A779G0_PD_A1DSP3, R8A779G0_PD_A2CN0 },
|
||||||
|
{ "a2imp01", R8A779G0_PD_A2IMP01, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2imp23", R8A779G0_PD_A2IMP23, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2psc", R8A779G0_PD_A2PSC, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2dma", R8A779G0_PD_A2DMA, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2cv0", R8A779G0_PD_A2CV0, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2cv1", R8A779G0_PD_A2CV1, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2cv2", R8A779G0_PD_A2CV2, R8A779G0_PD_A3IR },
|
||||||
|
{ "a2cv3", R8A779G0_PD_A2CV3, R8A779G0_PD_A3IR },
|
||||||
|
};
|
||||||
|
|
||||||
|
const struct rcar_gen4_sysc_info r8a779g0_sysc_info __initconst = {
|
||||||
|
.areas = r8a779g0_areas,
|
||||||
|
.num_areas = ARRAY_SIZE(r8a779g0_areas),
|
||||||
|
};
|
@ -281,6 +281,9 @@ static const struct of_device_id rcar_gen4_sysc_matches[] __initconst = {
|
|||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_SYSC_R8A779F0
|
#ifdef CONFIG_SYSC_R8A779F0
|
||||||
{ .compatible = "renesas,r8a779f0-sysc", .data = &r8a779f0_sysc_info },
|
{ .compatible = "renesas,r8a779f0-sysc", .data = &r8a779f0_sysc_info },
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_SYSC_R8A779G0
|
||||||
|
{ .compatible = "renesas,r8a779g0-sysc", .data = &r8a779g0_sysc_info },
|
||||||
#endif
|
#endif
|
||||||
{ /* sentinel */ }
|
{ /* sentinel */ }
|
||||||
};
|
};
|
||||||
|
@ -39,5 +39,6 @@ struct rcar_gen4_sysc_info {
|
|||||||
|
|
||||||
extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
|
extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
|
||||||
extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
|
extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
|
||||||
|
extern const struct rcar_gen4_sysc_info r8a779g0_sysc_info;
|
||||||
|
|
||||||
#endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */
|
#endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */
|
||||||
|
Loading…
Reference in New Issue
Block a user