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arm64: cpufeature: add HWCAP for FEAT_RPRES
Add a new HWCAP to detect the Increased precision of Reciprocal Estimate and Reciprocal Square Root Estimate feature (FEAT_RPRES), introduced in Armv8.7. Also expose this to userspace in the ID_AA64ISAR2_EL1 feature register. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211210165432.8106-4-joey.gouly@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -283,6 +283,14 @@ infrastructure:
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| AFP | [47-44] | y |
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+------------------------------+---------+---------+
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9) ID_AA64ISAR2_EL1 - Instruction set attribute register 2
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+------------------------------+---------+---------+
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| Name | bits | visible |
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+------------------------------+---------+---------+
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| RPRES | [7-4] | y |
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+------------------------------+---------+---------+
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Appendix I: Example
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-------------------
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@ -255,6 +255,10 @@ HWCAP2_AFP
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Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.
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HWCAP2_RPRES
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Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
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4. Unused AT_HWCAP bits
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-----------------------
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@ -107,6 +107,7 @@
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#define KERNEL_HWCAP_MTE __khwcap2_feature(MTE)
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#define KERNEL_HWCAP_ECV __khwcap2_feature(ECV)
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#define KERNEL_HWCAP_AFP __khwcap2_feature(AFP)
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#define KERNEL_HWCAP_RPRES __khwcap2_feature(RPRES)
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/*
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* This yields a mask that user programs can use to figure out what
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@ -77,5 +77,6 @@
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#define HWCAP2_MTE (1 << 18)
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#define HWCAP2_ECV (1 << 19)
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#define HWCAP2_AFP (1 << 20)
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#define HWCAP2_RPRES (1 << 21)
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#endif /* _UAPI__ASM_HWCAP_H */
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@ -226,6 +226,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
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};
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static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
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ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
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ARM64_FTR_END,
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};
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@ -2487,6 +2488,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
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#endif /* CONFIG_ARM64_MTE */
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HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV),
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HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP),
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HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_RPRES_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_RPRES),
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{},
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};
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@ -96,6 +96,7 @@ static const char *const hwcap_str[] = {
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[KERNEL_HWCAP_MTE] = "mte",
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[KERNEL_HWCAP_ECV] = "ecv",
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[KERNEL_HWCAP_AFP] = "afp",
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[KERNEL_HWCAP_RPRES] = "rpres",
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};
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#ifdef CONFIG_COMPAT
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