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platform/x86: intel_pmt_crashlog: Fix incorrect macros
Fixes off-by-one bugs in the macro assignments for the crashlog control
bits. Was initially tested on emulation but bug revealed after testing on
silicon.
Fixes: 5ef9998c96
("platform/x86: Intel PMT Crashlog capability driver")
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Link: https://lore.kernel.org/r/20210317024455.3071477-2-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -23,18 +23,17 @@
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#define CRASH_TYPE_OOBMSM 1
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/* Control Flags */
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#define CRASHLOG_FLAG_DISABLE BIT(27)
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#define CRASHLOG_FLAG_DISABLE BIT(28)
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/*
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* Bits 28 and 29 control the state of bit 31.
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* Bits 29 and 30 control the state of bit 31.
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*
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* Bit 28 will clear bit 31, if set, allowing a new crashlog to be captured.
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* Bit 29 will immediately trigger a crashlog to be generated, setting bit 31.
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* Bit 30 is read-only and reserved as 0.
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* Bit 29 will clear bit 31, if set, allowing a new crashlog to be captured.
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* Bit 30 will immediately trigger a crashlog to be generated, setting bit 31.
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* Bit 31 is the read-only status with a 1 indicating log is complete.
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*/
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#define CRASHLOG_FLAG_TRIGGER_CLEAR BIT(28)
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#define CRASHLOG_FLAG_TRIGGER_EXECUTE BIT(29)
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#define CRASHLOG_FLAG_TRIGGER_CLEAR BIT(29)
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#define CRASHLOG_FLAG_TRIGGER_EXECUTE BIT(30)
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#define CRASHLOG_FLAG_TRIGGER_COMPLETE BIT(31)
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#define CRASHLOG_FLAG_TRIGGER_MASK GENMASK(31, 28)
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