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drm/i915/selftests: Force a failed engine reset
Inject a fault into the engine reset and check that the outstanding requests are completed despite the failed reset. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210113205049.22565-1-chris@chris-wilson.co.uk
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@ -540,6 +540,149 @@ static int igt_reset_nop_engine(void *arg)
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return 0;
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}
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static void force_reset_timeout(struct intel_engine_cs *engine)
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{
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engine->reset_timeout.probability = 999;
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atomic_set(&engine->reset_timeout.times, -1);
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}
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static void cancel_reset_timeout(struct intel_engine_cs *engine)
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{
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memset(&engine->reset_timeout, 0, sizeof(engine->reset_timeout));
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}
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static int igt_reset_fail_engine(void *arg)
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{
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struct intel_gt *gt = arg;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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/* Check that we can recover from engine-reset failues */
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if (!intel_has_reset_engine(gt))
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return 0;
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for_each_engine(engine, gt, id) {
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unsigned int count;
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struct intel_context *ce;
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IGT_TIMEOUT(end_time);
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int err;
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ce = intel_context_create(engine);
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if (IS_ERR(ce))
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return PTR_ERR(ce);
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st_engine_heartbeat_disable(engine);
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set_bit(I915_RESET_ENGINE + id, >->reset.flags);
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force_reset_timeout(engine);
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err = intel_engine_reset(engine, NULL);
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cancel_reset_timeout(engine);
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if (err == 0) /* timeouts only generated on gen8+ */
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goto skip;
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count = 0;
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do {
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struct i915_request *last = NULL;
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int i;
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if (!wait_for_idle(engine)) {
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pr_err("%s failed to idle before reset\n",
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engine->name);
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err = -EIO;
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break;
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}
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for (i = 0; i < count % 15; i++) {
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struct i915_request *rq;
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rq = intel_context_create_request(ce);
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if (IS_ERR(rq)) {
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struct drm_printer p =
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drm_info_printer(gt->i915->drm.dev);
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intel_engine_dump(engine, &p,
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"%s(%s): failed to submit request\n",
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__func__,
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engine->name);
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GEM_TRACE("%s(%s): failed to submit request\n",
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__func__,
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engine->name);
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GEM_TRACE_DUMP();
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intel_gt_set_wedged(gt);
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if (last)
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i915_request_put(last);
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err = PTR_ERR(rq);
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goto out;
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}
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if (last)
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i915_request_put(last);
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last = i915_request_get(rq);
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i915_request_add(rq);
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}
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if (count & 1) {
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err = intel_engine_reset(engine, NULL);
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if (err) {
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GEM_TRACE_ERR("intel_engine_reset(%s) failed, err:%d\n",
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engine->name, err);
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GEM_TRACE_DUMP();
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i915_request_put(last);
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break;
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}
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} else {
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force_reset_timeout(engine);
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err = intel_engine_reset(engine, NULL);
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cancel_reset_timeout(engine);
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if (err != -ETIMEDOUT) {
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pr_err("intel_engine_reset(%s) did not fail, err:%d\n",
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engine->name, err);
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i915_request_put(last);
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break;
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}
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}
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err = 0;
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if (last) {
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if (i915_request_wait(last, 0, HZ / 2) < 0) {
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struct drm_printer p =
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drm_info_printer(gt->i915->drm.dev);
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intel_engine_dump(engine, &p,
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"%s(%s): failed to complete request\n",
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__func__,
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engine->name);
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GEM_TRACE("%s(%s): failed to complete request\n",
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__func__,
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engine->name);
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GEM_TRACE_DUMP();
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err = -EIO;
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}
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i915_request_put(last);
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}
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count++;
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} while (err == 0 && time_before(jiffies, end_time));
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out:
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pr_info("%s(%s): %d resets\n", __func__, engine->name, count);
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skip:
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clear_bit(I915_RESET_ENGINE + id, >->reset.flags);
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st_engine_heartbeat_enable(engine);
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intel_context_put(ce);
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if (igt_flush_test(gt->i915))
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err = -EIO;
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if (err)
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return err;
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}
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return 0;
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}
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static int __igt_reset_engine(struct intel_gt *gt, bool active)
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{
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struct i915_gpu_error *global = >->i915->gpu_error;
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@ -1694,6 +1837,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
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SUBTEST(igt_reset_nop_engine),
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SUBTEST(igt_reset_idle_engine),
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SUBTEST(igt_reset_active_engine),
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SUBTEST(igt_reset_fail_engine),
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SUBTEST(igt_reset_engines),
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SUBTEST(igt_reset_engines_atomic),
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SUBTEST(igt_reset_queue),
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