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KVM: PPC: Add support for explicit HIOR setting
Until now, we always set HIOR based on the PVR, but this is just wrong. Instead, we should be setting HIOR explicitly, so user space can decide what the initial HIOR value is - just like on real hardware. We keep the old PVR based way around for backwards compatibility, but once user space uses the SET_ONE_REG based method, we drop the PVR logic. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -1610,6 +1610,7 @@ registers, find a list below:
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Arch | Register | Width (bits)
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Arch | Register | Width (bits)
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PPC | KVM_REG_PPC_HIOR | 64
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4.69 KVM_GET_ONE_REG
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4.69 KVM_GET_ONE_REG
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@ -331,4 +331,6 @@ struct kvm_book3e_206_tlb_params {
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__u32 reserved[8];
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__u32 reserved[8];
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};
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};
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#define KVM_REG_PPC_HIOR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x1)
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#endif /* __LINUX_KVM_POWERPC_H */
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#endif /* __LINUX_KVM_POWERPC_H */
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@ -90,6 +90,8 @@ struct kvmppc_vcpu_book3s {
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#endif
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#endif
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int context_id[SID_CONTEXTS];
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int context_id[SID_CONTEXTS];
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bool hior_explicit; /* HIOR is set by ioctl, not PVR */
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struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
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struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
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struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
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struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
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struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
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struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
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@ -157,14 +157,16 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
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#ifdef CONFIG_PPC_BOOK3S_64
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#ifdef CONFIG_PPC_BOOK3S_64
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if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
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if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
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kvmppc_mmu_book3s_64_init(vcpu);
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kvmppc_mmu_book3s_64_init(vcpu);
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to_book3s(vcpu)->hior = 0xfff00000;
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if (!to_book3s(vcpu)->hior_explicit)
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to_book3s(vcpu)->hior = 0xfff00000;
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to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
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to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
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vcpu->arch.cpu_type = KVM_CPU_3S_64;
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vcpu->arch.cpu_type = KVM_CPU_3S_64;
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} else
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} else
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#endif
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#endif
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{
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{
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kvmppc_mmu_book3s_32_init(vcpu);
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kvmppc_mmu_book3s_32_init(vcpu);
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to_book3s(vcpu)->hior = 0;
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if (!to_book3s(vcpu)->hior_explicit)
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to_book3s(vcpu)->hior = 0;
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to_book3s(vcpu)->msr_mask = 0xffffffffULL;
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to_book3s(vcpu)->msr_mask = 0xffffffffULL;
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vcpu->arch.cpu_type = KVM_CPU_3S_32;
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vcpu->arch.cpu_type = KVM_CPU_3S_32;
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}
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}
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@ -212,6 +212,7 @@ int kvm_dev_ioctl_check_extension(long ext)
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case KVM_CAP_PPC_BOOKE_SREGS:
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case KVM_CAP_PPC_BOOKE_SREGS:
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#else
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#else
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case KVM_CAP_PPC_SEGSTATE:
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case KVM_CAP_PPC_SEGSTATE:
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case KVM_CAP_PPC_HIOR:
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case KVM_CAP_PPC_PAPR:
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case KVM_CAP_PPC_PAPR:
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#endif
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#endif
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case KVM_CAP_PPC_UNSET_IRQ:
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case KVM_CAP_PPC_UNSET_IRQ:
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@ -652,6 +653,11 @@ static int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu,
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int r = -EINVAL;
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int r = -EINVAL;
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switch (reg->id) {
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switch (reg->id) {
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#ifdef CONFIG_PPC_BOOK3S
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case KVM_REG_PPC_HIOR:
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r = put_user(to_book3s(vcpu)->hior, (u64 __user *)reg->addr);
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break;
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#endif
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default:
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default:
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break;
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break;
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}
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}
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@ -665,6 +671,13 @@ static int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu,
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int r = -EINVAL;
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int r = -EINVAL;
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switch (reg->id) {
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switch (reg->id) {
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#ifdef CONFIG_PPC_BOOK3S
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case KVM_ONE_REG_PPC_HIOR:
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r = get_user(to_book3s(vcpu)->hior, (u64 __user *)reg->addr);
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if (!r)
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to_book3s(vcpu)->hior_explicit = true;
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break;
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#endif
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default:
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default:
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break;
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break;
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}
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}
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@ -580,6 +580,7 @@ struct kvm_ppc_pvinfo {
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#define KVM_CAP_PPC_SMT 64
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#define KVM_CAP_PPC_SMT 64
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#define KVM_CAP_PPC_RMA 65
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#define KVM_CAP_PPC_RMA 65
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#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
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#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
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#define KVM_CAP_PPC_HIOR 67
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#define KVM_CAP_PPC_PAPR 68
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#define KVM_CAP_PPC_PAPR 68
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#define KVM_CAP_SW_TLB 69
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#define KVM_CAP_SW_TLB 69
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#define KVM_CAP_ONE_REG 70
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#define KVM_CAP_ONE_REG 70
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