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drm/i915/vlv: drop unused vlv_gps_core_read/write functions
Not needed. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/532150999335216b1374c606e1b3c253a6c9fe9d.1454582914.git.jani.nikula@intel.com
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@ -3479,8 +3479,6 @@ u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
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void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
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void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
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u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);
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u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);
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void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
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void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
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u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg);
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void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
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u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
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u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
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void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
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void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
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u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
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u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
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@ -618,7 +618,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
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#define IOSF_PORT_CCK 0x14
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#define IOSF_PORT_CCK 0x14
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#define IOSF_PORT_DPIO_2 0x1a
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#define IOSF_PORT_DPIO_2 0x1a
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#define IOSF_PORT_FLISDSI 0x1b
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#define IOSF_PORT_FLISDSI 0x1b
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#define IOSF_PORT_GPS_CORE 0x48
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#define IOSF_PORT_CCU 0xa9
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#define IOSF_PORT_CCU 0xa9
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#define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104)
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#define VLV_IOSF_DATA _MMIO(VLV_DISPLAY_BASE + 0x2104)
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#define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108)
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#define VLV_IOSF_ADDR _MMIO(VLV_DISPLAY_BASE + 0x2108)
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@ -171,20 +171,6 @@ void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
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SB_CRWRDA_NP, reg, &val);
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SB_CRWRDA_NP, reg, &val);
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}
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}
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u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg)
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{
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u32 val = 0;
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vlv_sideband_rw(dev_priv, PCI_DEVFN(0, 0), IOSF_PORT_GPS_CORE,
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SB_CRRDDA_NP, reg, &val);
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return val;
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}
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void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
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{
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vlv_sideband_rw(dev_priv, PCI_DEVFN(0, 0), IOSF_PORT_GPS_CORE,
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SB_CRWRDA_NP, reg, &val);
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}
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u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg)
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u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg)
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{
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{
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u32 val = 0;
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u32 val = 0;
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