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ath5k: Update EEPROM code
*Read misc2...6 values from eeprom since we want to use them (fixes wrong power calibration info offset on RF2413+ chips) *Initialize num_piers to 0 for RF2413 chips (note that we read 2GHz frequency piers while reading mode sections, we have to ignore them -usualy they are 0xff anyway but during my tests i got a 1 on b mode with no data- and use the newer eemap. *Add some more comments (please forgive my poor English ;-( ) and some minor code cleanup *Tested on 2425 and 2112 and has the same data with ath_info (i wrote some debug code on debug.c to print everything like ath_info but i haven't tested it yet on 5111 and it's full of > 80 col lines, if anyone wants to play with it let me know). Signed-Off-by: Nick Kossifidis <mickflemm@gmail.com> Acked-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Nick Kossifidis
John W. Linville
parent
754be3098b
commit
0ea9c00c9d
@ -137,6 +137,18 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
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if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_0) {
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC0, ee_misc0);
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC1, ee_misc1);
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/* XXX: Don't know which versions include these two */
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC2, ee_misc2);
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if (ee->ee_version >= AR5K_EEPROM_VERSION_4_3)
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC3, ee_misc3);
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if (ee->ee_version >= AR5K_EEPROM_VERSION_5_0) {
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC4, ee_misc4);
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC5, ee_misc5);
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AR5K_EEPROM_READ_HDR(AR5K_EEPROM_MISC6, ee_misc6);
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}
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}
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if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_3) {
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@ -213,7 +225,8 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
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}
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/*
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* Read supported modes from eeprom
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* Read supported modes and some mode-specific calibration data
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* from eeprom
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*/
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static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
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unsigned int mode)
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@ -315,6 +328,9 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
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if (ah->ah_ee_version < AR5K_EEPROM_VERSION_4_0)
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goto done;
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/* Note: >= v5 have bg freq piers on another location
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* so these freq piers are ignored for >= v5 (should be 0xff
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* anyway) */
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switch(mode) {
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case AR5K_EEPROM_MODE_11A:
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if (ah->ah_ee_version < AR5K_EEPROM_VERSION_4_1)
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@ -442,7 +458,7 @@ ath5k_eeprom_read_turbo_modes(struct ath5k_hw *ah,
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return 0;
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}
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/* Read mode-specific data (except power calibration data) */
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static int
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ath5k_eeprom_init_modes(struct ath5k_hw *ah)
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{
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@ -488,6 +504,16 @@ ath5k_eeprom_init_modes(struct ath5k_hw *ah)
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return 0;
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}
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/* Used to match PCDAC steps with power values on RF5111 chips
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* (eeprom versions < 4). For RF5111 we have 10 pre-defined PCDAC
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* steps that match with the power values we read from eeprom. On
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* older eeprom versions (< 3.2) these steps are equaly spaced at
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* 10% of the pcdac curve -until the curve reaches it's maximum-
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* (10 steps from 0 to 100%) but on newer eeprom versions (>= 3.2)
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* these 10 steps are spaced in a different way. This function returns
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* the pcdac steps based on eeprom version and curve min/max so that we
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* can have pcdac/pwr points.
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*/
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static inline void
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ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp)
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{
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@ -507,37 +533,48 @@ ath5k_get_pcdac_intercepts(struct ath5k_hw *ah, u8 min, u8 max, u8 *vp)
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*vp++ = (ip[i] * max + (100 - ip[i]) * min) / 100;
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}
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/* Read the frequency piers for each mode (mostly used on newer eeproms with 0xff
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* frequency mask) */
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static inline int
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ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max,
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struct ath5k_chan_pcal_info *pc, u8 *count)
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struct ath5k_chan_pcal_info *pc, unsigned int mode)
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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int o = *offset;
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int i = 0;
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u8 f1, f2;
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u8 freq1, freq2;
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int ret;
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u16 val;
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while(i < max) {
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AR5K_EEPROM_READ(o++, val);
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f1 = (val >> 8) & 0xff;
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f2 = val & 0xff;
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freq1 = (val >> 8) & 0xff;
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freq2 = val & 0xff;
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if (f1)
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pc[i++].freq = f1;
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if (freq1) {
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pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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freq1, mode);
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ee->ee_n_piers[mode]++;
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}
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if (f2)
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pc[i++].freq = f2;
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if (freq2) {
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pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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freq2, mode);
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ee->ee_n_piers[mode]++;
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}
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if (!f1 || !f2)
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if (!freq1 || !freq2)
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break;
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}
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/* return new offset */
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*offset = o;
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*count = i;
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return 0;
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}
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/* Read frequency piers for 802.11a */
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static int
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ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset)
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{
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@ -550,7 +587,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset)
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if (ee->ee_version >= AR5K_EEPROM_VERSION_3_3) {
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ath5k_eeprom_read_freq_list(ah, &offset,
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AR5K_EEPROM_N_5GHZ_CHAN, pcal,
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&ee->ee_n_piers[AR5K_EEPROM_MODE_11A]);
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AR5K_EEPROM_MODE_11A);
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} else {
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mask = AR5K_EEPROM_FREQ_M(ah->ah_ee_version);
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@ -577,23 +614,25 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset)
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AR5K_EEPROM_READ(offset++, val);
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pcal[9].freq |= (val >> 10) & 0x3f;
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ee->ee_n_piers[AR5K_EEPROM_MODE_11A] = 10;
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}
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for(i = 0; i < AR5K_EEPROM_N_5GHZ_CHAN; i += 1) {
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pcal[i].freq = ath5k_eeprom_bin2freq(ee,
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/* Fixed number of piers */
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ee->ee_n_piers[AR5K_EEPROM_MODE_11A] = 10;
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for (i = 0; i < AR5K_EEPROM_N_5GHZ_CHAN; i++) {
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pcal[i].freq = ath5k_eeprom_bin2freq(ee,
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pcal[i].freq, AR5K_EEPROM_MODE_11A);
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}
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}
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return 0;
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}
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/* Read frequency piers for 802.11bg on eeprom versions >= 5 and eemap >= 2 */
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static inline int
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ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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struct ath5k_chan_pcal_info *pcal;
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int i;
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switch(mode) {
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case AR5K_EEPROM_MODE_11B:
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@ -608,16 +647,18 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
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ath5k_eeprom_read_freq_list(ah, &offset,
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AR5K_EEPROM_N_2GHZ_CHAN_2413, pcal,
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&ee->ee_n_piers[mode]);
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for(i = 0; i < AR5K_EEPROM_N_2GHZ_CHAN_2413; i += 1) {
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pcal[i].freq = ath5k_eeprom_bin2freq(ee,
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pcal[i].freq, mode);
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}
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mode);
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return 0;
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}
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/* Read power calibration for RF5111 chips
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* For RF5111 we have an XPD -eXternal Power Detector- curve
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* for each calibrated channel. Each curve has PCDAC steps on
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* x axis and power on y axis and looks like a logarithmic
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* function. To recreate the curve and pass the power values
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* on the pcdac table, we read 10 points here and interpolate later.
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*/
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static int
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ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
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{
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@ -714,6 +755,17 @@ ath5k_eeprom_read_pcal_info_5111(struct ath5k_hw *ah, int mode)
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return 0;
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}
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/* Read power calibration for RF5112 chips
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* For RF5112 we have 4 XPD -eXternal Power Detector- curves
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* for each calibrated channel on 0, -6, -12 and -18dbm but we only
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* use the higher (3) and the lower (0) curves. Each curve has PCDAC
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* steps on x axis and power on y axis and looks like a linear
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* function. To recreate the curve and pass the power values
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* on the pcdac table, we read 4 points for xpd 0 and 3 points
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* for xpd 3 here and interpolate later.
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*
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* Note: Many vendors just use xpd 0 so xpd 3 is zeroed.
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*/
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static int
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ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
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{
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@ -790,7 +842,7 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
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/* PCDAC steps
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* corresponding to the above power
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* measurements (static) */
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* measurements (fixed) */
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chan_pcal_info->pcdac_x3[0] = 20;
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chan_pcal_info->pcdac_x3[1] = 35;
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chan_pcal_info->pcdac_x3[2] = 63;
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@ -814,6 +866,13 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
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return 0;
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}
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/* For RF2413 power calibration data doesn't start on a fixed location and
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* if a mode is not supported, it's section is missing -not zeroed-.
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* So we need to calculate the starting offset for each section by using
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* these two functions */
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/* Return the size of each section based on the mode and the number of pd
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* gains available (maximum 4). */
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static inline unsigned int
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ath5k_pdgains_size_2413(struct ath5k_eeprom_info *ee, unsigned int mode)
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{
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@ -826,6 +885,8 @@ ath5k_pdgains_size_2413(struct ath5k_eeprom_info *ee, unsigned int mode)
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return sz;
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}
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/* Return the starting offset for a section based on the modes supported
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* and each section's size. */
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static unsigned int
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ath5k_cal_data_offset_2413(struct ath5k_eeprom_info *ee, int mode)
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{
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@ -834,11 +895,13 @@ ath5k_cal_data_offset_2413(struct ath5k_eeprom_info *ee, int mode)
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switch(mode) {
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case AR5K_EEPROM_MODE_11G:
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if (AR5K_EEPROM_HDR_11B(ee->ee_header))
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offset += ath5k_pdgains_size_2413(ee, AR5K_EEPROM_MODE_11B) + 2;
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offset += ath5k_pdgains_size_2413(ee, AR5K_EEPROM_MODE_11B) +
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AR5K_EEPROM_N_2GHZ_CHAN_2413 / 2;
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/* fall through */
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case AR5K_EEPROM_MODE_11B:
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if (AR5K_EEPROM_HDR_11A(ee->ee_header))
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offset += ath5k_pdgains_size_2413(ee, AR5K_EEPROM_MODE_11A) + 5;
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offset += ath5k_pdgains_size_2413(ee, AR5K_EEPROM_MODE_11A) +
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AR5K_EEPROM_N_5GHZ_CHAN / 2;
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/* fall through */
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case AR5K_EEPROM_MODE_11A:
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break;
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@ -849,6 +912,17 @@ ath5k_cal_data_offset_2413(struct ath5k_eeprom_info *ee, int mode)
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return offset;
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}
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/* Read power calibration for RF2413 chips
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* For RF2413 we have a PDDAC table (Power Detector) instead
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* of a PCDAC and 4 pd gain curves for each calibrated channel.
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* Each curve has PDDAC steps on x axis and power on y axis and
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* looks like an exponential function. To recreate the curves
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* we read here the points and interpolate later. Note that
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* in most cases only higher and lower curves are used (like
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* RF5112) but vendors have the oportunity to include all 4
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* curves on eeprom. The final curve (higher power) has an extra
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* point for better accuracy like RF5112.
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*/
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static int
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ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
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{
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@ -868,6 +942,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
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ee->ee_pd_gains[mode] = pd_gains;
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offset = ath5k_cal_data_offset_2413(ee, mode);
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ee->ee_n_piers[mode] = 0;
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switch (mode) {
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case AR5K_EEPROM_MODE_11A:
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if (!AR5K_EEPROM_HDR_11A(ee->ee_header))
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@ -1163,6 +1238,20 @@ static int ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned
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return 0;
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}
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/*
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* Read per channel calibration info from EEPROM
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*
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* This info is used to calibrate the baseband power table. Imagine
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* that for each channel there is a power curve that's hw specific
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* (depends on amplifier etc) and we try to "correct" this curve using
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* offests we pass on to phy chip (baseband -> before amplifier) so that
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* it can use accurate power values when setting tx power (takes amplifier's
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* performance on each channel into account).
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*
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* EEPROM provides us with the offsets for some pre-calibrated channels
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* and we have to interpolate to create the full table for these channels and
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* also the table for any channel.
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*/
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static int
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ath5k_eeprom_read_pcal_info(struct ath5k_hw *ah)
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{
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@ -1193,7 +1282,7 @@ ath5k_eeprom_read_pcal_info(struct ath5k_hw *ah)
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return 0;
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}
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/* Read conformance test limits */
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/* Read conformance test limits used for regulatory control */
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static int
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ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah)
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{
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