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Merge branches 'pm-cpufreq' and 'pm-cpuidle'
* pm-cpufreq: cpufreq: intel_pstate: Add one more OOB control bit * pm-cpuidle: cpuidle: Rearrange s2idle-specific idle state entry code PM: s2idle: Clear _TIF_POLLING_NRFLAG before suspend to idle
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commit
0e3fb2a128
@ -2677,6 +2677,8 @@ static struct acpi_platform_list plat_info[] __initdata = {
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{ } /* End */
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};
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#define BITMASK_OOB (BIT(8) | BIT(18))
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static bool __init intel_pstate_platform_pwr_mgmt_exists(void)
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{
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const struct x86_cpu_id *id;
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@ -2686,8 +2688,9 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void)
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id = x86_match_cpu(intel_pstate_cpu_oob_ids);
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if (id) {
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rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr);
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if (misc_pwr & (1 << 8)) {
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pr_debug("Bit 8 in the MISC_PWR_MGMT MSR set\n");
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if (misc_pwr & BITMASK_OOB) {
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pr_debug("Bit 8 or 18 in the MISC_PWR_MGMT MSR set\n");
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pr_debug("P states are controlled in Out of Band mode by the firmware/hardware\n");
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return true;
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}
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}
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@ -186,9 +186,10 @@ int cpuidle_enter_s2idle(struct cpuidle_driver *drv, struct cpuidle_device *dev)
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* be frozen safely.
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*/
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index = find_deepest_state(drv, dev, U64_MAX, 0, true);
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if (index > 0)
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if (index > 0) {
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enter_s2idle_proper(drv, dev, index);
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local_irq_enable();
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}
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return index;
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}
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#endif /* CONFIG_SUSPEND */
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@ -96,6 +96,15 @@ void __cpuidle default_idle_call(void)
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}
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}
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static int call_cpuidle_s2idle(struct cpuidle_driver *drv,
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struct cpuidle_device *dev)
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{
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if (current_clr_polling_and_test())
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return -EBUSY;
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return cpuidle_enter_s2idle(drv, dev);
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}
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static int call_cpuidle(struct cpuidle_driver *drv, struct cpuidle_device *dev,
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int next_state)
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{
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@ -171,11 +180,9 @@ static void cpuidle_idle_call(void)
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if (idle_should_enter_s2idle()) {
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rcu_idle_enter();
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entered_state = cpuidle_enter_s2idle(drv, dev);
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if (entered_state > 0) {
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local_irq_enable();
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entered_state = call_cpuidle_s2idle(drv, dev);
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if (entered_state > 0)
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goto exit_idle;
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}
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rcu_idle_exit();
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