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Qualcomm ARM64 defconfig updates for v5.19
This enables the GPI DMA driver, providing access to I2C and SPI controllers that are setup for shared ownership. The PCIe Gen2 PHY provides PCI support on the QCS405 platform, among others. The PMIC watchdog, concell and ADC5 ThermalMonitor drivers provides housekeeping services on a range of different platforms. The Display and Video clock controllers for SM8250 are enabled, as is the audio RX/TX macros and the WCD9335 audio codec driver. Lastly the Ath11k driver, used on a variety of modern boards and the FastRPC driver, which provides an interface for computational offloading on the Hexagon cores, are enabled. All drivers, except the SM8250 Display and Video clock controller drivers are enabled as modules. The two clock controllers provides power-domains and must be builtin to reduce the risk of probe deferral happening (and being ignored) after late initcall. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmJ5SNcbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FzLcQAKVGBX+PCuv8jK5gO2JH rgiLcrQz5CaS5U/nVXxtKZDyh2JuLPpv2o8BwILuEvOfol5SZ/19uxZdhPew/MCo 1af9EIWNeI+Eu95y154cQ1BYSvt1GLVY9RxMEIGTGNRw7Tlm/NXEI1tFUT/U6Fow veU63k98oYseQsots55j+OsMDc91DVBCBRW/VPCm3OJU7X5huy66RMK9ofvRlQAL pmVFOl8VW0d+GuLfNP8UxgV/Ck9PEsU4XIDF62LBj7MRr/zBRTYPfCi7PWihNy8r iT1v3x2PQRmmRSqgpNmWnazfoXt1+jeOvpNkKtJ5GOiuJpDiSBlBAWqnq18mEs7m 8vrBFq0zVsU9u+fxFN1tLbCZyvet7Q7UnJ9dMb3qg6bN4oWS8NVDXFlQq69thQ1w llYvQqo1K9jrj8jd8vRaBjOcoVi0UFoVbOxdMG1tAqVW1iAWXY+BvUdOs5NLebQx t8hd7FXFkvHCXJztJQEO3Loa9K/nDfMySkpDrWBtuS9S3kswZrQ9BdiVSSu5Ca4d 4FG+6TORM/PEc+AGNnnLWdLbbYoOva3togZknndMZwGaTAOX7762lLudUipX2iLi HEeMOeVNEg7ttCFnVNZKYdrMGGT0TB3Nv2PgbfiZW5QFsOLiwrKz8Pi5Pp0qZChj UuVnkZznTyW3u2MatDZ5SYt5 =BrN9 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5geIACgkQmmx57+YA GNlM7Q//VC3XMyUgLXCaDkQu1jiggHkIvPBzrvl4MZ6q7akPzn777rKXuQVnjih3 UabrkF5C1ZV1YOSHAsEFDsbbxZzBIk03OBqscmglU5kRgxT6oq0eliKSWn3lbhPU CHM38iRbd70+9c9/zixKi1qK+z/OTVEV/0vhBI7mLtUIy37bcElp1Trpz8xqjYN3 kigWxTdNtIOUGYhJOcsQK0yIk6Ac0XHAjuFk69TWTl/j/ML6K6LG+4x2VCg/vPTv Gvn0BZQ7ssRhwml3hjBswH4DuiPIDiqJTcMRz40zmujXFORM61CDoikkPt/QglfX z+dhWXrKisD/UxigXMKLVhIxj8lV0OFIey9ugDnKIAsKtNE8VXrgfqJpCZpk2o1H L5xZKyE6ZSLWuKtXP+bvn5ziNyDCqp0jMI1dUWiv23MU16/2vINqCdHD1i2AjvPP +n+wuCN6BHRIxrmsjc+FBBIW2zILz91kBOs6n2zKFBuQe0wMBl+XciEcnA7cAh67 5tW0Tu/IzNdgqn751olmZUNVGhQz9HO5jyB82iIDuQVz3gN1v40F6+LbPFHePQ5P zl9JG1VnF1eWO/CR1FiUPaG1616ESQtr2Rbq73t34LpnIQRj7lP4uJsW7R7pTfHn is2Fu1a7Lk+K0tNDtOJ0qy6hupHt11aU4qJlx8GTJluVA+FU2hE= =BAuz -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-defconfig-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM64 defconfig updates for v5.19 This enables the GPI DMA driver, providing access to I2C and SPI controllers that are setup for shared ownership. The PCIe Gen2 PHY provides PCI support on the QCS405 platform, among others. The PMIC watchdog, concell and ADC5 ThermalMonitor drivers provides housekeeping services on a range of different platforms. The Display and Video clock controllers for SM8250 are enabled, as is the audio RX/TX macros and the WCD9335 audio codec driver. Lastly the Ath11k driver, used on a variety of modern boards and the FastRPC driver, which provides an interface for computational offloading on the Hexagon cores, are enabled. All drivers, except the SM8250 Display and Video clock controller drivers are enabled as modules. The two clock controllers provides power-domains and must be builtin to reduce the risk of probe deferral happening (and being ignored) after late initcall. * tag 'qcom-arm64-defconfig-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable Qualcomm GPI DMA Driver arm64: defconfig: Enable Qualcomm PCIe Gen2 PHY arm64: defconfig: Enable SM8250 video clock controller arm64: defconfig: Enable PM8916 watchdog driver arm64: defconfig: enable ath11k driver arm64: defconfig: Enable some Qualcomm drivers arm64: defconfig: reenable SM_DISPCC_8250 arm64: defconfig: enable wcd9335 codec as module arm64: defconfig: enable Qualcomm RX and TX macro for SM8250 audio Link: https://lore.kernel.org/r/20220509170158.311962-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
0e33a25841
@ -274,6 +274,8 @@ CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_NBD=m
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CONFIG_VIRTIO_BLK=y
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CONFIG_BLK_DEV_NVME=m
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CONFIG_QCOM_COINCELL=m
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CONFIG_QCOM_FASTRPC=m
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CONFIG_SRAM=y
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CONFIG_PCI_ENDPOINT_TEST=m
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CONFIG_EEPROM_AT24=m
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@ -389,6 +391,9 @@ CONFIG_ATH10K=m
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CONFIG_ATH10K_PCI=m
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CONFIG_ATH10K_SNOC=m
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CONFIG_WCN36XX=m
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CONFIG_ATH11K=m
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CONFIG_ATH11K_AHB=m
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CONFIG_ATH11K_PCI=m
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CONFIG_BRCMFMAC=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_SDIO=m
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@ -600,6 +605,7 @@ CONFIG_TEGRA_BPMP_THERMAL=m
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CONFIG_QCOM_TSENS=y
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CONFIG_QCOM_SPMI_TEMP_ALARM=m
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CONFIG_QCOM_LMH=m
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CONFIG_QCOM_SPMI_ADC_TM5=m
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CONFIG_UNIPHIER_THERMAL=y
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CONFIG_WATCHDOG=y
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CONFIG_SL28CPLD_WATCHDOG=m
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@ -618,6 +624,7 @@ CONFIG_ARM_SMC_WATCHDOG=y
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CONFIG_RENESAS_WDT=y
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CONFIG_RENESAS_RZG2LWDT=y
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CONFIG_UNIPHIER_WATCHDOG=y
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CONFIG_PM8916_WATCHDOG=m
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CONFIG_BCM2835_WDT=y
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CONFIG_MFD_ALTERA_SYSMGR=y
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CONFIG_MFD_BD9571MWV=y
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@ -818,6 +825,7 @@ CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
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CONFIG_SND_SOC_SIMPLE_MUX=m
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CONFIG_SND_SOC_TAS571X=m
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CONFIG_SND_SOC_TLV320AIC32X4_I2C=m
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CONFIG_SND_SOC_WCD9335=m
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CONFIG_SND_SOC_WCD934X=m
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CONFIG_SND_SOC_WM8524=m
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CONFIG_SND_SOC_WM8904=m
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@ -828,6 +836,8 @@ CONFIG_SND_SOC_WSA881X=m
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CONFIG_SND_SOC_NAU8822=m
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CONFIG_SND_SOC_LPASS_WSA_MACRO=m
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CONFIG_SND_SOC_LPASS_VA_MACRO=m
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CONFIG_SND_SOC_LPASS_RX_MACRO=m
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CONFIG_SND_SOC_LPASS_TX_MACRO=m
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CONFIG_SND_SIMPLE_CARD=m
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CONFIG_SND_AUDIO_GRAPH_CARD=m
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CONFIG_SND_AUDIO_GRAPH_CARD2=m
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@ -974,6 +984,7 @@ CONFIG_TEGRA186_GPC_DMA=m
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CONFIG_TEGRA20_APB_DMA=y
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CONFIG_TEGRA210_ADMA=m
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CONFIG_QCOM_BAM_DMA=y
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CONFIG_QCOM_GPI_DMA=m
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CONFIG_QCOM_HIDMA_MGMT=y
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CONFIG_QCOM_HIDMA=y
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CONFIG_RCAR_DMAC=y
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@ -1038,6 +1049,8 @@ CONFIG_SM_GCC_8350=y
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CONFIG_SM_GCC_8450=y
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CONFIG_SM_GPUCC_8150=y
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CONFIG_SM_GPUCC_8250=y
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CONFIG_SM_DISPCC_8250=y
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CONFIG_SM_VIDEOCC_8250=y
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CONFIG_QCOM_HFPLL=y
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CONFIG_CLK_GFM_LPASS_SM8250=m
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CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
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@ -1074,6 +1087,7 @@ CONFIG_FSL_MC_DPIO=y
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CONFIG_FSL_RCPM=y
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CONFIG_MTK_DEVAPC=m
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CONFIG_MTK_PMIC_WRAP=y
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CONFIG_MAILBOX=y
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CONFIG_QCOM_AOSS_QMP=y
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CONFIG_QCOM_COMMAND_DB=y
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CONFIG_QCOM_CPR=y
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@ -1174,6 +1188,7 @@ CONFIG_PHY_HISTB_COMBPHY=y
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CONFIG_PHY_HISI_INNO_USB2=y
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CONFIG_PHY_MVEBU_CP110_COMPHY=y
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CONFIG_PHY_MTK_TPHY=y
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CONFIG_PHY_QCOM_PCIE2=m
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CONFIG_PHY_QCOM_QMP=m
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CONFIG_PHY_QCOM_QUSB2=m
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CONFIG_PHY_QCOM_USB_HS=y
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@ -1263,6 +1278,7 @@ CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_SECURITY=y
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CONFIG_CRYPTO_ECHAINIV=y
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_ANSI_CPRNG=y
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CONFIG_CRYPTO_USER_API_RNG=m
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CONFIG_CRYPTO_DEV_SUN8I_CE=m
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