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[ARM] 4201/1: SMP barriers pair needed for the secondary boot process

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In some situations, the pen_release store in platform_secondary_init()
may stay forever in the write buffer while the CPU is waiting on the
boot_lock to be released in boot_secondary(). The primary CPU could
never see the pen_release update without the barriers.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2007-02-15 19:05:29 +01:00 committed by Russell King
parent 7770bddb27
commit 0e0ba76926
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-realview/platsmp.c
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@ -59,6 +59,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* pen, then head off into the C entry point
*/
pen_release = -1;
smp_wmb();
/*
* Synchronise with the boot thread.
@ -102,6 +103,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
smp_rmb();
if (pen_release == -1)
break;