diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 680451695422..faaa2166d741 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -753,6 +753,8 @@ What: /sys/.../events/in_illuminance0_thresh_falling_value what: /sys/.../events/in_illuminance0_thresh_rising_value what: /sys/.../events/in_proximity0_thresh_falling_value what: /sys/.../events/in_proximity0_thresh_rising_value +What: /sys/.../events/in_illuminance_thresh_rising_value +What: /sys/.../events/in_illuminance_thresh_falling_value KernelVersion: 2.6.37 Contact: linux-iio@vger.kernel.org Description: @@ -972,6 +974,7 @@ What: /sys/.../events/in_activity_jogging_thresh_rising_period What: /sys/.../events/in_activity_jogging_thresh_falling_period What: /sys/.../events/in_activity_running_thresh_rising_period What: /sys/.../events/in_activity_running_thresh_falling_period +What: /sys/.../events/in_illuminance_thresh_either_period KernelVersion: 2.6.37 Contact: linux-iio@vger.kernel.org Description: @@ -1715,3 +1718,11 @@ Description: Mass concentration reading of particulate matter in ug / m3. pmX consists of particles with aerodynamic diameter less or equal to X micrometers. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_illuminance_period_available +Date: November 2019 +KernelVersion: 5.4 +Contact: linux-iio@vger.kernel.org +Description: + List of valid periods (in seconds) for which the light intensity + must be above the threshold level before interrupt is asserted. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 new file mode 100644 index 000000000000..7627d3be08f5 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7192 @@ -0,0 +1,39 @@ +What: /sys/bus/iio/devices/iio:deviceX/ac_excitation_en +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + Reading gives the state of AC excitation. + Writing '1' enables AC excitation. + +What: /sys/bus/iio/devices/iio:deviceX/bridge_switch_en +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + This bridge switch is used to disconnect it when there is a + need to minimize the system current consumption. + Reading gives the state of the bridge switch. + Writing '1' enables the bridge switch. + +What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + Initiates the system calibration procedure. This is done on a + single channel at a time. Write '1' to start the calibration. + +What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration_mode_available +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + Reading returns a list with the possible calibration modes. + There are two available options: + "zero_scale" - calibrate to zero scale + "full_scale" - calibrate to full scale + +What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration_mode +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + Sets up the calibration mode used in the system calibration + procedure. Reading returns the current calibration mode. + Writing sets the system calibration mode. diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml new file mode 100644 index 000000000000..85f1ff83afe7 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/ti-eqep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments Enhanced Quadrature Encoder Pulse (eQEP) Module + +maintainers: + - David Lechner + +properties: + compatible: + const: ti,am3352-eqep + + reg: + maxItems: 1 + + interrupts: + description: The eQEP event interrupt + maxItems: 1 + + clocks: + description: The clock that determines the SYSCLKOUT rate for the eQEP + peripheral. + maxItems: 1 + + clock-names: + const: sysclkout + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + eqep0: counter@180 { + compatible = "ti,am3352-eqep"; + reg = <0x180 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "sysclkout"; + interrupts = <79>; + }; + +... diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml new file mode 100644 index 000000000000..b68be3aaf587 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7292.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7292 10-Bit Monitor and Control System + +maintainers: + - Marcelo Schmitt + +description: | + Analog Devices AD7292 10-Bit Monitor and Control System with ADC, DACs, + Temperature Sensor, and GPIOs + + Specifications about the part can be found at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7292.pdf + +properties: + compatible: + enum: + - adi,ad7292 + + reg: + maxItems: 1 + + vref-supply: + description: | + The regulator supply for ADC and DAC reference voltage. + + spi-cpha: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - reg + - spi-cpha + +patternProperties: + "^channel@[0-7]$": + type: object + description: | + Represents the external channels which are connected to the ADC. + See Documentation/devicetree/bindings/iio/adc/adc.txt. + + properties: + reg: + description: | + The channel number. It can have up to 8 channels numbered from 0 to 7. + items: + maximum: 7 + + diff-channels: + description: see Documentation/devicetree/bindings/iio/adc/adc.txt + maxItems: 1 + + required: + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + ad7292: adc@0 { + compatible = "adi,ad7292"; + reg = <0>; + spi-max-frequency = <25000000>; + vref-supply = <&adc_vref>; + spi-cpha; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + diff-channels = <0 1>; + }; + channel@2 { + reg = <2>; + }; + channel@3 { + reg = <3>; + }; + channel@4 { + reg = <4>; + }; + channel@5 { + reg = <5>; + }; + channel@6 { + reg = <6>; + }; + channel@7 { + reg = <7>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.txt b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.txt index f01159f20d87..cd9048cf9dcf 100644 --- a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.txt @@ -5,6 +5,7 @@ Required properties: - compatible: Should be one of: * ingenic,jz4725b-adc * ingenic,jz4740-adc + * ingenic,jz4770-adc - reg: ADC controller registers location and length. - clocks: phandle to the SoC's ADC clock. - clock-names: Must be set to "adc". diff --git a/Documentation/devicetree/bindings/iio/adc/max1027-adc.txt b/Documentation/devicetree/bindings/iio/adc/max1027-adc.txt deleted file mode 100644 index e680c61dfb84..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/max1027-adc.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Maxim 1027/1029/1031 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031" - - reg: SPI chip select number for the device - - interrupts: IRQ line for the ADC - see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - -Recommended properties: -- spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "maxim,max1027"; - reg = <0>; - interrupt-parent = <&gpio5>; - interrupts = <15 IRQ_TYPE_EDGE_RISING>; - spi-max-frequency = <1000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/mcp3911.txt b/Documentation/devicetree/bindings/iio/adc/mcp3911.txt deleted file mode 100644 index 3071f48fb30b..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/mcp3911.txt +++ /dev/null @@ -1,30 +0,0 @@ -* Microchip MCP3911 Dual channel analog front end (ADC) - -Required properties: - - compatible: Should be "microchip,mcp3911" - - reg: SPI chip select number for the device - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt. - Max frequency for this chip is 20MHz. - -Optional properties: - - clocks: Phandle and clock identifier for sampling clock - - interrupt-parent: Phandle to the parent interrupt controller - - interrupts: IRQ line for the ADC - - microchip,device-addr: Device address when multiple MCP3911 chips are present on the - same SPI bus. Valid values are 0-3. Defaults to 0. - - vref-supply: Phandle to the external reference voltage supply. - -Example: -adc@0 { - compatible = "microchip,mcp3911"; - reg = <0>; - interrupt-parent = <&gpio5>; - interrupts = <15 IRQ_TYPE_EDGE_RISING>; - spi-max-frequency = <20000000>; - microchip,device-addr = <0>; - vref-supply = <&vref_reg>; - clocks = <&xtal>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml new file mode 100644 index 000000000000..881059b80d61 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +# Copyright 2019 Marcus Folkesson +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/bindings/iio/adc/microchip,mcp3911.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Microchip MCP3911 Dual channel analog front end (ADC) + +maintainers: + - Marcus Folkesson + - Kent Gustavsson + +description: | + Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be + found here: https://ww1.microchip.com/downloads/en/DeviceDoc/20002286C.pdf + +properties: + compatible: + enum: + - microchip,mcp3911 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + clocks: + description: | + Phandle and clock identifier for external sampling clock. + If not specified, the internal crystal oscillator will be used. + maxItems: 1 + + interrupts: + description: IRQ line of the ADC + maxItems: 1 + + microchip,device-addr: + description: Device address when multiple MCP3911 chips are present on the same SPI bus. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 2, 3] + - default: 0 + + vref-supply: + description: | + Phandle to the external reference voltage supply. + If not specified, the internal voltage reference (1.2V) will be used. + +required: + - compatible + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "microchip,mcp3911"; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <15 2>; + spi-max-frequency = <20000000>; + microchip,device-addr = <0>; + vref-supply = <&vref_reg>; + clocks = <&xtal>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt index 4c0da8c74bb2..8de933146771 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt @@ -53,6 +53,8 @@ Optional properties: analog input switches on stm32mp1. - st,syscfg: Phandle to system configuration controller. It can be used to control the analog circuitry on stm32mp1. +- st,max-clk-rate-hz: Allow to specify desired max clock rate used by analog + circuitry. Contents of a stm32 adc child node: ----------------------------------- diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml b/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml new file mode 100644 index 000000000000..13d005b68931 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +# Copyright 2019 Marcus Folkesson +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/bindings/iio/dac/lltc,ltc1660.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Linear Technology Micropower octal 8-Bit and 10-Bit DACs + +maintainers: + - Marcus Folkesson + +description: | + Bindings for the Linear Technology Micropower octal 8-Bit and 10-Bit DAC. + Datasheet can be found here: https://www.analog.com/media/en/technical-documentation/data-sheets/166560fa.pdf + +properties: + compatible: + enum: + - lltc,ltc1660 + - lltc,ltc1665 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + vref-supply: + description: Phandle to the external reference voltage supply. + +required: + - compatible + - reg + - vref-supply + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "lltc,ltc1660"; + reg = <0>; + spi-max-frequency = <5000000>; + vref-supply = <&vref_reg>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/dac/ltc1660.txt b/Documentation/devicetree/bindings/iio/dac/ltc1660.txt deleted file mode 100644 index c5b5f22d6c64..000000000000 --- a/Documentation/devicetree/bindings/iio/dac/ltc1660.txt +++ /dev/null @@ -1,21 +0,0 @@ -* Linear Technology Micropower octal 8-Bit and 10-Bit DACs - -Required properties: - - compatible: Must be one of the following: - "lltc,ltc1660" - "lltc,ltc1665" - - reg: SPI chip select number for the device - - vref-supply: Phandle to the voltage reference supply - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt. - Max frequency for this chip is 5 MHz. - -Example: -dac@0 { - compatible = "lltc,ltc1660"; - reg = <0>; - spi-max-frequency = <5000000>; - vref-supply = <&vref_reg>; -}; diff --git a/Documentation/devicetree/bindings/iio/iio-bindings.txt b/Documentation/devicetree/bindings/iio/iio-bindings.txt index 68d6f8ce063b..af33267727f4 100644 --- a/Documentation/devicetree/bindings/iio/iio-bindings.txt +++ b/Documentation/devicetree/bindings/iio/iio-bindings.txt @@ -18,12 +18,17 @@ Required properties: with a single IIO output and 1 for nodes with multiple IIO outputs. +Optional properties: +label: A symbolic name for the device. + + Example for a simple configuration with no trigger: adc: voltage-sensor@35 { compatible = "maxim,max1139"; reg = <0x35>; #io-channel-cells = <1>; + label = "voltage_feedback_group1"; }; Example for a configuration with trigger: diff --git a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt index 268bf7568e19..c5ee8a20af9f 100644 --- a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt +++ b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt @@ -21,6 +21,7 @@ Required properties: bindings. Optional properties: + - vdd-supply: regulator phandle for VDD supply - vddio-supply: regulator phandle for VDDIO supply - mount-matrix: an optional 3x3 mounting rotation matrix - i2c-gate node. These devices also support an auxiliary i2c bus. This is diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml new file mode 100644 index 000000000000..63bcb73ae309 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/imu/nxp,fxos8700.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale FXOS8700 Inertial Measurement Unit + +maintainers: + - Robert Jones + +description: | + Accelerometer and magnetometer combo device with an i2c and SPI interface. + https://www.nxp.com/products/sensors/motion-sensors/6-axis/digital-motion-sensor-3d-accelerometer-2g-4g-8g-plus-3d-magnetometer:FXOS8700CQ + +properties: + compatible: + enum: + - nxp,fxos8700 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + enum: + - INT1 + - INT2 + + drive-open-drain: + type: boolean + +required: + - compatible + - reg + +examples: + - | + #include + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + fxos8700@1e { + compatible = "nxp,fxos8700"; + reg = <0x1e>; + + interrupt-parent = <&gpio2>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "INT1"; + }; + }; + - | + #include + #include + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + fxos8700@0 { + compatible = "nxp,fxos8700"; + reg = <0>; + + spi-max-frequency = <1000000>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "INT2"; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt index 6d0c050d89fe..cef4bc16fce1 100644 --- a/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt +++ b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt @@ -14,6 +14,8 @@ Required properties: "st,lsm6ds3tr-c" "st,ism330dhcx" "st,lsm9ds1-imu" + "st,lsm6ds0" + "st,lsm6dsrx" - reg: i2c address of the sensor / spi cs line Optional properties: @@ -31,6 +33,7 @@ Optional properties: - interrupts: interrupt mapping for IRQ. It should be configured with flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. +- wakeup-source: Enables wake up of host system on event. Refer to interrupt-controller/interrupts.txt for generic interrupt client node bindings. diff --git a/Documentation/devicetree/bindings/iio/light/adux1020.yaml b/Documentation/devicetree/bindings/iio/light/adux1020.yaml new file mode 100644 index 000000000000..69bd5c06319d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/adux1020.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/adux1020.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADUX1020 Photometric sensor + +maintainers: + - Manivannan Sadhasivam + +description: | + Photometric sensor over an i2c interface. + https://www.analog.com/media/en/technical-documentation/data-sheets/ADUX1020.pdf + +properties: + compatible: + enum: + - adi,adux1020 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + #include + + i2c { + + #address-cells = <1>; + #size-cells = <0>; + + adux1020@64 { + compatible = "adi,adux1020"; + reg = <0x64>; + interrupt-parent = <&msmgpio>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/light/bh1750.txt b/Documentation/devicetree/bindings/iio/light/bh1750.txt deleted file mode 100644 index 1e7685797d7a..000000000000 --- a/Documentation/devicetree/bindings/iio/light/bh1750.txt +++ /dev/null @@ -1,18 +0,0 @@ -ROHM BH1750 - ALS, Ambient light sensor - -Required properties: - -- compatible: Must be one of: - "rohm,bh1710" - "rohm,bh1715" - "rohm,bh1721" - "rohm,bh1750" - "rohm,bh1751" -- reg: the I2C address of the sensor - -Example: - -light-sensor@23 { - compatible = "rohm,bh1750"; - reg = <0x23>; -}; diff --git a/Documentation/devicetree/bindings/iio/light/bh1750.yaml b/Documentation/devicetree/bindings/iio/light/bh1750.yaml new file mode 100644 index 000000000000..1cc60d7ecfa0 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/bh1750.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/bh1750.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BH1750 ambient light sensor + +maintainers: + - Tomasz Duszynski + +description: | + Ambient light sensor with an i2c interface. + +properties: + compatible: + enum: + - rohm,bh1710 + - rohm,bh1715 + - rohm,bh1721 + - rohm,bh1750 + - rohm,bh1751 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@23 { + compatible = "rohm,bh1750"; + reg = <0x23>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/iio/light/veml6030.yaml b/Documentation/devicetree/bindings/iio/light/veml6030.yaml new file mode 100644 index 000000000000..0ff9b11f9d18 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/veml6030.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0+ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/veml6030.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VEML6030 Ambient Light Sensor (ALS) + +maintainers: + - Rishi Gupta + +description: | + Bindings for the ambient light sensor veml6030 from Vishay + Semiconductors over an i2c interface. + + Irrespective of whether interrupt is used or not, application + can get the ALS and White channel reading from IIO raw interface. + + If the interrupts are used, application will receive an IIO event + whenever configured threshold is crossed. + + Specifications about the sensor can be found at: + https://www.vishay.com/docs/84366/veml6030.pdf + +properties: + compatible: + enum: + - vishay,veml6030 + + reg: + description: + I2C address of the device. + enum: + - 0x10 # ADDR pin pulled down + - 0x48 # ADDR pin pulled up + + interrupts: + description: + interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW. + Refer to interrupt-controller/interrupts.txt for generic + interrupt client node bindings. + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@10 { + compatible = "vishay,veml6030"; + reg = <0x10>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt b/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt deleted file mode 100644 index dd1058fbe9c3..000000000000 --- a/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt +++ /dev/null @@ -1,29 +0,0 @@ -* MaxBotix I2CXL-MaxSonar ultrasonic distance sensor of type mb1202, - mb1212, mb1222, mb1232, mb1242, mb7040 or mb7137 using the i2c interface - for ranging - -Required properties: - - compatible: "maxbotix,mb1202", - "maxbotix,mb1212", - "maxbotix,mb1222", - "maxbotix,mb1232", - "maxbotix,mb1242", - "maxbotix,mb7040" or - "maxbotix,mb7137" - - - reg: i2c address of the device, see also i2c/i2c.txt - -Optional properties: - - interrupts: Interrupt used to announce the preceding reading - request has finished and that data is available. - If no interrupt is specified the device driver - falls back to wait a fixed amount of time until - data can be retrieved. - -Example: -proximity@70 { - compatible = "maxbotix,mb1232"; - reg = <0x70>; - interrupt-parent = <&gpio2>; - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; -}; diff --git a/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml b/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml new file mode 100644 index 000000000000..3eac248f291d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/maxbotix,mb1232.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MaxBotix I2CXL-MaxSonar ultrasonic distance sensor + +maintainers: + - Andreas Klinger + +description: | + MaxBotix I2CXL-MaxSonar ultrasonic distance sensor of type mb1202, + mb1212, mb1222, mb1232, mb1242, mb7040 or mb7137 using the i2c interface + for ranging + + Specifications about the devices can be found at: + https://www.maxbotix.com/documents/I2CXL-MaxSonar-EZ_Datasheet.pdf + +properties: + compatible: + enum: + - maxbotix,mb1202 + - maxbotix,mb1212 + - maxbotix,mb1222 + - maxbotix,mb1232 + - maxbotix,mb1242 + - maxbotix,mb7040 + - maxbotix,mb7137 + + reg: + maxItems: 1 + + interrupts: + description: + Interrupt used to announce the preceding reading request has finished + and that data is available. If no interrupt is specified the device + driver falls back to wait a fixed amount of time until data can be + retrieved. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + proximity@70 { + compatible = "maxbotix,mb1232"; + reg = <0x70>; + interrupt-parent = <&gpio2>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml new file mode 100644 index 000000000000..d4922f9f0376 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml @@ -0,0 +1,480 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices LTC2983 Multi-sensor Temperature system + +maintainers: + - Nuno Sá + +description: | + Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System + https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf + +properties: + compatible: + enum: + - adi,ltc2983 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + adi,mux-delay-config-us: + description: + The LTC2983 performs 2 or 3 internal conversion cycles per temperature + result. Each conversion cycle is performed with different excitation and + input multiplexer configurations. Prior to each conversion, these + excitation circuits and input switch configurations are changed and an + internal 1ms delay ensures settling prior to the conversion cycle in most + cases. An extra delay can be configured using this property. The value is + rounded to nearest 100us. + maximum: 255 + + adi,filter-notch-freq: + description: + Set's the default setting of the digital filter. The default is + simultaneous 50/60Hz rejection. + 0 - 50/60Hz rejection + 1 - 60Hz rejection + 2 - 50Hz rejection + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 2 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "@([1-9]|1[0-9]|20)$": + type: object + + properties: + reg: + description: + The channel number. It can be connected to one of the 20 channels of + the device. + minimum: 1 + maximum: 20 + + adi,sensor-type: + description: Identifies the type of sensor connected to the device. + $ref: /schemas/types.yaml#/definitions/uint32 + + required: + - reg + - adi,sensor-type + + "^thermocouple@": + type: object + description: + Represents a thermocouple sensor which is connected to one of the device + channels. + + properties: + adi,sensor-type: + description: | + 1 - Type J Thermocouple + 2 - Type K Thermocouple + 3 - Type E Thermocouple + 4 - Type N Thermocouple + 5 - Type R Thermocouple + 6 - Type S Thermocouple + 7 - Type T Thermocouple + 8 - Type B Thermocouple + 9 - Custom Thermocouple + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 9 + + adi,single-ended: + description: + Boolean property which set's the thermocouple as single-ended. + type: boolean + + adi,sensor-oc-current-microamp: + description: + This property set's the pulsed current value applied during + open-circuit detect. + enum: [10, 100, 500, 1000] + + adi,cold-junction-handle: + description: + Phandle which points to a sensor object responsible for measuring + the thermocouple cold junction temperature. + $ref: "/schemas/types.yaml#/definitions/phandle" + + adi,custom-thermocouple: + description: + This is a table, where each entry should be a pair of + voltage(mv)-temperature(K). The entries must be given in nv and uK + so that, the original values must be multiplied by 1000000. For + more details look at table 69 and 70. + Note should be signed, but dtc doesn't currently maintain the + sign. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-matrix + items: + minItems: 3 + maxItems: 64 + items: + minItems: 2 + maxItems: 2 + + "^diode@": + type: object + description: + Represents a diode sensor which is connected to one of the device + channels. + + properties: + adi,sensor-type: + description: Identifies the sensor as a diode. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + const: 28 + + adi,single-ended: + description: Boolean property which set's the diode as single-ended. + type: boolean + + adi,three-conversion-cycles: + description: + Boolean property which set's three conversion cycles removing + parasitic resistance effects between the LTC2983 and the diode. + type: boolean + + adi,average-on: + description: + Boolean property which enables a running average of the diode + temperature reading. This reduces the noise when the diode is used + as a cold junction temperature element on an isothermal block + where temperatures change slowly. + type: boolean + + adi,excitation-current-microamp: + description: + This property controls the magnitude of the excitation current + applied to the diode. Depending on the number of conversions + cycles, this property will assume different predefined values on + each cycle. Just set the value of the first cycle (1l). + enum: [10, 20, 40, 80] + + adi,ideal-factor-value: + description: + This property sets the diode ideality factor. The real value must + be multiplied by 1000000 to remove the fractional part. For more + information look at table 20 of the datasheet. + $ref: /schemas/types.yaml#/definitions/uint32 + + "^rtd@": + type: object + description: + Represents a rtd sensor which is connected to one of the device channels. + + properties: + reg: + minimum: 2 + maximum: 20 + + adi,sensor-type: + description: | + 10 - RTD PT-10 + 11 - RTD PT-50 + 12 - RTD PT-100 + 13 - RTD PT-200 + 14 - RTD PT-500 + 15 - RTD PT-1000 + 16 - RTD PT-1000 (0.00375) + 17 - RTD NI-120 + 18 - RTD Custom + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 10 + maximum: 18 + + adi,rsense-handle: + description: + Phandle pointing to a rsense object associated with this RTD. + $ref: "/schemas/types.yaml#/definitions/phandle" + + adi,number-of-wires: + description: + Identifies the number of wires used by the RTD. Setting this + property to 5 means 4 wires with Kelvin Rsense. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2, 3, 4, 5] + + adi,rsense-share: + description: + Boolean property which enables Rsense sharing, where one sense + resistor is used for multiple 2-, 3-, and/or 4-wire RTDs. + type: boolean + + adi,current-rotate: + description: + Boolean property which enables excitation current rotation to + automatically remove parasitic thermocouple effects. Note that + this property is not allowed for 2- and 3-wire RTDs. + type: boolean + + adi,excitation-current-microamp: + description: + This property controls the magnitude of the excitation current + applied to the RTD. + enum: [5, 10, 25, 50, 100, 250, 500, 1000] + + adi,rtd-curve: + description: + This property set the RTD curve used and the corresponding + Callendar-VanDusen constants. Look at table 30 of the datasheet. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + maximum: 3 + + adi,custom-rtd: + description: + This is a table, where each entry should be a pair of + resistance(ohm)-temperature(K). The entries added here are in uohm + and uK. For more details values look at table 74 and 75. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-matrix + items: + minItems: 3 + maxItems: 64 + items: + minItems: 2 + maxItems: 2 + + required: + - adi,rsense-handle + + dependencies: + adi,current-rotate: [ adi,rsense-share ] + + "^thermistor@": + type: object + description: + Represents a thermistor sensor which is connected to one of the device + channels. + + properties: + adi,sensor-type: + description: + 19 - Thermistor 44004/44033 2.252kohm at 25°C + 20 - Thermistor 44005/44030 3kohm at 25°C + 21 - Thermistor 44007/44034 5kohm at 25°C + 22 - Thermistor 44006/44031 10kohm at 25°C + 23 - Thermistor 44008/44032 30kohm at 25°C + 24 - Thermistor YSI 400 2.252kohm at 25°C + 25 - Thermistor Spectrum 1003k 1kohm + 26 - Thermistor Custom Steinhart-Hart + 27 - Custom Thermistor + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 19 + maximum: 27 + + adi,rsense-handle: + description: + Phandle pointing to a rsense object associated with this + thermistor. + $ref: "/schemas/types.yaml#/definitions/phandle" + + adi,single-ended: + description: + Boolean property which set's the thermistor as single-ended. + type: boolean + + adi,rsense-share: + description: + Boolean property which enables Rsense sharing, where one sense + resistor is used for multiple thermistors. Note that this property + is ignored if adi,single-ended is set. + type: boolean + + adi,current-rotate: + description: + Boolean property which enables excitation current rotation to + automatically remove parasitic thermocouple effects. + type: boolean + + adi,excitation-current-nanoamp: + description: + This property controls the magnitude of the excitation current + applied to the thermistor. Value 0 set's the sensor in auto-range + mode. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 250, 500, 1000, 5000, 10000, 25000, 50000, 100000, + 250000, 500000, 1000000] + + adi,custom-thermistor: + description: + This is a table, where each entry should be a pair of + resistance(ohm)-temperature(K). The entries added here are in uohm + and uK only for custom thermistors. For more details look at table + 78 and 79. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-matrix + items: + minItems: 3 + maxItems: 64 + items: + minItems: 2 + maxItems: 2 + + adi,custom-steinhart: + description: + Steinhart-Hart coefficients are also supported and can + be programmed into the device memory using this property. For + Steinhart sensors the coefficients are given in the raw + format. Look at table 82 for more information. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + items: + minItems: 6 + maxItems: 6 + + required: + - adi,rsense-handle + + dependencies: + adi,current-rotate: [ adi,rsense-share ] + + "^adc@": + type: object + description: Represents a channel which is being used as a direct adc. + + properties: + adi,sensor-type: + description: Identifies the sensor as a direct adc. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + const: 30 + + adi,single-ended: + description: Boolean property which set's the adc as single-ended. + type: boolean + + "^rsense@": + type: object + description: + Represents a rsense which is connected to one of the device channels. + Rsense are used by thermistors and RTD's. + + properties: + reg: + minimum: 2 + maximum: 20 + + adi,sensor-type: + description: Identifies the sensor as a rsense. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + const: 29 + + adi,rsense-val-milli-ohms: + description: + Sets the value of the sense resistor. Look at table 20 of the + datasheet for information. + + required: + - adi,rsense-val-milli-ohms + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + sensor_ltc2983: ltc2983@0 { + compatible = "adi,ltc2983"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <20 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&gpio>; + + thermocouple@18 { + reg = <18>; + adi,sensor-type = <8>; //Type B + adi,sensor-oc-current-microamp = <10>; + adi,cold-junction-handle = <&diode5>; + }; + + diode5: diode@5 { + reg = <5>; + adi,sensor-type = <28>; + }; + + rsense2: rsense@2 { + reg = <2>; + adi,sensor-type = <29>; + adi,rsense-val-milli-ohms = <1200000>; //1.2Kohms + }; + + rtd@14 { + reg = <14>; + adi,sensor-type = <15>; //PT1000 + /*2-wire, internal gnd, no current rotation*/ + adi,number-of-wires = <2>; + adi,rsense-share; + adi,excitation-current-microamp = <500>; + adi,rsense-handle = <&rsense2>; + }; + + adc@10 { + reg = <10>; + adi,sensor-type = <30>; + adi,single-ended; + }; + + thermistor@12 { + reg = <12>; + adi,sensor-type = <26>; //Steinhart + adi,rsense-handle = <&rsense2>; + adi,custom-steinhart = <0x00F371EC 0x12345678 + 0x2C0F8733 0x10018C66 0xA0FEACCD + 0x90021D99>; //6 entries + }; + + thermocouple@20 { + reg = <20>; + adi,sensor-type = <9>; //custom thermocouple + adi,single-ended; + adi,custom-thermocouple = /bits/ 64 + <(-50220000) 0 + (-30200000) 99100000 + (-5300000) 135400000 + 0 273150000 + 40200000 361200000 + 55300000 522100000 + 88300000 720300000 + 132200000 811200000 + 188700000 922500000 + 460400000 1000000000>; //10 pairs + }; + + }; + }; +... diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 870ac52d2225..765fd1c170df 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -114,6 +114,18 @@ properties: - isil,isl68137 # 5 Bit Programmable, Pulse-Width Modulator - maxim,ds1050 + # 10-bit 8 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1027 + # 10-bit 12 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1029 + # 10-bit 16 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1031 + # 12-bit 8 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1227 + # 12-bit 12 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1229 + # 12-bit 16 channels 300ks/s SPI ADC with temperature sensor + - maxim,max1231 # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs - maxim,max1237 # PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion diff --git a/Documentation/driver-api/generic-counter.rst b/Documentation/driver-api/generic-counter.rst index 8382f01a53e3..e622f8f6e56a 100644 --- a/Documentation/driver-api/generic-counter.rst +++ b/Documentation/driver-api/generic-counter.rst @@ -7,7 +7,7 @@ Generic Counter Interface Introduction ============ -Counter devices are prevalent within a diverse spectrum of industries. +Counter devices are prevalent among a diverse spectrum of industries. The ubiquitous presence of these devices necessitates a common interface and standard of interaction and exposure. This driver API attempts to resolve the issue of duplicate code found among existing counter device @@ -26,23 +26,72 @@ the Generic Counter interface. There are three core components to a counter: -* Count: - Count data for a set of Signals. - * Signal: - Input data that is evaluated by the counter to determine the count - data. + Stream of data to be evaluated by the counter. * Synapse: - The association of a Signal with a respective Count. + Association of a Signal, and evaluation trigger, with a Count. + +* Count: + Accumulation of the effects of connected Synapses. + +SIGNAL +------ +A Signal represents a stream of data. This is the input data that is +evaluated by the counter to determine the count data; e.g. a quadrature +signal output line of a rotary encoder. Not all counter devices provide +user access to the Signal data, so exposure is optional for drivers. + +When the Signal data is available for user access, the Generic Counter +interface provides the following available signal values: + +* SIGNAL_LOW: + Signal line is in a low state. + +* SIGNAL_HIGH: + Signal line is in a high state. + +A Signal may be associated with one or more Counts. + +SYNAPSE +------- +A Synapse represents the association of a Signal with a Count. Signal +data affects respective Count data, and the Synapse represents this +relationship. + +The Synapse action mode specifies the Signal data condition that +triggers the respective Count's count function evaluation to update the +count data. The Generic Counter interface provides the following +available action modes: + +* None: + Signal does not trigger the count function. In Pulse-Direction count + function mode, this Signal is evaluated as Direction. + +* Rising Edge: + Low state transitions to high state. + +* Falling Edge: + High state transitions to low state. + +* Both Edges: + Any state transition. + +A counter is defined as a set of input signals associated with count +data that are generated by the evaluation of the state of the associated +input signals as defined by the respective count functions. Within the +context of the Generic Counter interface, a counter consists of Counts +each associated with a set of Signals, whose respective Synapse +instances represent the count function update conditions for the +associated Counts. + +A Synapse associates one Signal with one Count. COUNT ----- -A Count represents the count data for a set of Signals. The Generic -Counter interface provides the following available count data types: - -* COUNT_POSITION: - Unsigned integer value representing position. +A Count represents the accumulation of the effects of connected +Synapses; i.e. the count data for a set of Signals. The Generic +Counter interface represents the count data as a natural number. A Count has a count function mode which represents the update behavior for the count data. The Generic Counter interface provides the following @@ -86,60 +135,7 @@ available count function modes: Any state transition on either quadrature pair signals updates the respective count. Quadrature encoding determines the direction. -A Count has a set of one or more associated Signals. - -SIGNAL ------- -A Signal represents a counter input data; this is the input data that is -evaluated by the counter to determine the count data; e.g. a quadrature -signal output line of a rotary encoder. Not all counter devices provide -user access to the Signal data. - -The Generic Counter interface provides the following available signal -data types for when the Signal data is available for user access: - -* SIGNAL_LEVEL: - Signal line state level. The following states are possible: - - - SIGNAL_LEVEL_LOW: - Signal line is in a low state. - - - SIGNAL_LEVEL_HIGH: - Signal line is in a high state. - -A Signal may be associated with one or more Counts. - -SYNAPSE -------- -A Synapse represents the association of a Signal with a respective -Count. Signal data affects respective Count data, and the Synapse -represents this relationship. - -The Synapse action mode specifies the Signal data condition which -triggers the respective Count's count function evaluation to update the -count data. The Generic Counter interface provides the following -available action modes: - -* None: - Signal does not trigger the count function. In Pulse-Direction count - function mode, this Signal is evaluated as Direction. - -* Rising Edge: - Low state transitions to high state. - -* Falling Edge: - High state transitions to low state. - -* Both Edges: - Any state transition. - -A counter is defined as a set of input signals associated with count -data that are generated by the evaluation of the state of the associated -input signals as defined by the respective count functions. Within the -context of the Generic Counter interface, a counter consists of Counts -each associated with a set of Signals, whose respective Synapse -instances represent the count function update conditions for the -associated Counts. +A Count has a set of one or more associated Synapses. Paradigm ======== @@ -286,10 +282,36 @@ if device memory-managed registration is desired. Extension sysfs attributes can be created for auxiliary functionality and data by passing in defined counter_device_ext, counter_count_ext, and counter_signal_ext structures. In these cases, the -counter_device_ext structure is used for global configuration of the -respective Counter device, while the counter_count_ext and -counter_signal_ext structures allow for auxiliary exposure and -configuration of a specific Count or Signal respectively. +counter_device_ext structure is used for global/miscellaneous exposure +and configuration of the respective Counter device, while the +counter_count_ext and counter_signal_ext structures allow for auxiliary +exposure and configuration of a specific Count or Signal respectively. + +Determining the type of extension to create is a matter of scope. + +* Signal extensions are attributes that expose information/control + specific to a Signal. These types of attributes will exist under a + Signal's directory in sysfs. + + For example, if you have an invert feature for a Signal, you can have + a Signal extension called "invert" that toggles that feature: + /sys/bus/counter/devices/counterX/signalY/invert + +* Count extensions are attributes that expose information/control + specific to a Count. These type of attributes will exist under a + Count's directory in sysfs. + + For example, if you want to pause/unpause a Count from updating, you + can have a Count extension called "enable" that toggles such: + /sys/bus/counter/devices/counterX/countY/enable + +* Device extensions are attributes that expose information/control + non-specific to a particular Count or Signal. This is where you would + put your global features or other miscellanous functionality. + + For example, if your device has an overtemp sensor, you can report the + chip overheated via a device extension called "error_overtemp": + /sys/bus/counter/devices/counterX/error_overtemp Architecture ============ diff --git a/MAINTAINERS b/MAINTAINERS index 44062b8abe16..b16b72ae6cd6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -901,6 +901,14 @@ S: Supported F: drivers/iio/adc/ad7124.c F: Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +ANALOG DEVICES INC AD7292 DRIVER +M: Marcelo Schmitt +L: linux-iio@vger.kernel.org +W: http://ez.analog.com/community/linux-device-drivers +S: Supported +F: drivers/iio/adc/ad7292.c +F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml + ANALOG DEVICES INC AD7606 DRIVER M: Stefan Popa M: Beniamin Bia @@ -6182,6 +6190,7 @@ F: include/uapi/linux/mii.h EXFAT FILE SYSTEM M: Valdis Kletnieks +L: linux-fsdevel@vger.kernel.org S: Maintained F: drivers/staging/exfat/ @@ -9701,9 +9710,17 @@ LTC1660 DAC DRIVER M: Marcus Folkesson L: linux-iio@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/iio/dac/ltc1660.txt +F: Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml F: drivers/iio/dac/ltc1660.c +LTC2983 IIO TEMPERATURE DRIVER +M: Nuno Sá +W: http://ez.analog.com/community/linux-device-drivers +L: linux-iio@vger.kernel.org +S: Supported +F: drivers/iio/temperature/ltc2983.c +F: Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml + LTC4261 HARDWARE MONITOR DRIVER M: Guenter Roeck L: linux-hwmon@vger.kernel.org @@ -10819,7 +10836,7 @@ M: Kent Gustavsson L: linux-iio@vger.kernel.org S: Supported F: drivers/iio/adc/mcp3911.c -F: Documentation/devicetree/bindings/iio/adc/mcp3911.txt +F: Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml MICROCHIP NAND DRIVER M: Tudor Ambarus @@ -14072,6 +14089,12 @@ L: linux-serial@vger.kernel.org S: Odd Fixes F: drivers/tty/serial/rp2.* +ROHM BH1750 AMBIENT LIGHT SENSOR DRIVER +M: Tomasz Duszynski +S: Maintained +F: drivers/iio/light/bh1750.c +F: Documentation/devicetree/bindings/iio/light/bh1750.yaml + ROHM MULTIFUNCTION BD9571MWV-M PMIC DEVICE DRIVERS M: Marek Vasut L: linux-kernel@vger.kernel.org @@ -14923,6 +14946,11 @@ S: Maintained F: drivers/input/touchscreen/silead.c F: drivers/platform/x86/touchscreen_dmi.c +SILICON LABS WIRELESS DRIVERS (for WFxxx series) +M: Jérôme Pouiller +S: Supported +F: drivers/staging/wfx/ + SILICON MOTION SM712 FRAME BUFFER DRIVER M: Sudip Mukherjee M: Teddy Wang @@ -15588,6 +15616,14 @@ L: linux-wireless@vger.kernel.org S: Supported F: drivers/staging/wilc1000/ +STAGING - SEPS525 LCD CONTROLLER DRIVERS +M: Michael Hennerich +M: Beniamin Bia +L: linux-fbdev@vger.kernel.org +S: Supported +F: drivers/staging/fbtft/fb_seps525.c +F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml + STAGING SUBSYSTEM M: Greg Kroah-Hartman T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git @@ -16330,6 +16366,12 @@ S: Maintained F: drivers/media/platform/davinci/ F: include/media/davinci/ +TI ENHANCED QUADRATURE ENCODER PULSE (eQEP) DRIVER +R: David Lechner +L: linux-iio@vger.kernel.org +F: Documentation/devicetree/bindings/counter/ti-eqep.yaml +F: drivers/counter/ti-eqep.c + TI ETHERNET SWITCH DRIVER (CPSW) R: Grygorii Strashko L: linux-omap@vger.kernel.org diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 1434fa60f3db..94e9ce994494 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -51,6 +51,7 @@ choice select MIPS_GIC select COMMON_CLK select CLKSRC_MIPS_GIC + select HAVE_PCI if PCI_MT7621 endchoice choice diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 6b331061d34b..97ab5ad171d4 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -150,6 +150,15 @@ config TEGRA_GMI Driver for the Tegra Generic Memory Interface bus which can be used to attach devices such as NOR, UART, FPGA and more. +config TI_PWMSS + bool + default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) + help + PWM Subsystem driver support for AM33xx SOC. + + PWM submodules require PWM config space access from submodule + drivers and require common parent driver support. + config TI_SYSC bool "TI sysc interconnect target module driver" depends on ARCH_OMAP2PLUS diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile index 16b43d3468c6..1320bcf9fa9d 100644 --- a/drivers/bus/Makefile +++ b/drivers/bus/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o obj-$(CONFIG_TEGRA_GMI) += tegra-gmi.o +obj-$(CONFIG_TI_PWMSS) += ti-pwmss.o obj-$(CONFIG_TI_SYSC) += ti-sysc.o obj-$(CONFIG_TS_NBUS) += ts-nbus.o obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o diff --git a/drivers/pwm/pwm-tipwmss.c b/drivers/bus/ti-pwmss.c similarity index 100% rename from drivers/pwm/pwm-tipwmss.c rename to drivers/bus/ti-pwmss.c diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 00b113f4b958..17e67a84777d 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -562,11 +562,10 @@ static const struct iio_chan_spec quad8_channels[] = { }; static int quad8_signal_read(struct counter_device *counter, - struct counter_signal *signal, struct counter_signal_read_value *val) + struct counter_signal *signal, enum counter_signal_value *val) { const struct quad8_iio *const priv = counter->priv; unsigned int state; - enum counter_signal_level level; /* Only Index signal levels can be read */ if (signal->id < 16) @@ -575,22 +574,19 @@ static int quad8_signal_read(struct counter_device *counter, state = inb(priv->base + QUAD8_REG_INDEX_INPUT_LEVELS) & BIT(signal->id - 16); - level = (state) ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW; - - counter_signal_read_value_set(val, COUNTER_SIGNAL_LEVEL, &level); + *val = (state) ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW; return 0; } static int quad8_count_read(struct counter_device *counter, - struct counter_count *count, struct counter_count_read_value *val) + struct counter_count *count, unsigned long *val) { const struct quad8_iio *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; unsigned int flags; unsigned int borrow; unsigned int carry; - unsigned long position; int i; flags = inb(base_offset + 1); @@ -598,36 +594,27 @@ static int quad8_count_read(struct counter_device *counter, carry = !!(flags & QUAD8_FLAG_CT); /* Borrow XOR Carry effectively doubles count range */ - position = (unsigned long)(borrow ^ carry) << 24; + *val = (unsigned long)(borrow ^ carry) << 24; /* Reset Byte Pointer; transfer Counter to Output Latch */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT, base_offset + 1); for (i = 0; i < 3; i++) - position |= (unsigned long)inb(base_offset) << (8 * i); - - counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &position); + *val |= (unsigned long)inb(base_offset) << (8 * i); return 0; } static int quad8_count_write(struct counter_device *counter, - struct counter_count *count, struct counter_count_write_value *val) + struct counter_count *count, unsigned long val) { const struct quad8_iio *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; - int err; - unsigned long position; int i; - err = counter_count_write_value_get(&position, COUNTER_COUNT_POSITION, - val); - if (err) - return err; - /* Only 24-bit values are supported */ - if (position > 0xFFFFFF) + if (val > 0xFFFFFF) return -EINVAL; /* Reset Byte Pointer */ @@ -635,7 +622,7 @@ static int quad8_count_write(struct counter_device *counter, /* Counter can only be set via Preset Register */ for (i = 0; i < 3; i++) - outb(position >> (8 * i), base_offset); + outb(val >> (8 * i), base_offset); /* Transfer Preset Register to Counter */ outb(QUAD8_CTR_RLD | QUAD8_RLD_PRESET_CNTR, base_offset + 1); @@ -644,9 +631,9 @@ static int quad8_count_write(struct counter_device *counter, outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); /* Set Preset Register back to original value */ - position = priv->preset[count->id]; + val = priv->preset[count->id]; for (i = 0; i < 3; i++) - outb(position >> (8 * i), base_offset); + outb(val >> (8 * i), base_offset); /* Reset Borrow, Carry, Compare, and Sign flags */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_FLAGS, base_offset + 1); diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index 2967d0a9ff91..c80fa76bb531 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -49,6 +49,17 @@ config STM32_LPTIMER_CNT To compile this driver as a module, choose M here: the module will be called stm32-lptimer-cnt. +config TI_EQEP + tristate "TI eQEP counter driver" + depends on (SOC_AM33XX || COMPILE_TEST) + select REGMAP_MMIO + help + Select this option to enable the Texas Instruments Enhanced Quadrature + Encoder Pulse (eQEP) counter driver. + + To compile this driver as a module, choose M here: the module will be + called ti-eqep. + config FTM_QUADDEC tristate "Flex Timer Module Quadrature decoder driver" depends on HAS_IOMEM && OF diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile index 40d35522937d..55142d1f4c43 100644 --- a/drivers/counter/Makefile +++ b/drivers/counter/Makefile @@ -8,4 +8,5 @@ obj-$(CONFIG_COUNTER) += counter.o obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o +obj-$(CONFIG_TI_EQEP) += ti-eqep.o obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o diff --git a/drivers/counter/counter.c b/drivers/counter/counter.c index 106bc7180cd8..6a683d086008 100644 --- a/drivers/counter/counter.c +++ b/drivers/counter/counter.c @@ -220,86 +220,6 @@ ssize_t counter_device_enum_available_read(struct counter_device *counter, } EXPORT_SYMBOL_GPL(counter_device_enum_available_read); -static const char *const counter_signal_level_str[] = { - [COUNTER_SIGNAL_LEVEL_LOW] = "low", - [COUNTER_SIGNAL_LEVEL_HIGH] = "high" -}; - -/** - * counter_signal_read_value_set - set counter_signal_read_value data - * @val: counter_signal_read_value structure to set - * @type: property Signal data represents - * @data: Signal data - * - * This function sets an opaque counter_signal_read_value structure with the - * provided Signal data. - */ -void counter_signal_read_value_set(struct counter_signal_read_value *const val, - const enum counter_signal_value_type type, - void *const data) -{ - if (type == COUNTER_SIGNAL_LEVEL) - val->len = sprintf(val->buf, "%s\n", - counter_signal_level_str[*(enum counter_signal_level *)data]); - else - val->len = 0; -} -EXPORT_SYMBOL_GPL(counter_signal_read_value_set); - -/** - * counter_count_read_value_set - set counter_count_read_value data - * @val: counter_count_read_value structure to set - * @type: property Count data represents - * @data: Count data - * - * This function sets an opaque counter_count_read_value structure with the - * provided Count data. - */ -void counter_count_read_value_set(struct counter_count_read_value *const val, - const enum counter_count_value_type type, - void *const data) -{ - switch (type) { - case COUNTER_COUNT_POSITION: - val->len = sprintf(val->buf, "%lu\n", *(unsigned long *)data); - break; - default: - val->len = 0; - } -} -EXPORT_SYMBOL_GPL(counter_count_read_value_set); - -/** - * counter_count_write_value_get - get counter_count_write_value data - * @data: Count data - * @type: property Count data represents - * @val: counter_count_write_value structure containing data - * - * This function extracts Count data from the provided opaque - * counter_count_write_value structure and stores it at the address provided by - * @data. - * - * RETURNS: - * 0 on success, negative error number on failure. - */ -int counter_count_write_value_get(void *const data, - const enum counter_count_value_type type, - const struct counter_count_write_value *const val) -{ - int err; - - switch (type) { - case COUNTER_COUNT_POSITION: - err = kstrtoul(val->buf, 0, data); - if (err) - return err; - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(counter_count_write_value_get); - struct counter_attr_parm { struct counter_device_attr_group *group; const char *prefix; @@ -369,6 +289,11 @@ struct counter_signal_unit { struct counter_signal *signal; }; +static const char *const counter_signal_value_str[] = { + [COUNTER_SIGNAL_LOW] = "low", + [COUNTER_SIGNAL_HIGH] = "high" +}; + static ssize_t counter_signal_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -377,13 +302,13 @@ static ssize_t counter_signal_show(struct device *dev, const struct counter_signal_unit *const component = devattr->component; struct counter_signal *const signal = component->signal; int err; - struct counter_signal_read_value val = { .buf = buf }; + enum counter_signal_value val; err = counter->ops->signal_read(counter, signal, &val); if (err) return err; - return val.len; + return sprintf(buf, "%s\n", counter_signal_value_str[val]); } struct counter_name_unit { @@ -788,13 +713,13 @@ static ssize_t counter_count_show(struct device *dev, const struct counter_count_unit *const component = devattr->component; struct counter_count *const count = component->count; int err; - struct counter_count_read_value val = { .buf = buf }; + unsigned long val; err = counter->ops->count_read(counter, count, &val); if (err) return err; - return val.len; + return sprintf(buf, "%lu\n", val); } static ssize_t counter_count_store(struct device *dev, @@ -806,9 +731,13 @@ static ssize_t counter_count_store(struct device *dev, const struct counter_count_unit *const component = devattr->component; struct counter_count *const count = component->count; int err; - struct counter_count_write_value val = { .buf = buf }; + unsigned long val; - err = counter->ops->count_write(counter, count, &val); + err = kstrtoul(buf, 0, &val); + if (err) + return err; + + err = counter->ops->count_write(counter, count, val); if (err) return err; diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c index 4046aa9f9234..c2b3fdfd8b77 100644 --- a/drivers/counter/ftm-quaddec.c +++ b/drivers/counter/ftm-quaddec.c @@ -178,31 +178,25 @@ static const enum counter_count_function ftm_quaddec_count_functions[] = { static int ftm_quaddec_count_read(struct counter_device *counter, struct counter_count *count, - struct counter_count_read_value *val) + unsigned long *val) { struct ftm_quaddec *const ftm = counter->priv; uint32_t cntval; ftm_read(ftm, FTM_CNT, &cntval); - counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cntval); + *val = cntval; return 0; } static int ftm_quaddec_count_write(struct counter_device *counter, struct counter_count *count, - struct counter_count_write_value *val) + const unsigned long val) { struct ftm_quaddec *const ftm = counter->priv; - u32 cnt; - int err; - err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val); - if (err) - return err; - - if (cnt != 0) { + if (val != 0) { dev_warn(&ftm->pdev->dev, "Can only accept '0' as new counter value\n"); return -EINVAL; } diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c index bbc930a5962c..8e276eb655f5 100644 --- a/drivers/counter/stm32-lptimer-cnt.c +++ b/drivers/counter/stm32-lptimer-cnt.c @@ -347,7 +347,7 @@ static const struct iio_chan_spec stm32_lptim_cnt_channels = { }; /** - * stm32_lptim_cnt_function - enumerates stm32 LPTimer counter & encoder modes + * enum stm32_lptim_cnt_function - enumerates LPTimer counter & encoder modes * @STM32_LPTIM_COUNTER_INCREASE: up count on IN1 rising, falling or both edges * @STM32_LPTIM_ENCODER_BOTH_EDGE: count on both edges (IN1 & IN2 quadrature) */ @@ -377,8 +377,7 @@ static enum counter_synapse_action stm32_lptim_cnt_synapse_actions[] = { }; static int stm32_lptim_cnt_read(struct counter_device *counter, - struct counter_count *count, - struct counter_count_read_value *val) + struct counter_count *count, unsigned long *val) { struct stm32_lptim_cnt *const priv = counter->priv; u32 cnt; @@ -388,7 +387,7 @@ static int stm32_lptim_cnt_read(struct counter_device *counter, if (ret) return ret; - counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cnt); + *val = cnt; return 0; } diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c index 644ba18a72ad..3eafccec3beb 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -28,7 +28,7 @@ struct stm32_timer_cnt { }; /** - * stm32_count_function - enumerates stm32 timer counter encoder modes + * enum stm32_count_function - enumerates stm32 timer counter encoder modes * @STM32_COUNT_SLAVE_MODE_DISABLED: counts on internal clock when CEN=1 * @STM32_COUNT_ENCODER_MODE_1: counts TI1FP1 edges, depending on TI2FP2 level * @STM32_COUNT_ENCODER_MODE_2: counts TI2FP2 edges, depending on TI1FP1 level @@ -48,34 +48,27 @@ static enum counter_count_function stm32_count_functions[] = { }; static int stm32_count_read(struct counter_device *counter, - struct counter_count *count, - struct counter_count_read_value *val) + struct counter_count *count, unsigned long *val) { struct stm32_timer_cnt *const priv = counter->priv; u32 cnt; regmap_read(priv->regmap, TIM_CNT, &cnt); - counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cnt); + *val = cnt; return 0; } static int stm32_count_write(struct counter_device *counter, struct counter_count *count, - struct counter_count_write_value *val) + const unsigned long val) { struct stm32_timer_cnt *const priv = counter->priv; - u32 cnt; - int err; - err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val); - if (err) - return err; - - if (cnt > priv->ceiling) + if (val > priv->ceiling) return -EINVAL; - return regmap_write(priv->regmap, TIM_CNT, cnt); + return regmap_write(priv->regmap, TIM_CNT, val); } static int stm32_count_function_get(struct counter_device *counter, @@ -219,8 +212,8 @@ static ssize_t stm32_count_enable_write(struct counter_device *counter, if (enable) { regmap_read(priv->regmap, TIM_CR1, &cr1); - if (!(cr1 & TIM_CR1_CEN)) - clk_enable(priv->clk); + if (!(cr1 & TIM_CR1_CEN)) + clk_enable(priv->clk); regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN); diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c new file mode 100644 index 000000000000..1ff07faef27f --- /dev/null +++ b/drivers/counter/ti-eqep.c @@ -0,0 +1,466 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2019 David Lechner + * + * Counter driver for Texas Instruments Enhanced Quadrature Encoder Pulse (eQEP) + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* 32-bit registers */ +#define QPOSCNT 0x0 +#define QPOSINIT 0x4 +#define QPOSMAX 0x8 +#define QPOSCMP 0xc +#define QPOSILAT 0x10 +#define QPOSSLAT 0x14 +#define QPOSLAT 0x18 +#define QUTMR 0x1c +#define QUPRD 0x20 + +/* 16-bit registers */ +#define QWDTMR 0x0 /* 0x24 */ +#define QWDPRD 0x2 /* 0x26 */ +#define QDECCTL 0x4 /* 0x28 */ +#define QEPCTL 0x6 /* 0x2a */ +#define QCAPCTL 0x8 /* 0x2c */ +#define QPOSCTL 0xa /* 0x2e */ +#define QEINT 0xc /* 0x30 */ +#define QFLG 0xe /* 0x32 */ +#define QCLR 0x10 /* 0x34 */ +#define QFRC 0x12 /* 0x36 */ +#define QEPSTS 0x14 /* 0x38 */ +#define QCTMR 0x16 /* 0x3a */ +#define QCPRD 0x18 /* 0x3c */ +#define QCTMRLAT 0x1a /* 0x3e */ +#define QCPRDLAT 0x1c /* 0x40 */ + +#define QDECCTL_QSRC_SHIFT 14 +#define QDECCTL_QSRC GENMASK(15, 14) +#define QDECCTL_SOEN BIT(13) +#define QDECCTL_SPSEL BIT(12) +#define QDECCTL_XCR BIT(11) +#define QDECCTL_SWAP BIT(10) +#define QDECCTL_IGATE BIT(9) +#define QDECCTL_QAP BIT(8) +#define QDECCTL_QBP BIT(7) +#define QDECCTL_QIP BIT(6) +#define QDECCTL_QSP BIT(5) + +#define QEPCTL_FREE_SOFT GENMASK(15, 14) +#define QEPCTL_PCRM GENMASK(13, 12) +#define QEPCTL_SEI GENMASK(11, 10) +#define QEPCTL_IEI GENMASK(9, 8) +#define QEPCTL_SWI BIT(7) +#define QEPCTL_SEL BIT(6) +#define QEPCTL_IEL GENMASK(5, 4) +#define QEPCTL_PHEN BIT(3) +#define QEPCTL_QCLM BIT(2) +#define QEPCTL_UTE BIT(1) +#define QEPCTL_WDE BIT(0) + +/* EQEP Inputs */ +enum { + TI_EQEP_SIGNAL_QEPA, /* QEPA/XCLK */ + TI_EQEP_SIGNAL_QEPB, /* QEPB/XDIR */ +}; + +/* Position Counter Input Modes */ +enum { + TI_EQEP_COUNT_FUNC_QUAD_COUNT, + TI_EQEP_COUNT_FUNC_DIR_COUNT, + TI_EQEP_COUNT_FUNC_UP_COUNT, + TI_EQEP_COUNT_FUNC_DOWN_COUNT, +}; + +enum { + TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES, + TI_EQEP_SYNAPSE_ACTION_RISING_EDGE, + TI_EQEP_SYNAPSE_ACTION_NONE, +}; + +struct ti_eqep_cnt { + struct counter_device counter; + struct regmap *regmap32; + struct regmap *regmap16; +}; + +static int ti_eqep_count_read(struct counter_device *counter, + struct counter_count *count, unsigned long *val) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 cnt; + + regmap_read(priv->regmap32, QPOSCNT, &cnt); + *val = cnt; + + return 0; +} + +static int ti_eqep_count_write(struct counter_device *counter, + struct counter_count *count, unsigned long val) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 max; + + regmap_read(priv->regmap32, QPOSMAX, &max); + if (val > max) + return -EINVAL; + + return regmap_write(priv->regmap32, QPOSCNT, val); +} + +static int ti_eqep_function_get(struct counter_device *counter, + struct counter_count *count, size_t *function) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qdecctl; + + regmap_read(priv->regmap16, QDECCTL, &qdecctl); + *function = (qdecctl & QDECCTL_QSRC) >> QDECCTL_QSRC_SHIFT; + + return 0; +} + +static int ti_eqep_function_set(struct counter_device *counter, + struct counter_count *count, size_t function) +{ + struct ti_eqep_cnt *priv = counter->priv; + + return regmap_write_bits(priv->regmap16, QDECCTL, QDECCTL_QSRC, + function << QDECCTL_QSRC_SHIFT); +} + +static int ti_eqep_action_get(struct counter_device *counter, + struct counter_count *count, + struct counter_synapse *synapse, size_t *action) +{ + struct ti_eqep_cnt *priv = counter->priv; + size_t function; + u32 qdecctl; + int err; + + err = ti_eqep_function_get(counter, count, &function); + if (err) + return err; + + switch (function) { + case TI_EQEP_COUNT_FUNC_QUAD_COUNT: + /* In quadrature mode, the rising and falling edge of both + * QEPA and QEPB trigger QCLK. + */ + *action = TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES; + break; + case TI_EQEP_COUNT_FUNC_DIR_COUNT: + /* In direction-count mode only rising edge of QEPA is counted + * and QEPB gives direction. + */ + switch (synapse->signal->id) { + case TI_EQEP_SIGNAL_QEPA: + *action = TI_EQEP_SYNAPSE_ACTION_RISING_EDGE; + break; + default: + *action = TI_EQEP_SYNAPSE_ACTION_NONE; + break; + } + break; + case TI_EQEP_COUNT_FUNC_UP_COUNT: + case TI_EQEP_COUNT_FUNC_DOWN_COUNT: + /* In up/down-count modes only QEPA is counted and QEPB is not + * used. + */ + switch (synapse->signal->id) { + case TI_EQEP_SIGNAL_QEPA: + err = regmap_read(priv->regmap16, QDECCTL, &qdecctl); + if (err) + return err; + + if (qdecctl & QDECCTL_XCR) + *action = TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES; + else + *action = TI_EQEP_SYNAPSE_ACTION_RISING_EDGE; + break; + default: + *action = TI_EQEP_SYNAPSE_ACTION_NONE; + break; + } + break; + } + + return 0; +} + +static const struct counter_ops ti_eqep_counter_ops = { + .count_read = ti_eqep_count_read, + .count_write = ti_eqep_count_write, + .function_get = ti_eqep_function_get, + .function_set = ti_eqep_function_set, + .action_get = ti_eqep_action_get, +}; + +static ssize_t ti_eqep_position_ceiling_read(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, char *buf) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qposmax; + + regmap_read(priv->regmap32, QPOSMAX, &qposmax); + + return sprintf(buf, "%u\n", qposmax); +} + +static ssize_t ti_eqep_position_ceiling_write(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, const char *buf, + size_t len) +{ + struct ti_eqep_cnt *priv = counter->priv; + int err; + u32 res; + + err = kstrtouint(buf, 0, &res); + if (err < 0) + return err; + + regmap_write(priv->regmap32, QPOSMAX, res); + + return len; +} + +static ssize_t ti_eqep_position_floor_read(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, char *buf) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qposinit; + + regmap_read(priv->regmap32, QPOSINIT, &qposinit); + + return sprintf(buf, "%u\n", qposinit); +} + +static ssize_t ti_eqep_position_floor_write(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, const char *buf, + size_t len) +{ + struct ti_eqep_cnt *priv = counter->priv; + int err; + u32 res; + + err = kstrtouint(buf, 0, &res); + if (err < 0) + return err; + + regmap_write(priv->regmap32, QPOSINIT, res); + + return len; +} + +static ssize_t ti_eqep_position_enable_read(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, char *buf) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qepctl; + + regmap_read(priv->regmap16, QEPCTL, &qepctl); + + return sprintf(buf, "%u\n", !!(qepctl & QEPCTL_PHEN)); +} + +static ssize_t ti_eqep_position_enable_write(struct counter_device *counter, + struct counter_count *count, + void *ext_priv, const char *buf, + size_t len) +{ + struct ti_eqep_cnt *priv = counter->priv; + int err; + bool res; + + err = kstrtobool(buf, &res); + if (err < 0) + return err; + + regmap_write_bits(priv->regmap16, QEPCTL, QEPCTL_PHEN, res ? -1 : 0); + + return len; +} + +static struct counter_count_ext ti_eqep_position_ext[] = { + { + .name = "ceiling", + .read = ti_eqep_position_ceiling_read, + .write = ti_eqep_position_ceiling_write, + }, + { + .name = "floor", + .read = ti_eqep_position_floor_read, + .write = ti_eqep_position_floor_write, + }, + { + .name = "enable", + .read = ti_eqep_position_enable_read, + .write = ti_eqep_position_enable_write, + }, +}; + +static struct counter_signal ti_eqep_signals[] = { + [TI_EQEP_SIGNAL_QEPA] = { + .id = TI_EQEP_SIGNAL_QEPA, + .name = "QEPA" + }, + [TI_EQEP_SIGNAL_QEPB] = { + .id = TI_EQEP_SIGNAL_QEPB, + .name = "QEPB" + }, +}; + +static const enum counter_count_function ti_eqep_position_functions[] = { + [TI_EQEP_COUNT_FUNC_QUAD_COUNT] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, + [TI_EQEP_COUNT_FUNC_DIR_COUNT] = COUNTER_COUNT_FUNCTION_PULSE_DIRECTION, + [TI_EQEP_COUNT_FUNC_UP_COUNT] = COUNTER_COUNT_FUNCTION_INCREASE, + [TI_EQEP_COUNT_FUNC_DOWN_COUNT] = COUNTER_COUNT_FUNCTION_DECREASE, +}; + +static const enum counter_synapse_action ti_eqep_position_synapse_actions[] = { + [TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES] = COUNTER_SYNAPSE_ACTION_BOTH_EDGES, + [TI_EQEP_SYNAPSE_ACTION_RISING_EDGE] = COUNTER_SYNAPSE_ACTION_RISING_EDGE, + [TI_EQEP_SYNAPSE_ACTION_NONE] = COUNTER_SYNAPSE_ACTION_NONE, +}; + +static struct counter_synapse ti_eqep_position_synapses[] = { + { + .actions_list = ti_eqep_position_synapse_actions, + .num_actions = ARRAY_SIZE(ti_eqep_position_synapse_actions), + .signal = &ti_eqep_signals[TI_EQEP_SIGNAL_QEPA], + }, + { + .actions_list = ti_eqep_position_synapse_actions, + .num_actions = ARRAY_SIZE(ti_eqep_position_synapse_actions), + .signal = &ti_eqep_signals[TI_EQEP_SIGNAL_QEPB], + }, +}; + +static struct counter_count ti_eqep_counts[] = { + { + .id = 0, + .name = "QPOSCNT", + .functions_list = ti_eqep_position_functions, + .num_functions = ARRAY_SIZE(ti_eqep_position_functions), + .synapses = ti_eqep_position_synapses, + .num_synapses = ARRAY_SIZE(ti_eqep_position_synapses), + .ext = ti_eqep_position_ext, + .num_ext = ARRAY_SIZE(ti_eqep_position_ext), + }, +}; + +static const struct regmap_config ti_eqep_regmap32_config = { + .name = "32-bit", + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x24, +}; + +static const struct regmap_config ti_eqep_regmap16_config = { + .name = "16-bit", + .reg_bits = 16, + .val_bits = 16, + .reg_stride = 2, + .max_register = 0x1e, +}; + +static int ti_eqep_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct ti_eqep_cnt *priv; + void __iomem *base; + int err; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + priv->regmap32 = devm_regmap_init_mmio(dev, base, + &ti_eqep_regmap32_config); + if (IS_ERR(priv->regmap32)) + return PTR_ERR(priv->regmap32); + + priv->regmap16 = devm_regmap_init_mmio(dev, base + 0x24, + &ti_eqep_regmap16_config); + if (IS_ERR(priv->regmap16)) + return PTR_ERR(priv->regmap16); + + priv->counter.name = dev_name(dev); + priv->counter.parent = dev; + priv->counter.ops = &ti_eqep_counter_ops; + priv->counter.counts = ti_eqep_counts; + priv->counter.num_counts = ARRAY_SIZE(ti_eqep_counts); + priv->counter.signals = ti_eqep_signals; + priv->counter.num_signals = ARRAY_SIZE(ti_eqep_signals); + priv->counter.priv = priv; + + platform_set_drvdata(pdev, priv); + + /* + * Need to make sure power is turned on. On AM33xx, this comes from the + * parent PWMSS bus driver. On AM17xx, this comes from the PSC power + * domain. + */ + pm_runtime_enable(dev); + pm_runtime_get_sync(dev); + + err = counter_register(&priv->counter); + if (err < 0) { + pm_runtime_put_sync(dev); + pm_runtime_disable(dev); + return err; + } + + return 0; +} + +static int ti_eqep_remove(struct platform_device *pdev) +{ + struct ti_eqep_cnt *priv = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + + counter_unregister(&priv->counter); + pm_runtime_put_sync(dev), + pm_runtime_disable(dev); + + return 0; +} + +static const struct of_device_id ti_eqep_of_match[] = { + { .compatible = "ti,am3352-eqep", }, + { }, +}; +MODULE_DEVICE_TABLE(of, ti_eqep_of_match); + +static struct platform_driver ti_eqep_driver = { + .probe = ti_eqep_probe, + .remove = ti_eqep_remove, + .driver = { + .name = "ti-eqep-cnt", + .of_match_table = ti_eqep_of_match, + }, +}; +module_platform_driver(ti_eqep_driver); + +MODULE_AUTHOR("David Lechner "); +MODULE_DESCRIPTION("TI eQEP counter driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c index 2e37f8a6d8cf..7b837641f166 100644 --- a/drivers/iio/accel/st_accel_core.c +++ b/drivers/iio/accel/st_accel_core.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 0b21dd405dd5..5d8540b7b427 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -55,6 +55,16 @@ config AD7291 To compile this driver as a module, choose M here: the module will be called ad7291. +config AD7292 + tristate "Analog Devices AD7292 ADC driver" + depends on SPI + help + Say yes here to build support for Analog Devices AD7292 + 8 Channel ADC with temperature sensor. + + To compile this driver as a module, choose M here: the + module will be called ad7292. + config AD7298 tristate "Analog Devices AD7298 ADC driver" depends on SPI @@ -442,6 +452,17 @@ config INGENIC_ADC This driver can also be built as a module. If so, the module will be called ingenic_adc. +config INTEL_MRFLD_ADC + tristate "Intel Merrifield Basin Cove ADC driver" + depends on INTEL_SOC_PMIC_MRFLD + help + Say yes here to have support for Basin Cove power management IC (PMIC) ADC + device. Depending on platform configuration, this general purpose ADC can + be used for sampling sensors such as thermal resistors. + + To compile this driver as a module, choose M here: the module will be + called intel_mrfld_adc. + config IMX7D_ADC tristate "Freescale IMX7D ADC driver" depends on ARCH_MXC || COMPILE_TEST @@ -518,8 +539,8 @@ config MAX1027 select IIO_BUFFER select IIO_TRIGGERED_BUFFER help - Say yes here to build support for Maxim SPI ADC models - max1027, max1029 and max1031. + Say yes here to build support for Maxim SPI {10,12}-bit ADC models: + max1027, max1029, max1031, max1227, max1229 and max1231. To compile this driver as a module, choose M here: the module will be called max1027. diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index fc1b6ebb0cde..a1f1fbec0f87 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o obj-$(CONFIG_AD7124) += ad7124.o obj-$(CONFIG_AD7266) += ad7266.o obj-$(CONFIG_AD7291) += ad7291.o +obj-$(CONFIG_AD7292) += ad7292.o obj-$(CONFIG_AD7298) += ad7298.o obj-$(CONFIG_AD7923) += ad7923.o obj-$(CONFIG_AD7476) += ad7476.o @@ -43,6 +44,7 @@ obj-$(CONFIG_HX711) += hx711.o obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o obj-$(CONFIG_INGENIC_ADC) += ingenic-adc.o +obj-$(CONFIG_INTEL_MRFLD_ADC) += intel_mrfld_adc.o obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o obj-$(CONFIG_LPC18XX_ADC) += lpc18xx_adc.o obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o diff --git a/drivers/iio/adc/ad7292.c b/drivers/iio/adc/ad7292.c new file mode 100644 index 000000000000..a6798f7dfdb8 --- /dev/null +++ b/drivers/iio/adc/ad7292.c @@ -0,0 +1,350 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices AD7292 SPI ADC driver + * + * Copyright 2019 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include + +#include + +#define ADI_VENDOR_ID 0x0018 + +/* AD7292 registers definition */ +#define AD7292_REG_VENDOR_ID 0x00 +#define AD7292_REG_CONF_BANK 0x05 +#define AD7292_REG_CONV_COMM 0x0E +#define AD7292_REG_ADC_CH(x) (0x10 + (x)) + +/* AD7292 configuration bank subregisters definition */ +#define AD7292_BANK_REG_VIN_RNG0 0x10 +#define AD7292_BANK_REG_VIN_RNG1 0x11 +#define AD7292_BANK_REG_SAMP_MODE 0x12 + +#define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F)) + +/* AD7292_REG_ADC_CONVERSION */ +#define AD7292_ADC_DATA_MASK GENMASK(15, 6) +#define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x) + +/* AD7292_CHANNEL_SAMPLING_MODE */ +#define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch)) + +/* AD7292_CHANNEL_VIN_RANGE */ +#define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch)) + +#define AD7292_VOLTAGE_CHAN(_chan) \ +{ \ + .type = IIO_VOLTAGE, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE), \ + .indexed = 1, \ + .channel = _chan, \ +} + +static const struct iio_chan_spec ad7292_channels[] = { + AD7292_VOLTAGE_CHAN(0), + AD7292_VOLTAGE_CHAN(1), + AD7292_VOLTAGE_CHAN(2), + AD7292_VOLTAGE_CHAN(3), + AD7292_VOLTAGE_CHAN(4), + AD7292_VOLTAGE_CHAN(5), + AD7292_VOLTAGE_CHAN(6), + AD7292_VOLTAGE_CHAN(7) +}; + +static const struct iio_chan_spec ad7292_channels_diff[] = { + { + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), + .indexed = 1, + .differential = 1, + .channel = 0, + .channel2 = 1, + }, + AD7292_VOLTAGE_CHAN(2), + AD7292_VOLTAGE_CHAN(3), + AD7292_VOLTAGE_CHAN(4), + AD7292_VOLTAGE_CHAN(5), + AD7292_VOLTAGE_CHAN(6), + AD7292_VOLTAGE_CHAN(7) +}; + +struct ad7292_state { + struct spi_device *spi; + struct regulator *reg; + unsigned short vref_mv; + + __be16 d16 ____cacheline_aligned; + u8 d8[2]; +}; + +static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr) +{ + int ret; + + st->d8[0] = AD7292_RD_FLAG_MSK(addr); + + ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2); + if (ret < 0) + return ret; + + return be16_to_cpu(st->d16); +} + +static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr, + unsigned int sub_addr, unsigned int len) +{ + unsigned int shift = 16 - (8 * len); + int ret; + + st->d8[0] = AD7292_RD_FLAG_MSK(addr); + st->d8[1] = sub_addr; + + ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len); + if (ret < 0) + return ret; + + return (be16_to_cpu(st->d16) >> shift); +} + +static int ad7292_single_conversion(struct ad7292_state *st, + unsigned int chan_addr) +{ + int ret; + + struct spi_transfer t[] = { + { + .tx_buf = &st->d8, + .len = 4, + .delay_usecs = 6, + }, { + .rx_buf = &st->d16, + .len = 2, + }, + }; + + st->d8[0] = chan_addr; + st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM); + + ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); + + if (ret < 0) + return ret; + + return be16_to_cpu(st->d16); +} + +static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel) +{ + int samp_mode, range0, range1, factor = 1; + + /* + * Every AD7292 ADC channel may have its input range adjusted according + * to the settings at the ADC sampling mode and VIN range subregisters. + * For a given channel, the minimum input range is equal to Vref, and it + * may be increased by a multiplier factor of 2 or 4 according to the + * following rule: + * If channel is being sampled with respect to AGND: + * factor = 4 if VIN range0 and VIN range1 equal 0 + * factor = 2 if only one of VIN ranges equal 1 + * factor = 1 if both VIN range0 and VIN range1 equal 1 + * If channel is being sampled with respect to AVDD: + * factor = 4 if VIN range0 and VIN range1 equal 0 + * Behavior is undefined if any of VIN range doesn't equal 0 + */ + + samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, + AD7292_BANK_REG_SAMP_MODE, 2); + + if (samp_mode < 0) + return samp_mode; + + range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, + AD7292_BANK_REG_VIN_RNG0, 2); + + if (range0 < 0) + return range0; + + range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, + AD7292_BANK_REG_VIN_RNG1, 2); + + if (range1 < 0) + return range1; + + if (AD7292_CH_SAMP_MODE(samp_mode, channel)) { + /* Sampling with respect to AGND */ + if (!AD7292_CH_VIN_RANGE(range0, channel)) + factor *= 2; + + if (!AD7292_CH_VIN_RANGE(range1, channel)) + factor *= 2; + + } else { + /* Sampling with respect to AVDD */ + if (AD7292_CH_VIN_RANGE(range0, channel) || + AD7292_CH_VIN_RANGE(range1, channel)) + return -EPERM; + + factor = 4; + } + + return factor; +} + +static int ad7292_read_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int *val, int *val2, long info) +{ + struct ad7292_state *st = iio_priv(indio_dev); + unsigned int ch_addr; + int ret; + + switch (info) { + case IIO_CHAN_INFO_RAW: + ch_addr = AD7292_REG_ADC_CH(chan->channel); + ret = ad7292_single_conversion(st, ch_addr); + if (ret < 0) + return ret; + + *val = AD7292_ADC_DATA(ret); + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + /* + * To convert a raw value to standard units, the IIO defines + * this formula: Scaled value = (raw + offset) * scale. + * For the scale to be a correct multiplier for (raw + offset), + * it must be calculated as the input range divided by the + * number of possible distinct input values. Given the ADC data + * is 10 bit long, it may assume 2^10 distinct values. + * Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2 + * return type indicates to the IIO API to divide *val by 2 to + * the power of *val2 when returning from read_raw. + */ + + ret = ad7292_vin_range_multiplier(st, chan->channel); + if (ret < 0) + return ret; + + *val = st->vref_mv * ret; + *val2 = 10; + return IIO_VAL_FRACTIONAL_LOG2; + default: + break; + } + return -EINVAL; +} + +static const struct iio_info ad7292_info = { + .read_raw = ad7292_read_raw, +}; + +static void ad7292_regulator_disable(void *data) +{ + struct ad7292_state *st = data; + + regulator_disable(st->reg); +} + +static int ad7292_probe(struct spi_device *spi) +{ + struct ad7292_state *st; + struct iio_dev *indio_dev; + struct device_node *child; + bool diff_channels = 0; + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + st->spi = spi; + + ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID); + if (ret != ADI_VENDOR_ID) { + dev_err(&spi->dev, "Wrong vendor id 0x%x\n", ret); + return -EINVAL; + } + + spi_set_drvdata(spi, indio_dev); + + st->reg = devm_regulator_get_optional(&spi->dev, "vref"); + if (!IS_ERR(st->reg)) { + ret = regulator_enable(st->reg); + if (ret) { + dev_err(&spi->dev, + "Failed to enable external vref supply\n"); + return ret; + } + + ret = devm_add_action_or_reset(&spi->dev, + ad7292_regulator_disable, st); + if (ret) { + regulator_disable(st->reg); + return ret; + } + + ret = regulator_get_voltage(st->reg); + if (ret < 0) + return ret; + + st->vref_mv = ret / 1000; + } else { + /* Use the internal voltage reference. */ + st->vref_mv = 1250; + } + + indio_dev->dev.parent = &spi->dev; + indio_dev->name = spi_get_device_id(spi)->name; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &ad7292_info; + + for_each_available_child_of_node(spi->dev.of_node, child) { + diff_channels = of_property_read_bool(child, "diff-channels"); + if (diff_channels) + break; + } + + if (diff_channels) { + indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff); + indio_dev->channels = ad7292_channels_diff; + } else { + indio_dev->num_channels = ARRAY_SIZE(ad7292_channels); + indio_dev->channels = ad7292_channels; + } + + return devm_iio_device_register(&spi->dev, indio_dev); +} + +static const struct spi_device_id ad7292_id_table[] = { + { "ad7292", 0 }, + {} +}; +MODULE_DEVICE_TABLE(spi, ad7292_id_table); + +static const struct of_device_id ad7292_of_match[] = { + { .compatible = "adi,ad7292" }, + { }, +}; +MODULE_DEVICE_TABLE(of, ad7292_of_match); + +static struct spi_driver ad7292_driver = { + .driver = { + .name = "ad7292", + .of_match_table = ad7292_of_match, + }, + .probe = ad7292_probe, + .id_table = ad7292_id_table, +}; +module_spi_driver(ad7292_driver); + +MODULE_AUTHOR("Marcelo Schmitt "); +MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index ac0ffff6c5ae..5c2b3446fa4a 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -54,38 +54,20 @@ struct ad7949_adc_chip { u8 resolution; u16 cfg; unsigned int current_channel; - u32 buffer ____cacheline_aligned; + u16 buffer ____cacheline_aligned; }; -static bool ad7949_spi_cfg_is_read_back(struct ad7949_adc_chip *ad7949_adc) -{ - if (!(ad7949_adc->cfg & AD7949_CFG_READ_BACK)) - return true; - - return false; -} - -static int ad7949_spi_bits_per_word(struct ad7949_adc_chip *ad7949_adc) -{ - int ret = ad7949_adc->resolution; - - if (ad7949_spi_cfg_is_read_back(ad7949_adc)) - ret += AD7949_CFG_REG_SIZE_BITS; - - return ret; -} - static int ad7949_spi_write_cfg(struct ad7949_adc_chip *ad7949_adc, u16 val, u16 mask) { int ret; - int bits_per_word = ad7949_spi_bits_per_word(ad7949_adc); + int bits_per_word = ad7949_adc->resolution; int shift = bits_per_word - AD7949_CFG_REG_SIZE_BITS; struct spi_message msg; struct spi_transfer tx[] = { { .tx_buf = &ad7949_adc->buffer, - .len = 4, + .len = 2, .bits_per_word = bits_per_word, }, }; @@ -107,13 +89,13 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, unsigned int channel) { int ret; - int bits_per_word = ad7949_spi_bits_per_word(ad7949_adc); + int bits_per_word = ad7949_adc->resolution; int mask = GENMASK(ad7949_adc->resolution, 0); struct spi_message msg; struct spi_transfer tx[] = { { .rx_buf = &ad7949_adc->buffer, - .len = 4, + .len = 2, .bits_per_word = bits_per_word, }, }; @@ -138,10 +120,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, ad7949_adc->current_channel = channel; - if (ad7949_spi_cfg_is_read_back(ad7949_adc)) - *val = (ad7949_adc->buffer >> AD7949_CFG_REG_SIZE_BITS) & mask; - else - *val = ad7949_adc->buffer & mask; + *val = ad7949_adc->buffer & mask; return 0; } diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 2640b75fb774..8ba90486c787 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -205,7 +205,7 @@ int ad_sd_reset(struct ad_sigma_delta *sigma_delta, } EXPORT_SYMBOL_GPL(ad_sd_reset); -static int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, +int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { int ret; @@ -242,6 +242,7 @@ out: return ret; } +EXPORT_SYMBOL_GPL(ad_sd_calibrate); /** * ad_sd_calibrate_all() - Performs channel calibration diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index d3fc39df535d..1e5375235cfe 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -173,7 +173,6 @@ static int aspeed_adc_probe(struct platform_device *pdev) struct iio_dev *indio_dev; struct aspeed_adc_data *data; const struct aspeed_adc_model_data *model_data; - struct resource *res; const char *clk_parent_name; int ret; u32 adc_engine_control_reg_val; @@ -185,8 +184,7 @@ static int aspeed_adc_probe(struct platform_device *pdev) data = iio_priv(indio_dev); data->dev = &pdev->dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - data->base = devm_ioremap_resource(&pdev->dev, res); + data->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(data->base)) return PTR_ERR(data->base); diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index a2837a0e7cba..e1850f3d5cf3 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -1483,7 +1483,7 @@ dma_free_area: st->dma_st.rx_buf, st->dma_st.rx_dma_buf); dma_chan_disable: dma_release_channel(st->dma_st.dma_chan); - st->dma_st.dma_chan = 0; + st->dma_st.dma_chan = NULL; dma_exit: dev_info(&pdev->dev, "continuing without DMA support\n"); } @@ -1506,7 +1506,7 @@ static void at91_adc_dma_disable(struct platform_device *pdev) dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, st->dma_st.rx_buf, st->dma_st.rx_dma_buf); dma_release_channel(st->dma_st.dma_chan); - st->dma_st.dma_chan = 0; + st->dma_st.dma_chan = NULL; dev_info(&pdev->dev, "continuing without DMA support\n"); } diff --git a/drivers/iio/adc/bcm_iproc_adc.c b/drivers/iio/adc/bcm_iproc_adc.c index 646ebdc0a8b4..5e396104ac86 100644 --- a/drivers/iio/adc/bcm_iproc_adc.c +++ b/drivers/iio/adc/bcm_iproc_adc.c @@ -308,7 +308,7 @@ static int iproc_adc_do_read(struct iio_dev *indio_dev, "IntMask set failed. Read will likely fail."); read_len = -EIO; goto adc_err; - }; + } } regmap_read(adc_priv->regmap, IPROC_INTERRUPT_MASK, &val_check); diff --git a/drivers/iio/adc/cc10001_adc.c b/drivers/iio/adc/cc10001_adc.c index f93f1d93b80d..fe9257624f16 100644 --- a/drivers/iio/adc/cc10001_adc.c +++ b/drivers/iio/adc/cc10001_adc.c @@ -310,7 +310,6 @@ static int cc10001_adc_probe(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; struct cc10001_adc_device *adc_dev; unsigned long adc_clk_rate; - struct resource *res; struct iio_dev *indio_dev; unsigned long channel_map; int ret; @@ -340,8 +339,7 @@ static int cc10001_adc_probe(struct platform_device *pdev) indio_dev->info = &cc10001_adc_info; indio_dev->modes = INDIO_DIRECT_MODE; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res); + adc_dev->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(adc_dev->reg_base)) { ret = PTR_ERR(adc_dev->reg_base); goto err_disable_reg; diff --git a/drivers/iio/adc/cpcap-adc.c b/drivers/iio/adc/cpcap-adc.c index 2d616cafe75f..5086a337f4c9 100644 --- a/drivers/iio/adc/cpcap-adc.c +++ b/drivers/iio/adc/cpcap-adc.c @@ -1008,7 +1008,7 @@ static int cpcap_adc_probe(struct platform_device *pdev) error = devm_request_threaded_irq(&pdev->dev, ddata->irq, NULL, cpcap_adc_irq_thread, - IRQF_TRIGGER_NONE, + IRQF_TRIGGER_NONE | IRQF_ONESHOT, "cpcap-adc", indio_dev); if (error) { dev_err(&pdev->dev, "could not get irq: %i\n", diff --git a/drivers/iio/adc/dln2-adc.c b/drivers/iio/adc/dln2-adc.c index 5fa78c273a25..65c7c9329b1c 100644 --- a/drivers/iio/adc/dln2-adc.c +++ b/drivers/iio/adc/dln2-adc.c @@ -524,6 +524,10 @@ static int dln2_adc_triggered_buffer_postenable(struct iio_dev *indio_dev) u16 conflict; unsigned int trigger_chan; + ret = iio_triggered_buffer_postenable(indio_dev); + if (ret) + return ret; + mutex_lock(&dln2->mutex); /* Enable ADC */ @@ -537,6 +541,7 @@ static int dln2_adc_triggered_buffer_postenable(struct iio_dev *indio_dev) (int)conflict); ret = -EBUSY; } + iio_triggered_buffer_predisable(indio_dev); return ret; } @@ -550,6 +555,7 @@ static int dln2_adc_triggered_buffer_postenable(struct iio_dev *indio_dev) mutex_unlock(&dln2->mutex); if (ret < 0) { dev_dbg(&dln2->pdev->dev, "Problem in %s\n", __func__); + iio_triggered_buffer_predisable(indio_dev); return ret; } } else { @@ -557,12 +563,12 @@ static int dln2_adc_triggered_buffer_postenable(struct iio_dev *indio_dev) mutex_unlock(&dln2->mutex); } - return iio_triggered_buffer_postenable(indio_dev); + return 0; } static int dln2_adc_triggered_buffer_predisable(struct iio_dev *indio_dev) { - int ret; + int ret, ret2; struct dln2_adc *dln2 = iio_priv(indio_dev); mutex_lock(&dln2->mutex); @@ -577,12 +583,14 @@ static int dln2_adc_triggered_buffer_predisable(struct iio_dev *indio_dev) ret = dln2_adc_set_port_enabled(dln2, false, NULL); mutex_unlock(&dln2->mutex); - if (ret < 0) { + if (ret < 0) dev_dbg(&dln2->pdev->dev, "Problem in %s\n", __func__); - return ret; - } - return iio_triggered_buffer_predisable(indio_dev); + ret2 = iio_triggered_buffer_predisable(indio_dev); + if (ret == 0) + ret = ret2; + + return ret; } static const struct iio_buffer_setup_ops dln2_adc_buffer_setup_ops = { diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c index 42a3ced11fbd..2df7d057b249 100644 --- a/drivers/iio/adc/exynos_adc.c +++ b/drivers/iio/adc/exynos_adc.c @@ -651,7 +651,7 @@ static irqreturn_t exynos_ts_isr(int irq, void *dev_id) input_sync(info->input); usleep_range(1000, 1100); - }; + } writel(0, ADC_V1_CLRINTPNDNUP(info->regs)); @@ -769,7 +769,6 @@ static int exynos_adc_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct s3c2410_ts_mach_info *pdata = dev_get_platdata(&pdev->dev); struct iio_dev *indio_dev = NULL; - struct resource *mem; bool has_ts = false; int ret = -ENODEV; int irq; @@ -788,8 +787,7 @@ static int exynos_adc_probe(struct platform_device *pdev) return -EINVAL; } - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - info->regs = devm_ioremap_resource(&pdev->dev, mem); + info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) return PTR_ERR(info->regs); diff --git a/drivers/iio/adc/hx711.c b/drivers/iio/adc/hx711.c index 62e6c8badd22..c8686558429b 100644 --- a/drivers/iio/adc/hx711.c +++ b/drivers/iio/adc/hx711.c @@ -23,6 +23,7 @@ /* gain to pulse and scale conversion */ #define HX711_GAIN_MAX 3 +#define HX711_RESET_GAIN 128 struct hx711_gain_to_scale { int gain; @@ -185,8 +186,7 @@ static int hx711_wait_for_ready(struct hx711_data *hx711_data) static int hx711_reset(struct hx711_data *hx711_data) { - int ret; - int val = gpiod_get_value(hx711_data->gpiod_dout); + int val = hx711_wait_for_ready(hx711_data); if (val) { /* @@ -202,22 +202,10 @@ static int hx711_reset(struct hx711_data *hx711_data) msleep(10); gpiod_set_value(hx711_data->gpiod_pd_sck, 0); - ret = hx711_wait_for_ready(hx711_data); - if (ret) - return ret; - /* - * after a reset the gain is 128 so we do a dummy read - * to set the gain for the next read - */ - ret = hx711_read(hx711_data); - if (ret < 0) - return ret; - - /* - * after a dummy read we need to wait vor readiness - * for not mixing gain pulses with the clock - */ val = hx711_wait_for_ready(hx711_data); + + /* after a reset the gain is 128 */ + hx711_data->gain_set = HX711_RESET_GAIN; } return val; diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index e234970b7150..39c0a609fc94 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -25,9 +25,13 @@ #define JZ_ADC_REG_ADSDAT 0x20 #define JZ_ADC_REG_ADCLK 0x28 +#define JZ_ADC_REG_ENABLE_PD BIT(7) +#define JZ_ADC_REG_CFG_AUX_MD (BIT(0) | BIT(1)) #define JZ_ADC_REG_CFG_BAT_MD BIT(4) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 -#define JZ_ADC_REG_ADCLK_CLKDIV10US_LSB 16 +#define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 +#define JZ4770_ADC_REG_ADCLK_CLKDIV10US_LSB 8 +#define JZ4770_ADC_REG_ADCLK_CLKDIVMS_LSB 16 #define JZ_ADC_AUX_VREF 3300 #define JZ_ADC_AUX_VREF_BITS 12 @@ -37,6 +41,8 @@ #define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10 #define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986) #define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12 +#define JZ4770_ADC_BATTERY_VREF 6600 +#define JZ4770_ADC_BATTERY_VREF_BITS 12 struct ingenic_adc; @@ -47,6 +53,8 @@ struct ingenic_adc_soc_data { size_t battery_raw_avail_size; const int *battery_scale_avail; size_t battery_scale_avail_size; + unsigned int battery_vref_mode: 1; + unsigned int has_aux2: 1; int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); }; @@ -54,6 +62,7 @@ struct ingenic_adc { void __iomem *base; struct clk *clk; struct mutex lock; + struct mutex aux_lock; const struct ingenic_adc_soc_data *soc_data; bool low_vref_mode; }; @@ -120,6 +129,8 @@ static int ingenic_adc_write_raw(struct iio_dev *iio_dev, case IIO_CHAN_INFO_SCALE: switch (chan->channel) { case INGENIC_ADC_BATTERY: + if (!adc->soc_data->battery_vref_mode) + return -EINVAL; if (val > JZ_ADC_BATTERY_LOW_VREF) { ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_BAT_MD, @@ -158,6 +169,14 @@ static const int jz4740_adc_battery_scale_avail[] = { JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS, }; +static const int jz4770_adc_battery_raw_avail[] = { + 0, 1, (1 << JZ4770_ADC_BATTERY_VREF_BITS) - 1, +}; + +static const int jz4770_adc_battery_scale_avail[] = { + JZ4770_ADC_BATTERY_VREF, JZ4770_ADC_BATTERY_VREF_BITS, +}; + static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc) { struct clk *parent_clk; @@ -187,7 +206,45 @@ static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc) /* We also need a divider that produces a 10us clock. */ div_10us = DIV_ROUND_UP(rate, 100000); - writel(((div_10us - 1) << JZ_ADC_REG_ADCLK_CLKDIV10US_LSB) | + writel(((div_10us - 1) << JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB) | + (div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB, + adc->base + JZ_ADC_REG_ADCLK); + + return 0; +} + +static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc) +{ + struct clk *parent_clk; + unsigned long parent_rate, rate; + unsigned int div_main, div_ms, div_10us; + + parent_clk = clk_get_parent(adc->clk); + if (!parent_clk) { + dev_err(dev, "ADC clock has no parent\n"); + return -ENODEV; + } + parent_rate = clk_get_rate(parent_clk); + + /* + * The JZ4770 ADC works at 20 kHz to 200 kHz. + * We pick the highest rate possible. + */ + div_main = DIV_ROUND_UP(parent_rate, 200000); + div_main = clamp(div_main, 1u, 256u); + rate = parent_rate / div_main; + if (rate < 20000 || rate > 200000) { + dev_err(dev, "No valid divider for ADC main clock\n"); + return -EINVAL; + } + + /* We also need a divider that produces a 10us clock. */ + div_10us = DIV_ROUND_UP(rate, 10000); + /* And another, which produces a 1ms clock. */ + div_ms = DIV_ROUND_UP(rate, 1000); + + writel(((div_ms - 1) << JZ4770_ADC_REG_ADCLK_CLKDIVMS_LSB) | + ((div_10us - 1) << JZ4770_ADC_REG_ADCLK_CLKDIV10US_LSB) | (div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB, adc->base + JZ_ADC_REG_ADCLK); @@ -201,6 +258,8 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { .battery_raw_avail_size = ARRAY_SIZE(jz4725b_adc_battery_raw_avail), .battery_scale_avail = jz4725b_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail), + .battery_vref_mode = true, + .has_aux2 = false, .init_clk_div = jz4725b_adc_init_clk_div, }; @@ -211,9 +270,23 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .battery_raw_avail_size = ARRAY_SIZE(jz4740_adc_battery_raw_avail), .battery_scale_avail = jz4740_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail), + .battery_vref_mode = true, + .has_aux2 = false, .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ }; +static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { + .battery_high_vref = JZ4770_ADC_BATTERY_VREF, + .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, + .battery_raw_avail = jz4770_adc_battery_raw_avail, + .battery_raw_avail_size = ARRAY_SIZE(jz4770_adc_battery_raw_avail), + .battery_scale_avail = jz4770_adc_battery_scale_avail, + .battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail), + .battery_vref_mode = false, + .has_aux2 = true, + .init_clk_div = jz4770_adc_init_clk_div, +}; + static int ingenic_adc_read_avail(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, const int **vals, @@ -239,6 +312,42 @@ static int ingenic_adc_read_avail(struct iio_dev *iio_dev, }; } +static int ingenic_adc_read_chan_info_raw(struct ingenic_adc *adc, + struct iio_chan_spec const *chan, + int *val) +{ + int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); + + /* We cannot sample AUX/AUX2 in parallel. */ + mutex_lock(&adc->aux_lock); + if (adc->soc_data->has_aux2 && engine == 0) { + bit = BIT(chan->channel == INGENIC_ADC_AUX2); + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); + } + + clk_enable(adc->clk); + ret = ingenic_adc_capture(adc, engine); + if (ret) + goto out; + + switch (chan->channel) { + case INGENIC_ADC_AUX: + case INGENIC_ADC_AUX2: + *val = readw(adc->base + JZ_ADC_REG_ADSDAT); + break; + case INGENIC_ADC_BATTERY: + *val = readw(adc->base + JZ_ADC_REG_ADBDAT); + break; + } + + ret = IIO_VAL_INT; +out: + clk_disable(adc->clk); + mutex_unlock(&adc->aux_lock); + + return ret; +} + static int ingenic_adc_read_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, int *val, @@ -246,32 +355,14 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev, long m) { struct ingenic_adc *adc = iio_priv(iio_dev); - int ret; switch (m) { case IIO_CHAN_INFO_RAW: - clk_enable(adc->clk); - ret = ingenic_adc_capture(adc, chan->channel); - if (ret) { - clk_disable(adc->clk); - return ret; - } - - switch (chan->channel) { - case INGENIC_ADC_AUX: - *val = readw(adc->base + JZ_ADC_REG_ADSDAT); - break; - case INGENIC_ADC_BATTERY: - *val = readw(adc->base + JZ_ADC_REG_ADBDAT); - break; - } - - clk_disable(adc->clk); - - return IIO_VAL_INT; + return ingenic_adc_read_chan_info_raw(adc, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->channel) { case INGENIC_ADC_AUX: + case INGENIC_ADC_AUX2: *val = JZ_ADC_AUX_VREF; *val2 = JZ_ADC_AUX_VREF_BITS; break; @@ -322,6 +413,14 @@ static const struct iio_chan_spec ingenic_channels[] = { .indexed = 1, .channel = INGENIC_ADC_BATTERY, }, + { /* Must always be last in the array. */ + .extend_name = "aux2", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX2, + }, }; static int ingenic_adc_probe(struct platform_device *pdev) @@ -329,7 +428,6 @@ static int ingenic_adc_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct iio_dev *iio_dev; struct ingenic_adc *adc; - struct resource *mem_base; const struct ingenic_adc_soc_data *soc_data; int ret; @@ -343,10 +441,10 @@ static int ingenic_adc_probe(struct platform_device *pdev) adc = iio_priv(iio_dev); mutex_init(&adc->lock); + mutex_init(&adc->aux_lock); adc->soc_data = soc_data; - mem_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc->base = devm_ioremap_resource(dev, mem_base); + adc->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(adc->base)) return PTR_ERR(adc->base); @@ -374,6 +472,7 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); ret = devm_add_action_or_reset(dev, ingenic_adc_clk_cleanup, adc->clk); @@ -387,6 +486,9 @@ static int ingenic_adc_probe(struct platform_device *pdev) iio_dev->modes = INDIO_DIRECT_MODE; iio_dev->channels = ingenic_channels; iio_dev->num_channels = ARRAY_SIZE(ingenic_channels); + /* Remove AUX2 from the list of supported channels. */ + if (!adc->soc_data->has_aux2) + iio_dev->num_channels -= 1; iio_dev->info = &ingenic_adc_info; ret = devm_iio_device_register(dev, iio_dev); @@ -400,6 +502,7 @@ static int ingenic_adc_probe(struct platform_device *pdev) static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, + { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; MODULE_DEVICE_TABLE(of, ingenic_adc_of_match); diff --git a/drivers/iio/adc/intel_mrfld_adc.c b/drivers/iio/adc/intel_mrfld_adc.c new file mode 100644 index 000000000000..67d096f8180d --- /dev/null +++ b/drivers/iio/adc/intel_mrfld_adc.c @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ADC driver for Basin Cove PMIC + * + * Copyright (C) 2012 Intel Corporation + * Author: Bin Yang + * + * Rewritten for upstream by: + * Vincent Pelletier + * Andy Shevchenko + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#define BCOVE_GPADCREQ 0xDC +#define BCOVE_GPADCREQ_BUSY BIT(0) +#define BCOVE_GPADCREQ_IRQEN BIT(1) + +#define BCOVE_ADCIRQ_ALL ( \ + BCOVE_ADCIRQ_BATTEMP | \ + BCOVE_ADCIRQ_SYSTEMP | \ + BCOVE_ADCIRQ_BATTID | \ + BCOVE_ADCIRQ_VIBATT | \ + BCOVE_ADCIRQ_CCTICK) + +#define BCOVE_ADC_TIMEOUT msecs_to_jiffies(1000) + +static const u8 mrfld_adc_requests[] = { + BCOVE_ADCIRQ_VIBATT, + BCOVE_ADCIRQ_BATTID, + BCOVE_ADCIRQ_VIBATT, + BCOVE_ADCIRQ_SYSTEMP, + BCOVE_ADCIRQ_BATTEMP, + BCOVE_ADCIRQ_BATTEMP, + BCOVE_ADCIRQ_SYSTEMP, + BCOVE_ADCIRQ_SYSTEMP, + BCOVE_ADCIRQ_SYSTEMP, +}; + +struct mrfld_adc { + struct regmap *regmap; + struct completion completion; + /* Lock to protect the IPC transfers */ + struct mutex lock; +}; + +static irqreturn_t mrfld_adc_thread_isr(int irq, void *data) +{ + struct iio_dev *indio_dev = data; + struct mrfld_adc *adc = iio_priv(indio_dev); + + complete(&adc->completion); + return IRQ_HANDLED; +} + +static int mrfld_adc_single_conv(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *result) +{ + struct mrfld_adc *adc = iio_priv(indio_dev); + struct regmap *regmap = adc->regmap; + unsigned int req; + long timeout; + u8 buf[2]; + int ret; + + reinit_completion(&adc->completion); + + regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0); + regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0); + + ret = regmap_read_poll_timeout(regmap, BCOVE_GPADCREQ, req, + !(req & BCOVE_GPADCREQ_BUSY), + 2000, 1000000); + if (ret) + goto done; + + req = mrfld_adc_requests[chan->channel]; + ret = regmap_write(regmap, BCOVE_GPADCREQ, BCOVE_GPADCREQ_IRQEN | req); + if (ret) + goto done; + + timeout = wait_for_completion_interruptible_timeout(&adc->completion, + BCOVE_ADC_TIMEOUT); + if (timeout < 0) { + ret = timeout; + goto done; + } + if (timeout == 0) { + ret = -ETIMEDOUT; + goto done; + } + + ret = regmap_bulk_read(regmap, chan->address, buf, 2); + if (ret) + goto done; + + *result = get_unaligned_be16(buf); + ret = IIO_VAL_INT; + +done: + regmap_update_bits(regmap, BCOVE_MIRQLVL1, BCOVE_LVL1_ADC, 0xff); + regmap_update_bits(regmap, BCOVE_MADCIRQ, BCOVE_ADCIRQ_ALL, 0xff); + + return ret; +} + +static int mrfld_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct mrfld_adc *adc = iio_priv(indio_dev); + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&adc->lock); + ret = mrfld_adc_single_conv(indio_dev, chan, val); + mutex_unlock(&adc->lock); + return ret; + default: + return -EINVAL; + } +} + +static const struct iio_info mrfld_adc_iio_info = { + .read_raw = &mrfld_adc_read_raw, +}; + +#define BCOVE_ADC_CHANNEL(_type, _channel, _datasheet_name, _address) \ + { \ + .indexed = 1, \ + .type = _type, \ + .channel = _channel, \ + .address = _address, \ + .datasheet_name = _datasheet_name, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + } + +static const struct iio_chan_spec mrfld_adc_channels[] = { + BCOVE_ADC_CHANNEL(IIO_VOLTAGE, 0, "CH0", 0xE9), + BCOVE_ADC_CHANNEL(IIO_RESISTANCE, 1, "CH1", 0xEB), + BCOVE_ADC_CHANNEL(IIO_CURRENT, 2, "CH2", 0xED), + BCOVE_ADC_CHANNEL(IIO_TEMP, 3, "CH3", 0xCC), + BCOVE_ADC_CHANNEL(IIO_TEMP, 4, "CH4", 0xC8), + BCOVE_ADC_CHANNEL(IIO_TEMP, 5, "CH5", 0xCA), + BCOVE_ADC_CHANNEL(IIO_TEMP, 6, "CH6", 0xC2), + BCOVE_ADC_CHANNEL(IIO_TEMP, 7, "CH7", 0xC4), + BCOVE_ADC_CHANNEL(IIO_TEMP, 8, "CH8", 0xC6), +}; + +static struct iio_map iio_maps[] = { + IIO_MAP("CH0", "bcove-battery", "VBATRSLT"), + IIO_MAP("CH1", "bcove-battery", "BATTID"), + IIO_MAP("CH2", "bcove-battery", "IBATRSLT"), + IIO_MAP("CH3", "bcove-temp", "PMICTEMP"), + IIO_MAP("CH4", "bcove-temp", "BATTEMP0"), + IIO_MAP("CH5", "bcove-temp", "BATTEMP1"), + IIO_MAP("CH6", "bcove-temp", "SYSTEMP0"), + IIO_MAP("CH7", "bcove-temp", "SYSTEMP1"), + IIO_MAP("CH8", "bcove-temp", "SYSTEMP2"), + {} +}; + +static int mrfld_adc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent); + struct iio_dev *indio_dev; + struct mrfld_adc *adc; + int irq; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*indio_dev)); + if (!indio_dev) + return -ENOMEM; + + adc = iio_priv(indio_dev); + + mutex_init(&adc->lock); + init_completion(&adc->completion); + adc->regmap = pmic->regmap; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(dev, irq, NULL, mrfld_adc_thread_isr, + IRQF_ONESHOT | IRQF_SHARED, pdev->name, + indio_dev); + if (ret) + return ret; + + platform_set_drvdata(pdev, indio_dev); + + indio_dev->dev.parent = dev; + indio_dev->name = pdev->name; + + indio_dev->channels = mrfld_adc_channels; + indio_dev->num_channels = ARRAY_SIZE(mrfld_adc_channels); + indio_dev->info = &mrfld_adc_iio_info; + indio_dev->modes = INDIO_DIRECT_MODE; + + ret = iio_map_array_register(indio_dev, iio_maps); + if (ret) + return ret; + + ret = devm_iio_device_register(dev, indio_dev); + if (ret < 0) + goto err_array_unregister; + + return 0; + +err_array_unregister: + iio_map_array_unregister(indio_dev); + return ret; +} + +static int mrfld_adc_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + + iio_map_array_unregister(indio_dev); + + return 0; +} + +static const struct platform_device_id mrfld_adc_id_table[] = { + { .name = "mrfld_bcove_adc" }, + {} +}; +MODULE_DEVICE_TABLE(platform, mrfld_adc_id_table); + +static struct platform_driver mrfld_adc_driver = { + .driver = { + .name = "mrfld_bcove_adc", + }, + .probe = mrfld_adc_probe, + .remove = mrfld_adc_remove, + .id_table = mrfld_adc_id_table, +}; +module_platform_driver(mrfld_adc_driver); + +MODULE_AUTHOR("Bin Yang "); +MODULE_AUTHOR("Vincent Pelletier "); +MODULE_AUTHOR("Andy Shevchenko "); +MODULE_DESCRIPTION("ADC driver for Basin Cove PMIC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/lpc18xx_adc.c b/drivers/iio/adc/lpc18xx_adc.c index e400a95f553d..4c6ac6644dc0 100644 --- a/drivers/iio/adc/lpc18xx_adc.c +++ b/drivers/iio/adc/lpc18xx_adc.c @@ -119,7 +119,6 @@ static int lpc18xx_adc_probe(struct platform_device *pdev) { struct iio_dev *indio_dev; struct lpc18xx_adc *adc; - struct resource *res; unsigned int clkdiv; unsigned long rate; int ret; @@ -133,8 +132,7 @@ static int lpc18xx_adc_probe(struct platform_device *pdev) adc->dev = &pdev->dev; mutex_init(&adc->lock); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc->base = devm_ioremap_resource(&pdev->dev, res); + adc->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(adc->base)) return PTR_ERR(adc->base); diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c index 214883458582..e171db20c04a 100644 --- a/drivers/iio/adc/max1027.c +++ b/drivers/iio/adc/max1027.c @@ -63,12 +63,18 @@ enum max1027_id { max1027, max1029, max1031, + max1227, + max1229, + max1231, }; static const struct spi_device_id max1027_id[] = { {"max1027", max1027}, {"max1029", max1029}, {"max1031", max1031}, + {"max1227", max1227}, + {"max1229", max1229}, + {"max1231", max1231}, {} }; MODULE_DEVICE_TABLE(spi, max1027_id); @@ -78,12 +84,15 @@ static const struct of_device_id max1027_adc_dt_ids[] = { { .compatible = "maxim,max1027" }, { .compatible = "maxim,max1029" }, { .compatible = "maxim,max1031" }, + { .compatible = "maxim,max1227" }, + { .compatible = "maxim,max1229" }, + { .compatible = "maxim,max1231" }, {}, }; MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids); #endif -#define MAX1027_V_CHAN(index) \ +#define MAX1027_V_CHAN(index, depth) \ { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ @@ -93,7 +102,7 @@ MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids); .scan_index = index + 1, \ .scan_type = { \ .sign = 'u', \ - .realbits = 10, \ + .realbits = depth, \ .storagebits = 16, \ .shift = 2, \ .endianness = IIO_BE, \ @@ -115,52 +124,54 @@ MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids); }, \ } +#define MAX1X27_CHANNELS(depth) \ + MAX1027_T_CHAN, \ + MAX1027_V_CHAN(0, depth), \ + MAX1027_V_CHAN(1, depth), \ + MAX1027_V_CHAN(2, depth), \ + MAX1027_V_CHAN(3, depth), \ + MAX1027_V_CHAN(4, depth), \ + MAX1027_V_CHAN(5, depth), \ + MAX1027_V_CHAN(6, depth), \ + MAX1027_V_CHAN(7, depth) + +#define MAX1X29_CHANNELS(depth) \ + MAX1X27_CHANNELS(depth), \ + MAX1027_V_CHAN(8, depth), \ + MAX1027_V_CHAN(9, depth), \ + MAX1027_V_CHAN(10, depth), \ + MAX1027_V_CHAN(11, depth) + +#define MAX1X31_CHANNELS(depth) \ + MAX1X27_CHANNELS(depth), \ + MAX1X29_CHANNELS(depth), \ + MAX1027_V_CHAN(12, depth), \ + MAX1027_V_CHAN(13, depth), \ + MAX1027_V_CHAN(14, depth), \ + MAX1027_V_CHAN(15, depth) + static const struct iio_chan_spec max1027_channels[] = { - MAX1027_T_CHAN, - MAX1027_V_CHAN(0), - MAX1027_V_CHAN(1), - MAX1027_V_CHAN(2), - MAX1027_V_CHAN(3), - MAX1027_V_CHAN(4), - MAX1027_V_CHAN(5), - MAX1027_V_CHAN(6), - MAX1027_V_CHAN(7) + MAX1X27_CHANNELS(10), }; static const struct iio_chan_spec max1029_channels[] = { - MAX1027_T_CHAN, - MAX1027_V_CHAN(0), - MAX1027_V_CHAN(1), - MAX1027_V_CHAN(2), - MAX1027_V_CHAN(3), - MAX1027_V_CHAN(4), - MAX1027_V_CHAN(5), - MAX1027_V_CHAN(6), - MAX1027_V_CHAN(7), - MAX1027_V_CHAN(8), - MAX1027_V_CHAN(9), - MAX1027_V_CHAN(10), - MAX1027_V_CHAN(11) + MAX1X29_CHANNELS(10), }; static const struct iio_chan_spec max1031_channels[] = { - MAX1027_T_CHAN, - MAX1027_V_CHAN(0), - MAX1027_V_CHAN(1), - MAX1027_V_CHAN(2), - MAX1027_V_CHAN(3), - MAX1027_V_CHAN(4), - MAX1027_V_CHAN(5), - MAX1027_V_CHAN(6), - MAX1027_V_CHAN(7), - MAX1027_V_CHAN(8), - MAX1027_V_CHAN(9), - MAX1027_V_CHAN(10), - MAX1027_V_CHAN(11), - MAX1027_V_CHAN(12), - MAX1027_V_CHAN(13), - MAX1027_V_CHAN(14), - MAX1027_V_CHAN(15) + MAX1X31_CHANNELS(10), +}; + +static const struct iio_chan_spec max1227_channels[] = { + MAX1X27_CHANNELS(12), +}; + +static const struct iio_chan_spec max1229_channels[] = { + MAX1X29_CHANNELS(12), +}; + +static const struct iio_chan_spec max1231_channels[] = { + MAX1X31_CHANNELS(12), }; static const unsigned long max1027_available_scan_masks[] = { @@ -200,6 +211,21 @@ static const struct max1027_chip_info max1027_chip_info_tbl[] = { .num_channels = ARRAY_SIZE(max1031_channels), .available_scan_masks = max1031_available_scan_masks, }, + [max1227] = { + .channels = max1227_channels, + .num_channels = ARRAY_SIZE(max1227_channels), + .available_scan_masks = max1027_available_scan_masks, + }, + [max1229] = { + .channels = max1229_channels, + .num_channels = ARRAY_SIZE(max1229_channels), + .available_scan_masks = max1029_available_scan_masks, + }, + [max1231] = { + .channels = max1231_channels, + .num_channels = ARRAY_SIZE(max1231_channels), + .available_scan_masks = max1031_available_scan_masks, + }, }; struct max1027_state { @@ -284,7 +310,7 @@ static int max1027_read_raw(struct iio_dev *indio_dev, break; case IIO_VOLTAGE: *val = 2500; - *val2 = 10; + *val2 = chan->scan_type.realbits; ret = IIO_VAL_FRACTIONAL_LOG2; break; default: @@ -309,8 +335,11 @@ static int max1027_debugfs_reg_access(struct iio_dev *indio_dev, struct max1027_state *st = iio_priv(indio_dev); u8 *val = (u8 *)st->buffer; - if (readval != NULL) - return -EINVAL; + if (readval) { + int ret = spi_read(st->spi, val, 2); + *readval = be16_to_cpu(st->buffer[0]); + return ret; + } *val = (u8)writeval; return spi_write(st->spi, val, 1); @@ -427,34 +456,47 @@ static int max1027_probe(struct spi_device *spi) return -ENOMEM; } - ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, - &iio_pollfunc_store_time, - &max1027_trigger_handler, NULL); - if (ret < 0) { - dev_err(&indio_dev->dev, "Failed to setup buffer\n"); - return ret; + if (spi->irq) { + ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, + &iio_pollfunc_store_time, + &max1027_trigger_handler, + NULL); + if (ret < 0) { + dev_err(&indio_dev->dev, "Failed to setup buffer\n"); + return ret; + } + + st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-trigger", + indio_dev->name); + if (st->trig == NULL) { + ret = -ENOMEM; + dev_err(&indio_dev->dev, + "Failed to allocate iio trigger\n"); + return ret; + } + + st->trig->ops = &max1027_trigger_ops; + st->trig->dev.parent = &spi->dev; + iio_trigger_set_drvdata(st->trig, indio_dev); + iio_trigger_register(st->trig); + + ret = devm_request_threaded_irq(&spi->dev, spi->irq, + iio_trigger_generic_data_rdy_poll, + NULL, + IRQF_TRIGGER_FALLING, + spi->dev.driver->name, + st->trig); + if (ret < 0) { + dev_err(&indio_dev->dev, "Failed to allocate IRQ.\n"); + return ret; + } } - st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-trigger", - indio_dev->name); - if (st->trig == NULL) { - ret = -ENOMEM; - dev_err(&indio_dev->dev, "Failed to allocate iio trigger\n"); - return ret; - } - - st->trig->ops = &max1027_trigger_ops; - st->trig->dev.parent = &spi->dev; - iio_trigger_set_drvdata(st->trig, indio_dev); - iio_trigger_register(st->trig); - - ret = devm_request_threaded_irq(&spi->dev, spi->irq, - iio_trigger_generic_data_rdy_poll, - NULL, - IRQF_TRIGGER_FALLING, - spi->dev.driver->name, st->trig); + /* Internal reset */ + st->reg = MAX1027_RST_REG; + ret = spi_write(st->spi, &st->reg, 1); if (ret < 0) { - dev_err(&indio_dev->dev, "Failed to allocate IRQ.\n"); + dev_err(&indio_dev->dev, "Failed to reset the ADC\n"); return ret; } @@ -480,5 +522,5 @@ static struct spi_driver max1027_driver = { module_spi_driver(max1027_driver); MODULE_AUTHOR("Philippe Reynes "); -MODULE_DESCRIPTION("MAX1027/MAX1029/MAX1031 ADC"); +MODULE_DESCRIPTION("MAX1X27/MAX1X29/MAX1X31 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c index 38bf10085696..465c7625a55a 100644 --- a/drivers/iio/adc/mcp320x.c +++ b/drivers/iio/adc/mcp320x.c @@ -164,7 +164,7 @@ static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, case mcp3550_60: case mcp3551: case mcp3553: { - u32 raw = be32_to_cpup((u32 *)adc->rx_buf); + u32 raw = be32_to_cpup((__be32 *)adc->rx_buf); if (!(adc->spi->mode & SPI_CPOL)) raw <<= 1; /* strip Data Ready bit in SPI mode 0,0 */ diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index 7b27306330a3..22a470db9ef8 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -1187,7 +1187,6 @@ static int meson_sar_adc_probe(struct platform_device *pdev) const struct meson_sar_adc_data *match_data; struct meson_sar_adc_priv *priv; struct iio_dev *indio_dev; - struct resource *res; void __iomem *base; int irq, ret; @@ -1214,8 +1213,7 @@ static int meson_sar_adc_probe(struct platform_device *pdev) indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->info = &meson_sar_adc_iio_info; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return PTR_ERR(base); diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c index 7bbb64ca3b32..a4776d924f3a 100644 --- a/drivers/iio/adc/mt6577_auxadc.c +++ b/drivers/iio/adc/mt6577_auxadc.c @@ -237,7 +237,6 @@ static int mt6577_auxadc_probe(struct platform_device *pdev) { struct mt6577_auxadc_device *adc_dev; unsigned long adc_clk_rate; - struct resource *res; struct iio_dev *indio_dev; int ret; @@ -253,8 +252,7 @@ static int mt6577_auxadc_probe(struct platform_device *pdev) indio_dev->channels = mt6577_auxadc_iio_channels; indio_dev->num_channels = ARRAY_SIZE(mt6577_auxadc_iio_channels); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc_dev->reg_base = devm_ioremap_resource(&pdev->dev, res); + adc_dev->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(adc_dev->reg_base)) { dev_err(&pdev->dev, "failed to get auxadc base address\n"); return PTR_ERR(adc_dev->reg_base); diff --git a/drivers/iio/adc/npcm_adc.c b/drivers/iio/adc/npcm_adc.c index 910f3585fa54..a6170a37ebe8 100644 --- a/drivers/iio/adc/npcm_adc.c +++ b/drivers/iio/adc/npcm_adc.c @@ -183,7 +183,6 @@ static int npcm_adc_probe(struct platform_device *pdev) int irq; u32 div; u32 reg_con; - struct resource *res; struct npcm_adc *info; struct iio_dev *indio_dev; struct device *dev = &pdev->dev; @@ -196,8 +195,7 @@ static int npcm_adc_probe(struct platform_device *pdev) info->dev = &pdev->dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - info->regs = devm_ioremap_resource(&pdev->dev, res); + info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) return PTR_ERR(info->regs); diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c index c37f201294b2..63ce743ee7af 100644 --- a/drivers/iio/adc/rcar-gyroadc.c +++ b/drivers/iio/adc/rcar-gyroadc.c @@ -481,7 +481,6 @@ static int rcar_gyroadc_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct rcar_gyroadc *priv; struct iio_dev *indio_dev; - struct resource *mem; int ret; indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); @@ -491,8 +490,7 @@ static int rcar_gyroadc_probe(struct platform_device *pdev) priv = iio_priv(indio_dev); priv->dev = dev; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->regs = devm_ioremap_resource(dev, mem); + priv->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index a6c046575ec3..66b387f9b36d 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -477,13 +477,6 @@ static void sc27xx_adc_disable(void *_data) SC27XX_MODULE_ADC_EN, 0); } -static void sc27xx_adc_free_hwlock(void *_data) -{ - struct hwspinlock *hwlock = _data; - - hwspin_lock_free(hwlock); -} - static int sc27xx_adc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -520,19 +513,12 @@ static int sc27xx_adc_probe(struct platform_device *pdev) return ret; } - sc27xx_data->hwlock = hwspin_lock_request_specific(ret); + sc27xx_data->hwlock = devm_hwspin_lock_request_specific(dev, ret); if (!sc27xx_data->hwlock) { dev_err(dev, "failed to request hwspinlock\n"); return -ENXIO; } - ret = devm_add_action_or_reset(dev, sc27xx_adc_free_hwlock, - sc27xx_data->hwlock); - if (ret) { - dev_err(dev, "failed to add hwspinlock action\n"); - return ret; - } - sc27xx_data->dev = dev; ret = sc27xx_adc_enable(sc27xx_data); diff --git a/drivers/iio/adc/spear_adc.c b/drivers/iio/adc/spear_adc.c index 592b97c464da..0ad536494e8f 100644 --- a/drivers/iio/adc/spear_adc.c +++ b/drivers/iio/adc/spear_adc.c @@ -260,7 +260,6 @@ static int spear_adc_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct spear_adc_state *st; - struct resource *res; struct iio_dev *indio_dev = NULL; int ret = -ENODEV; int irq; @@ -279,8 +278,7 @@ static int spear_adc_probe(struct platform_device *pdev) * (e.g. SPEAr3xx). Let's provide two register base addresses * to support multi-arch kernels. */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - st->adc_base_spear6xx = devm_ioremap_resource(&pdev->dev, res); + st->adc_base_spear6xx = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(st->adc_base_spear6xx)) return PTR_ERR(st->adc_base_spear6xx); diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c index 93a096a91f8c..6537f4f776c5 100644 --- a/drivers/iio/adc/stm32-adc-core.c +++ b/drivers/iio/adc/stm32-adc-core.c @@ -38,12 +38,12 @@ #define HAS_ANASWVDD BIT(1) /** - * stm32_adc_common_regs - stm32 common registers, compatible dependent data + * struct stm32_adc_common_regs - stm32 common registers * @csr: common status register offset * @ccr: common control register offset - * @eoc1: adc1 end of conversion flag in @csr - * @eoc2: adc2 end of conversion flag in @csr - * @eoc3: adc3 end of conversion flag in @csr + * @eoc1_msk: adc1 end of conversion flag in @csr + * @eoc2_msk: adc2 end of conversion flag in @csr + * @eoc3_msk: adc3 end of conversion flag in @csr * @ier: interrupt enable register offset for each adc * @eocie_msk: end of conversion interrupt enable mask in @ier */ @@ -60,7 +60,7 @@ struct stm32_adc_common_regs { struct stm32_adc_priv; /** - * stm32_adc_priv_cfg - stm32 core compatible configuration data + * struct stm32_adc_priv_cfg - stm32 core compatible configuration data * @regs: common registers for all instances * @clk_sel: clock selection routine * @max_clk_rate_hz: maximum analog clock rate (Hz, from datasheet) @@ -79,6 +79,7 @@ struct stm32_adc_priv_cfg { * @domain: irq domain reference * @aclk: clock reference for the analog circuitry * @bclk: bus clock common for all ADCs, depends on part used + * @max_clk_rate: desired maximum clock rate * @booster: booster supply reference * @vdd: vdd supply reference * @vdda: vdda analog supply reference @@ -95,6 +96,7 @@ struct stm32_adc_priv { struct irq_domain *domain; struct clk *aclk; struct clk *bclk; + u32 max_clk_rate; struct regulator *booster; struct regulator *vdd; struct regulator *vdda; @@ -117,6 +119,7 @@ static int stm32f4_pclk_div[] = {2, 4, 6, 8}; /** * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler + * @pdev: platform device * @priv: stm32 ADC core private data * Select clock prescaler used for analog conversions, before using ADC. */ @@ -140,7 +143,7 @@ static int stm32f4_adc_clk_sel(struct platform_device *pdev, } for (i = 0; i < ARRAY_SIZE(stm32f4_pclk_div); i++) { - if ((rate / stm32f4_pclk_div[i]) <= priv->cfg->max_clk_rate_hz) + if ((rate / stm32f4_pclk_div[i]) <= priv->max_clk_rate) break; } if (i >= ARRAY_SIZE(stm32f4_pclk_div)) { @@ -229,7 +232,7 @@ static int stm32h7_adc_clk_sel(struct platform_device *pdev, if (ckmode) continue; - if ((rate / div) <= priv->cfg->max_clk_rate_hz) + if ((rate / div) <= priv->max_clk_rate) goto out; } } @@ -249,7 +252,7 @@ static int stm32h7_adc_clk_sel(struct platform_device *pdev, if (!ckmode) continue; - if ((rate / div) <= priv->cfg->max_clk_rate_hz) + if ((rate / div) <= priv->max_clk_rate) goto out; } @@ -654,6 +657,7 @@ static int stm32_adc_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np = pdev->dev.of_node; struct resource *res; + u32 max_rate; int ret; if (!pdev->dev.of_node) @@ -730,6 +734,13 @@ static int stm32_adc_probe(struct platform_device *pdev) priv->common.vref_mv = ret / 1000; dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv); + ret = of_property_read_u32(pdev->dev.of_node, "st,max-clk-rate-hz", + &max_rate); + if (!ret) + priv->max_clk_rate = min(max_rate, priv->cfg->max_clk_rate_hz); + else + priv->max_clk_rate = priv->cfg->max_clk_rate_hz; + ret = priv->cfg->clk_sel(pdev, priv); if (ret < 0) goto err_hw_stop; diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c index 73aee5949b6b..3b291d72701c 100644 --- a/drivers/iio/adc/stm32-adc.c +++ b/drivers/iio/adc/stm32-adc.c @@ -102,7 +102,7 @@ struct stm32_adc_calib { }; /** - * stm32_adc_regs - stm32 ADC misc registers & bitfield desc + * struct stm32_adc_regs - stm32 ADC misc registers & bitfield desc * @reg: register offset * @mask: bitfield mask * @shift: left shift @@ -114,7 +114,7 @@ struct stm32_adc_regs { }; /** - * stm32_adc_regspec - stm32 registers definition, compatible dependent data + * struct stm32_adc_regspec - stm32 registers definition * @dr: data register offset * @ier_eoc: interrupt enable register & eocie bitfield * @isr_eoc: interrupt status register & eoc bitfield @@ -140,7 +140,7 @@ struct stm32_adc_regspec { struct stm32_adc; /** - * stm32_adc_cfg - stm32 compatible configuration data + * struct stm32_adc_cfg - stm32 compatible configuration data * @regs: registers descriptions * @adc_info: per instance input channels definitions * @trigs: external trigger sources @@ -183,8 +183,8 @@ struct stm32_adc_cfg { * @rx_buf: dma rx buffer cpu address * @rx_dma_buf: dma rx buffer bus address * @rx_buf_sz: dma rx buffer size - * @difsel bitmask to set single-ended/differential channel - * @pcsel bitmask to preselect channels on some devices + * @difsel: bitmask to set single-ended/differential channel + * @pcsel: bitmask to preselect channels on some devices * @smpr_val: sampling time settings (e.g. smpr1 / smpr2) * @cal: optional calibration data on some devices * @chan_name: channel name array @@ -254,7 +254,7 @@ static const struct stm32_adc_info stm32h7_adc_info = { .num_res = ARRAY_SIZE(stm32h7_adc_resolutions), }; -/** +/* * stm32f4_sq - describe regular sequence registers * - L: sequence len (register & bit field) * - SQ1..SQ16: sequence entries (register & bit field) @@ -301,7 +301,7 @@ static struct stm32_adc_trig_info stm32f4_adc_trigs[] = { {}, /* sentinel */ }; -/** +/* * stm32f4_smp_bits[] - describe sampling time register index & bit fields * Sorted so it can be indexed by channel number. */ @@ -392,7 +392,7 @@ static struct stm32_adc_trig_info stm32h7_adc_trigs[] = { {}, }; -/** +/* * stm32h7_smp_bits - describe sampling time register index & bit fields * Sorted so it can be indexed by channel number. */ @@ -994,6 +994,7 @@ static int stm32_adc_conf_scan_seq(struct iio_dev *indio_dev, /** * stm32_adc_get_trig_extsel() - Get external trigger selection + * @indio_dev: IIO device structure * @trig: trigger * * Returns trigger extsel value, if trig matches, -EINVAL otherwise. @@ -1297,6 +1298,10 @@ static int stm32_adc_of_xlate(struct iio_dev *indio_dev, /** * stm32_adc_debugfs_reg_access - read or write register value + * @indio_dev: IIO device structure + * @reg: register offset + * @writeval: value to write + * @readval: value to read * * To read a value from an ADC register: * echo [ADC reg offset] > direct_reg_access diff --git a/drivers/iio/adc/stmpe-adc.c b/drivers/iio/adc/stmpe-adc.c index bd72727fc417..0f88048ea48f 100644 --- a/drivers/iio/adc/stmpe-adc.c +++ b/drivers/iio/adc/stmpe-adc.c @@ -175,7 +175,7 @@ static int stmpe_read_raw(struct iio_dev *indio_dev, static irqreturn_t stmpe_adc_isr(int irq, void *dev_id) { struct stmpe_adc *info = (struct stmpe_adc *)dev_id; - u16 data; + __be16 data; if (info->channel <= STMPE_ADC_LAST_NR) { int int_sta; diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c index 55c5119fe575..472b08f37fea 100644 --- a/drivers/iio/adc/twl4030-madc.c +++ b/drivers/iio/adc/twl4030-madc.c @@ -495,7 +495,7 @@ static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc) ret = twl4030_madc_disable_irq(madc, i); if (ret < 0) dev_dbg(madc->dev, "Disable interrupt failed %d\n", i); - madc->requests[i].result_pending = 1; + madc->requests[i].result_pending = true; } for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { r = &madc->requests[i]; @@ -507,8 +507,8 @@ static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc) len = twl4030_madc_read_channels(madc, method->rbase, r->channels, r->rbuf, r->raw); /* Free request */ - r->result_pending = 0; - r->active = 0; + r->result_pending = false; + r->active = false; } mutex_unlock(&madc->lock); @@ -521,15 +521,15 @@ err_i2c: */ for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { r = &madc->requests[i]; - if (r->active == 0) + if (!r->active) continue; method = &twl4030_conversion_methods[r->method]; /* Read results */ len = twl4030_madc_read_channels(madc, method->rbase, r->channels, r->rbuf, r->raw); /* Free request */ - r->result_pending = 0; - r->active = 0; + r->result_pending = false; + r->active = false; } mutex_unlock(&madc->lock); @@ -652,16 +652,16 @@ static int twl4030_madc_conversion(struct twl4030_madc_request *req) ret = twl4030_madc_start_conversion(twl4030_madc, req->method); if (ret < 0) goto out; - twl4030_madc->requests[req->method].active = 1; + twl4030_madc->requests[req->method].active = true; /* Wait until conversion is ready (ctrl register returns EOC) */ ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl); if (ret) { - twl4030_madc->requests[req->method].active = 0; + twl4030_madc->requests[req->method].active = false; goto out; } ret = twl4030_madc_read_channels(twl4030_madc, method->rbase, req->channels, req->rbuf, req->raw); - twl4030_madc->requests[req->method].active = 0; + twl4030_madc->requests[req->method].active = false; out: mutex_unlock(&twl4030_madc->lock); diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c index 98b30475bbc6..cb7380bf07ca 100644 --- a/drivers/iio/adc/vf610_adc.c +++ b/drivers/iio/adc/vf610_adc.c @@ -802,7 +802,6 @@ static int vf610_adc_probe(struct platform_device *pdev) { struct vf610_adc *info; struct iio_dev *indio_dev; - struct resource *mem; int irq; int ret; @@ -815,8 +814,7 @@ static int vf610_adc_probe(struct platform_device *pdev) info = iio_priv(indio_dev); info->dev = &pdev->dev; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - info->regs = devm_ioremap_resource(&pdev->dev, mem); + info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) return PTR_ERR(info->regs); diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 4fd389678dba..ec227b358cd6 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -1150,7 +1150,6 @@ static int xadc_probe(struct platform_device *pdev) const struct of_device_id *id; struct iio_dev *indio_dev; unsigned int bipolar_mask; - struct resource *mem; unsigned int conf0; struct xadc *xadc; int ret; @@ -1180,8 +1179,7 @@ static int xadc_probe(struct platform_device *pdev) spin_lock_init(&xadc->lock); INIT_DELAYED_WORK(&xadc->zynq_unmask_work, xadc_zynq_unmask_worker); - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - xadc->base = devm_ioremap_resource(&pdev->dev, mem); + xadc->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(xadc->base)) return PTR_ERR(xadc->base); diff --git a/drivers/iio/chemical/atlas-ph-sensor.c b/drivers/iio/chemical/atlas-ph-sensor.c index 3a20cb5d9bff..6c175eb1c7a7 100644 --- a/drivers/iio/chemical/atlas-ph-sensor.c +++ b/drivers/iio/chemical/atlas-ph-sensor.c @@ -323,16 +323,16 @@ static int atlas_buffer_predisable(struct iio_dev *indio_dev) struct atlas_data *data = iio_priv(indio_dev); int ret; - ret = iio_triggered_buffer_predisable(indio_dev); - if (ret) - return ret; - ret = atlas_set_interrupt(data, false); if (ret) return ret; pm_runtime_mark_last_busy(&data->client->dev); - return pm_runtime_put_autosuspend(&data->client->dev); + ret = pm_runtime_put_autosuspend(&data->client->dev); + if (ret) + return ret; + + return iio_triggered_buffer_predisable(indio_dev); } static const struct iio_trigger_ops atlas_interrupt_trigger_ops = { diff --git a/drivers/iio/chemical/sgp30.c b/drivers/iio/chemical/sgp30.c index 8cc8fe5e356d..403e8803471a 100644 --- a/drivers/iio/chemical/sgp30.c +++ b/drivers/iio/chemical/sgp30.c @@ -483,7 +483,7 @@ static void sgp_init(struct sgp_data *data) data->iaq_defval_skip_jiffies = 43 * data->measure_interval_jiffies; break; - }; + } } static const struct iio_info sgp_info = { diff --git a/drivers/iio/chemical/sps30.c b/drivers/iio/chemical/sps30.c index edbb956e81e8..acb9f8ecbb3d 100644 --- a/drivers/iio/chemical/sps30.c +++ b/drivers/iio/chemical/sps30.c @@ -117,7 +117,7 @@ static int sps30_do_cmd(struct sps30_state *state, u16 cmd, u8 *data, int size) break; case SPS30_READ_AUTO_CLEANING_PERIOD: buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8; - buf[1] = (u8)SPS30_AUTO_CLEANING_PERIOD; + buf[1] = (u8)(SPS30_AUTO_CLEANING_PERIOD & 0xff); /* fall through */ case SPS30_READ_DATA_READY_FLAG: case SPS30_READ_DATA: diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index cc42219a64f7..979070196da9 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -60,8 +60,8 @@ config AD5446 help Say yes here to build support for Analog Devices AD5300, AD5301, AD5310, AD5311, AD5320, AD5321, AD5444, AD5446, AD5450, AD5451, AD5452, AD5453, - AD5512A, AD5541A, AD5542A, AD5543, AD5553, AD5601, AD5602, AD5611, AD5612, - AD5620, AD5621, AD5622, AD5640, AD5641, AD5660, AD5662 DACs + AD5512A, AD5541A, AD5542A, AD5543, AD5553, AD5600, AD5601, AD5602, AD5611, + AD5612, AD5620, AD5621, AD5622, AD5640, AD5641, AD5660, AD5662 DACs as well as Texas Instruments DAC081S101, DAC101S101, DAC121S101. To compile this driver as a module, choose M here: the diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c index 7df8b4cc295d..61c670f7fc5f 100644 --- a/drivers/iio/dac/ad5446.c +++ b/drivers/iio/dac/ad5446.c @@ -327,6 +327,7 @@ enum ad5446_supported_spi_device_ids { ID_AD5541A, ID_AD5512A, ID_AD5553, + ID_AD5600, ID_AD5601, ID_AD5611, ID_AD5621, @@ -381,6 +382,10 @@ static const struct ad5446_chip_info ad5446_spi_chip_info[] = { .channel = AD5446_CHANNEL(14, 16, 0), .write = ad5446_write, }, + [ID_AD5600] = { + .channel = AD5446_CHANNEL(16, 16, 0), + .write = ad5446_write, + }, [ID_AD5601] = { .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6), .write = ad5446_write, @@ -448,6 +453,7 @@ static const struct spi_device_id ad5446_spi_ids[] = { {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */ {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */ {"ad5553", ID_AD5553}, + {"ad5600", ID_AD5600}, {"ad5601", ID_AD5601}, {"ad5611", ID_AD5611}, {"ad5621", ID_AD5621}, diff --git a/drivers/iio/dac/ad7303.c b/drivers/iio/dac/ad7303.c index 8de9f40226e6..14bbac6bee98 100644 --- a/drivers/iio/dac/ad7303.c +++ b/drivers/iio/dac/ad7303.c @@ -41,6 +41,7 @@ struct ad7303_state { struct regulator *vdd_reg; struct regulator *vref_reg; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. @@ -79,7 +80,7 @@ static ssize_t ad7303_write_dac_powerdown(struct iio_dev *indio_dev, if (ret) return ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (pwr_down) st->config |= AD7303_CFG_POWER_DOWN(chan->channel); @@ -90,7 +91,7 @@ static ssize_t ad7303_write_dac_powerdown(struct iio_dev *indio_dev, * mode, so just write one of the DAC channels again */ ad7303_write(st, chan->channel, st->dac_cache[chan->channel]); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return len; } @@ -116,7 +117,9 @@ static int ad7303_read_raw(struct iio_dev *indio_dev, switch (info) { case IIO_CHAN_INFO_RAW: + mutex_lock(&st->lock); *val = st->dac_cache[chan->channel]; + mutex_unlock(&st->lock); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: vref_uv = ad7303_get_vref(st, chan); @@ -144,11 +147,11 @@ static int ad7303_write_raw(struct iio_dev *indio_dev, if (val >= (1 << chan->scan_type.realbits) || val < 0) return -EINVAL; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad7303_write(st, chan->address, val); if (ret == 0) st->dac_cache[chan->channel] = val; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); break; default: ret = -EINVAL; @@ -211,6 +214,8 @@ static int ad7303_probe(struct spi_device *spi) st->spi = spi; + mutex_init(&st->lock); + st->vdd_reg = devm_regulator_get(&spi->dev, "Vdd"); if (IS_ERR(st->vdd_reg)) return PTR_ERR(st->vdd_reg); diff --git a/drivers/iio/dac/lpc18xx_dac.c b/drivers/iio/dac/lpc18xx_dac.c index 883e84e96609..0ab357bd3633 100644 --- a/drivers/iio/dac/lpc18xx_dac.c +++ b/drivers/iio/dac/lpc18xx_dac.c @@ -106,7 +106,6 @@ static int lpc18xx_dac_probe(struct platform_device *pdev) { struct iio_dev *indio_dev; struct lpc18xx_dac *dac; - struct resource *res; int ret; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac)); @@ -117,8 +116,7 @@ static int lpc18xx_dac_probe(struct platform_device *pdev) dac = iio_priv(indio_dev); mutex_init(&dac->lock); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - dac->base = devm_ioremap_resource(&pdev->dev, res); + dac->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(dac->base)) return PTR_ERR(dac->base); diff --git a/drivers/iio/dac/stm32-dac-core.c b/drivers/iio/dac/stm32-dac-core.c index d0fb3124de07..9e6b4cd0a5cc 100644 --- a/drivers/iio/dac/stm32-dac-core.c +++ b/drivers/iio/dac/stm32-dac-core.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -50,6 +51,41 @@ static const struct regmap_config stm32_dac_regmap_cfg = { .max_register = 0x3fc, }; +static int stm32_dac_core_hw_start(struct device *dev) +{ + struct stm32_dac_common *common = dev_get_drvdata(dev); + struct stm32_dac_priv *priv = to_stm32_dac_priv(common); + int ret; + + ret = regulator_enable(priv->vref); + if (ret < 0) { + dev_err(dev, "vref enable failed: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(priv->pclk); + if (ret < 0) { + dev_err(dev, "pclk enable failed: %d\n", ret); + goto err_regulator_disable; + } + + return 0; + +err_regulator_disable: + regulator_disable(priv->vref); + + return ret; +} + +static void stm32_dac_core_hw_stop(struct device *dev) +{ + struct stm32_dac_common *common = dev_get_drvdata(dev); + struct stm32_dac_priv *priv = to_stm32_dac_priv(common); + + clk_disable_unprepare(priv->pclk); + regulator_disable(priv->vref); +} + static int stm32_dac_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -66,6 +102,8 @@ static int stm32_dac_probe(struct platform_device *pdev) priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + platform_set_drvdata(pdev, &priv->common); + cfg = (const struct stm32_dac_cfg *) of_match_device(dev->driver->of_match_table, dev)->data; @@ -74,11 +112,19 @@ static int stm32_dac_probe(struct platform_device *pdev) if (IS_ERR(mmio)) return PTR_ERR(mmio); - regmap = devm_regmap_init_mmio(dev, mmio, &stm32_dac_regmap_cfg); + regmap = devm_regmap_init_mmio_clk(dev, "pclk", mmio, + &stm32_dac_regmap_cfg); if (IS_ERR(regmap)) return PTR_ERR(regmap); priv->common.regmap = regmap; + priv->pclk = devm_clk_get(dev, "pclk"); + if (IS_ERR(priv->pclk)) { + ret = PTR_ERR(priv->pclk); + dev_err(dev, "pclk get failed\n"); + return ret; + } + priv->vref = devm_regulator_get(dev, "vref"); if (IS_ERR(priv->vref)) { ret = PTR_ERR(priv->vref); @@ -86,33 +132,22 @@ static int stm32_dac_probe(struct platform_device *pdev) return ret; } - ret = regulator_enable(priv->vref); - if (ret < 0) { - dev_err(dev, "vref enable failed\n"); - return ret; - } + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + ret = stm32_dac_core_hw_start(dev); + if (ret) + goto err_pm_stop; ret = regulator_get_voltage(priv->vref); if (ret < 0) { dev_err(dev, "vref get voltage failed, %d\n", ret); - goto err_vref; + goto err_hw_stop; } priv->common.vref_mv = ret / 1000; dev_dbg(dev, "vref+=%dmV\n", priv->common.vref_mv); - priv->pclk = devm_clk_get(dev, "pclk"); - if (IS_ERR(priv->pclk)) { - ret = PTR_ERR(priv->pclk); - dev_err(dev, "pclk get failed\n"); - goto err_vref; - } - - ret = clk_prepare_enable(priv->pclk); - if (ret < 0) { - dev_err(dev, "pclk enable failed\n"); - goto err_vref; - } - priv->rst = devm_reset_control_get_exclusive(dev, NULL); if (!IS_ERR(priv->rst)) { reset_control_assert(priv->rst); @@ -128,39 +163,79 @@ static int stm32_dac_probe(struct platform_device *pdev) priv->common.hfsel ? STM32H7_DAC_CR_HFSEL : 0); if (ret) - goto err_pclk; + goto err_hw_stop; } - platform_set_drvdata(pdev, &priv->common); ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, dev); if (ret < 0) { dev_err(dev, "failed to populate DT children\n"); - goto err_pclk; + goto err_hw_stop; } + pm_runtime_put(dev); + return 0; -err_pclk: - clk_disable_unprepare(priv->pclk); -err_vref: - regulator_disable(priv->vref); +err_hw_stop: + stm32_dac_core_hw_stop(dev); +err_pm_stop: + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); return ret; } static int stm32_dac_remove(struct platform_device *pdev) { - struct stm32_dac_common *common = platform_get_drvdata(pdev); - struct stm32_dac_priv *priv = to_stm32_dac_priv(common); - + pm_runtime_get_sync(&pdev->dev); of_platform_depopulate(&pdev->dev); - clk_disable_unprepare(priv->pclk); - regulator_disable(priv->vref); + stm32_dac_core_hw_stop(&pdev->dev); + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); return 0; } +static int __maybe_unused stm32_dac_core_resume(struct device *dev) +{ + struct stm32_dac_common *common = dev_get_drvdata(dev); + struct stm32_dac_priv *priv = to_stm32_dac_priv(common); + int ret; + + if (priv->common.hfsel) { + /* restore hfsel (maybe lost under low power state) */ + ret = regmap_update_bits(priv->common.regmap, STM32_DAC_CR, + STM32H7_DAC_CR_HFSEL, + STM32H7_DAC_CR_HFSEL); + if (ret) + return ret; + } + + return pm_runtime_force_resume(dev); +} + +static int __maybe_unused stm32_dac_core_runtime_suspend(struct device *dev) +{ + stm32_dac_core_hw_stop(dev); + + return 0; +} + +static int __maybe_unused stm32_dac_core_runtime_resume(struct device *dev) +{ + return stm32_dac_core_hw_start(dev); +} + +static const struct dev_pm_ops stm32_dac_core_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, stm32_dac_core_resume) + SET_RUNTIME_PM_OPS(stm32_dac_core_runtime_suspend, + stm32_dac_core_runtime_resume, + NULL) +}; + static const struct stm32_dac_cfg stm32h7_dac_cfg = { .has_hfsel = true, }; @@ -182,6 +257,7 @@ static struct platform_driver stm32_dac_driver = { .driver = { .name = "stm32-dac-core", .of_match_table = stm32_dac_of_match, + .pm = &stm32_dac_core_pm_ops, }, }; module_platform_driver(stm32_dac_driver); diff --git a/drivers/iio/dac/stm32-dac.c b/drivers/iio/dac/stm32-dac.c index cce26a3a6627..f22c1d9129b2 100644 --- a/drivers/iio/dac/stm32-dac.c +++ b/drivers/iio/dac/stm32-dac.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "stm32-dac-core.h" @@ -20,6 +21,8 @@ #define STM32_DAC_CHANNEL_2 2 #define STM32_DAC_IS_CHAN_1(ch) ((ch) & STM32_DAC_CHANNEL_1) +#define STM32_DAC_AUTO_SUSPEND_DELAY_MS 2000 + /** * struct stm32_dac - private data of DAC driver * @common: reference to DAC common data @@ -49,15 +52,34 @@ static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch, bool enable) { struct stm32_dac *dac = iio_priv(indio_dev); + struct device *dev = indio_dev->dev.parent; u32 msk = STM32_DAC_IS_CHAN_1(ch) ? STM32_DAC_CR_EN1 : STM32_DAC_CR_EN2; u32 en = enable ? msk : 0; int ret; + /* already enabled / disabled ? */ + mutex_lock(&indio_dev->mlock); + ret = stm32_dac_is_enabled(indio_dev, ch); + if (ret < 0 || enable == !!ret) { + mutex_unlock(&indio_dev->mlock); + return ret < 0 ? ret : 0; + } + + if (enable) { + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + pm_runtime_put_noidle(dev); + mutex_unlock(&indio_dev->mlock); + return ret; + } + } + ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en); + mutex_unlock(&indio_dev->mlock); if (ret < 0) { dev_err(&indio_dev->dev, "%s failed\n", en ? "Enable" : "Disable"); - return ret; + goto err_put_pm; } /* @@ -68,7 +90,20 @@ static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch, if (en && dac->common->hfsel) udelay(1); + if (!enable) { + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + } + return 0; + +err_put_pm: + if (enable) { + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + } + + return ret; } static int stm32_dac_get_value(struct stm32_dac *dac, int channel, int *val) @@ -272,6 +307,7 @@ static int stm32_dac_chan_of_init(struct iio_dev *indio_dev) static int stm32_dac_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; + struct device *dev = &pdev->dev; struct iio_dev *indio_dev; struct stm32_dac *dac; int ret; @@ -296,9 +332,61 @@ static int stm32_dac_probe(struct platform_device *pdev) if (ret < 0) return ret; - return devm_iio_device_register(&pdev->dev, indio_dev); + /* Get stm32-dac-core PM online */ + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_set_autosuspend_delay(dev, STM32_DAC_AUTO_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(dev); + pm_runtime_enable(dev); + + ret = iio_device_register(indio_dev); + if (ret) + goto err_pm_put; + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return 0; + +err_pm_put: + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); + + return ret; } +static int stm32_dac_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + + pm_runtime_get_sync(&pdev->dev); + iio_device_unregister(indio_dev); + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); + + return 0; +} + +static int __maybe_unused stm32_dac_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + int channel = indio_dev->channels[0].channel; + int ret; + + /* Ensure DAC is disabled before suspend */ + ret = stm32_dac_is_enabled(indio_dev, channel); + if (ret) + return ret < 0 ? ret : -EBUSY; + + return pm_runtime_force_suspend(dev); +} + +static const struct dev_pm_ops stm32_dac_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(stm32_dac_suspend, pm_runtime_force_resume) +}; + static const struct of_device_id stm32_dac_of_match[] = { { .compatible = "st,stm32-dac", }, {}, @@ -307,9 +395,11 @@ MODULE_DEVICE_TABLE(of, stm32_dac_of_match); static struct platform_driver stm32_dac_driver = { .probe = stm32_dac_probe, + .remove = stm32_dac_remove, .driver = { .name = "stm32-dac", .of_match_table = stm32_dac_of_match, + .pm = &stm32_dac_pm_ops, }, }; module_platform_driver(stm32_dac_driver); diff --git a/drivers/iio/dac/vf610_dac.c b/drivers/iio/dac/vf610_dac.c index 0ec4d2609ef9..71f8a5c471c4 100644 --- a/drivers/iio/dac/vf610_dac.c +++ b/drivers/iio/dac/vf610_dac.c @@ -172,7 +172,6 @@ static int vf610_dac_probe(struct platform_device *pdev) { struct iio_dev *indio_dev; struct vf610_dac *info; - struct resource *mem; int ret; indio_dev = devm_iio_device_alloc(&pdev->dev, @@ -185,8 +184,7 @@ static int vf610_dac_probe(struct platform_device *pdev) info = iio_priv(indio_dev); info->dev = &pdev->dev; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - info->regs = devm_ioremap_resource(&pdev->dev, mem); + info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) return PTR_ERR(info->regs); diff --git a/drivers/iio/gyro/adis16080.c b/drivers/iio/gyro/adis16080.c index 236220d6de02..1b84b8e112fe 100644 --- a/drivers/iio/gyro/adis16080.c +++ b/drivers/iio/gyro/adis16080.c @@ -38,10 +38,12 @@ struct adis16080_chip_info { * @us: actual spi_device to write data * @info: chip specific parameters * @buf: transmit or receive buffer + * @lock lock to protect buffer during reads **/ struct adis16080_state { struct spi_device *us; const struct adis16080_chip_info *info; + struct mutex lock; __be16 buf ____cacheline_aligned; }; @@ -82,9 +84,9 @@ static int adis16080_read_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = adis16080_read_sample(indio_dev, chan->address, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: switch (chan->type) { @@ -196,6 +198,8 @@ static int adis16080_probe(struct spi_device *spi) /* this is only used for removal purposes */ spi_set_drvdata(spi, indio_dev); + mutex_init(&st->lock); + /* Allocate the comms buffers */ st->us = spi; st->info = &adis16080_chip_info[id->driver_data]; diff --git a/drivers/iio/gyro/adis16130.c b/drivers/iio/gyro/adis16130.c index de3f66f89496..79e63c8a2ea8 100644 --- a/drivers/iio/gyro/adis16130.c +++ b/drivers/iio/gyro/adis16130.c @@ -76,9 +76,7 @@ static int adis16130_read_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: /* Take the iio_dev status lock */ - mutex_lock(&indio_dev->mlock); ret = adis16130_spi_read(indio_dev, chan->address, &temp); - mutex_unlock(&indio_dev->mlock); if (ret) return ret; *val = temp; diff --git a/drivers/iio/gyro/adis16136.c b/drivers/iio/gyro/adis16136.c index 5bec7ad53d8b..d637d52d051a 100644 --- a/drivers/iio/gyro/adis16136.c +++ b/drivers/iio/gyro/adis16136.c @@ -80,19 +80,19 @@ static ssize_t adis16136_show_serial(struct file *file, ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SERIAL_NUM, &serial); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT1, &lot1); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT2, &lot2); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_LOT3, &lot3); - if (ret < 0) + if (ret) return ret; len = snprintf(buf, sizeof(buf), "%.4x%.4x%.4x-%.4x\n", lot1, lot2, @@ -116,7 +116,7 @@ static int adis16136_show_product_id(void *arg, u64 *val) ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_PROD_ID, &prod_id); - if (ret < 0) + if (ret) return ret; *val = prod_id; @@ -134,7 +134,7 @@ static int adis16136_show_flash_count(void *arg, u64 *val) ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_FLASH_CNT, &flash_count); - if (ret < 0) + if (ret) return ret; *val = flash_count; @@ -191,7 +191,7 @@ static int adis16136_get_freq(struct adis16136 *adis16136, unsigned int *freq) int ret; ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_SMPL_PRD, &t); - if (ret < 0) + if (ret) return ret; *freq = 32768 / (t + 1); @@ -228,7 +228,7 @@ static ssize_t adis16136_read_frequency(struct device *dev, int ret; ret = adis16136_get_freq(adis16136, &freq); - if (ret < 0) + if (ret) return ret; return sprintf(buf, "%d\n", freq); @@ -256,7 +256,7 @@ static int adis16136_set_filter(struct iio_dev *indio_dev, int val) int i, ret; ret = adis16136_get_freq(adis16136, &freq); - if (ret < 0) + if (ret) return ret; for (i = ARRAY_SIZE(adis16136_3db_divisors) - 1; i >= 1; i--) { @@ -277,11 +277,11 @@ static int adis16136_get_filter(struct iio_dev *indio_dev, int *val) mutex_lock(&indio_dev->mlock); ret = adis_read_reg_16(&adis16136->adis, ADIS16136_REG_AVG_CNT, &val16); - if (ret < 0) + if (ret) goto err_unlock; ret = adis16136_get_freq(adis16136, &freq); - if (ret < 0) + if (ret) goto err_unlock; *val = freq / adis16136_3db_divisors[val16 & 0x07]; @@ -318,7 +318,7 @@ static int adis16136_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_CALIBBIAS: ret = adis_read_reg_32(&adis16136->adis, ADIS16136_REG_GYRO_OFF2, &val32); - if (ret < 0) + if (ret) return ret; *val = sign_extend32(val32, 31); diff --git a/drivers/iio/gyro/itg3200_core.c b/drivers/iio/gyro/itg3200_core.c index 998fb8d66fe3..981ae2291505 100644 --- a/drivers/iio/gyro/itg3200_core.c +++ b/drivers/iio/gyro/itg3200_core.c @@ -154,7 +154,7 @@ static int itg3200_write_raw(struct iio_dev *indio_dev, t); mutex_unlock(&indio_dev->mlock); - return ret; + return ret; default: return -EINVAL; diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c index 80154bca18b6..8e908a749f95 100644 --- a/drivers/iio/gyro/mpu3050-core.c +++ b/drivers/iio/gyro/mpu3050-core.c @@ -543,7 +543,7 @@ static irqreturn_t mpu3050_trigger_handler(int irq, void *p) toread = bytes_per_datum; offset = 1; /* Put in some dummy value */ - fifo_values[0] = 0xAAAA; + fifo_values[0] = cpu_to_be16(0xAAAA); } ret = regmap_bulk_read(mpu3050->map, diff --git a/drivers/iio/gyro/st_gyro_core.c b/drivers/iio/gyro/st_gyro_core.c index c0acbb5d2ffb..57be68b291fa 100644 --- a/drivers/iio/gyro/st_gyro_core.c +++ b/drivers/iio/gyro/st_gyro_core.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/humidity/hdc100x.c b/drivers/iio/humidity/hdc100x.c index bfe1cdb16846..963ff043eecf 100644 --- a/drivers/iio/humidity/hdc100x.c +++ b/drivers/iio/humidity/hdc100x.c @@ -278,31 +278,34 @@ static int hdc100x_buffer_postenable(struct iio_dev *indio_dev) struct hdc100x_data *data = iio_priv(indio_dev); int ret; + ret = iio_triggered_buffer_postenable(indio_dev); + if (ret) + return ret; + /* Buffer is enabled. First set ACQ Mode, then attach poll func */ mutex_lock(&data->lock); ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, HDC100X_REG_CONFIG_ACQ_MODE); mutex_unlock(&data->lock); if (ret) - return ret; + iio_triggered_buffer_predisable(indio_dev); - return iio_triggered_buffer_postenable(indio_dev); + return ret; } static int hdc100x_buffer_predisable(struct iio_dev *indio_dev) { struct hdc100x_data *data = iio_priv(indio_dev); - int ret; - - /* First detach poll func, then reset ACQ mode. OK to disable buffer */ - ret = iio_triggered_buffer_predisable(indio_dev); - if (ret) - return ret; + int ret, ret2; mutex_lock(&data->lock); ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0); mutex_unlock(&data->lock); + ret2 = iio_triggered_buffer_predisable(indio_dev); + if (ret == 0) + ret = ret2; + return ret; } diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig index f3c7282321a8..60bb1029e759 100644 --- a/drivers/iio/imu/Kconfig +++ b/drivers/iio/imu/Kconfig @@ -40,6 +40,33 @@ config ADIS16480 source "drivers/iio/imu/bmi160/Kconfig" +config FXOS8700 + tristate + +config FXOS8700_I2C + tristate "NXP FXOS8700 I2C driver" + depends on I2C + select FXOS8700 + select REGMAP_I2C + help + Say yes here to build support for the NXP FXOS8700 m+g combo + sensor on I2C. + + This driver can also be built as a module. If so, the module will be + called fxos8700_i2c. + +config FXOS8700_SPI + tristate "NXP FXOS8700 SPI driver" + depends on SPI + select FXOS8700 + select REGMAP_SPI + help + Say yes here to build support for the NXP FXOS8700 m+g combo + sensor on SPI. + + This driver can also be built as a module. If so, the module will be + called fxos8700_spi. + config KMX61 tristate "Kionix KMX61 6-axis accelerometer and magnetometer" depends on I2C diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile index 4a6958865504..5237fd4bc384 100644 --- a/drivers/iio/imu/Makefile +++ b/drivers/iio/imu/Makefile @@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o obj-y += bmi160/ + +obj-$(CONFIG_FXOS8700) += fxos8700_core.o +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o + obj-y += inv_mpu6050/ obj-$(CONFIG_KMX61) += kmx61.o diff --git a/drivers/iio/imu/adis.c b/drivers/iio/imu/adis.c index 2cd2cc2316c6..e14c8536fd09 100644 --- a/drivers/iio/imu/adis.c +++ b/drivers/iio/imu/adis.c @@ -229,7 +229,8 @@ int adis_debugfs_reg_access(struct iio_dev *indio_dev, int ret; ret = adis_read_reg_16(adis, reg, &val16); - *readval = val16; + if (ret == 0) + *readval = val16; return ret; } else { @@ -286,7 +287,7 @@ int adis_check_status(struct adis *adis) int i; ret = adis_read_reg_16(adis, adis->data->diag_stat_reg, &status); - if (ret < 0) + if (ret) return ret; status &= adis->data->status_error_mask; diff --git a/drivers/iio/imu/adis16400.c b/drivers/iio/imu/adis16400.c index 0575ff706bd4..44e46dc96e00 100644 --- a/drivers/iio/imu/adis16400.c +++ b/drivers/iio/imu/adis16400.c @@ -217,16 +217,16 @@ static ssize_t adis16400_show_serial_number(struct file *file, int ret; ret = adis_read_reg_16(&st->adis, ADIS16334_LOT_ID1, &lot1); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&st->adis, ADIS16334_LOT_ID2, &lot2); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&st->adis, ADIS16334_SERIAL_NUMBER, &serial_number); - if (ret < 0) + if (ret) return ret; len = snprintf(buf, sizeof(buf), "%.4x-%.4x-%.4x\n", lot1, lot2, @@ -249,7 +249,7 @@ static int adis16400_show_product_id(void *arg, u64 *val) int ret; ret = adis_read_reg_16(&st->adis, ADIS16400_PRODUCT_ID, &prod_id); - if (ret < 0) + if (ret) return ret; *val = prod_id; @@ -266,7 +266,7 @@ static int adis16400_show_flash_count(void *arg, u64 *val) int ret; ret = adis_read_reg_16(&st->adis, ADIS16400_FLASH_CNT, &flash_count); - if (ret < 0) + if (ret) return ret; *val = flash_count; @@ -327,7 +327,7 @@ static int adis16334_get_freq(struct adis16400_state *st) uint16_t t; ret = adis_read_reg_16(&st->adis, ADIS16400_SMPL_PRD, &t); - if (ret < 0) + if (ret) return ret; t >>= ADIS16334_RATE_DIV_SHIFT; @@ -359,7 +359,7 @@ static int adis16400_get_freq(struct adis16400_state *st) uint16_t t; ret = adis_read_reg_16(&st->adis, ADIS16400_SMPL_PRD, &t); - if (ret < 0) + if (ret) return ret; sps = (t & ADIS16400_SMPL_PRD_TIME_BASE) ? 52851 : 1638404; @@ -416,7 +416,7 @@ static int adis16400_set_filter(struct iio_dev *indio_dev, int sps, int val) } ret = adis_read_reg_16(&st->adis, ADIS16400_SENS_AVG, &val16); - if (ret < 0) + if (ret) return ret; ret = adis_write_reg_16(&st->adis, ADIS16400_SENS_AVG, @@ -615,7 +615,7 @@ static int adis16400_read_raw(struct iio_dev *indio_dev, ret = adis_read_reg_16(&st->adis, ADIS16400_SENS_AVG, &val16); - if (ret < 0) { + if (ret) { mutex_unlock(&indio_dev->mlock); return ret; } @@ -626,12 +626,12 @@ static int adis16400_read_raw(struct iio_dev *indio_dev, *val2 = (ret % 1000) * 1000; } mutex_unlock(&indio_dev->mlock); - if (ret < 0) + if (ret) return ret; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: ret = st->variant->get_freq(st); - if (ret < 0) + if (ret) return ret; *val = ret / 1000; *val2 = (ret % 1000) * 1000; diff --git a/drivers/iio/imu/adis16460.c b/drivers/iio/imu/adis16460.c index 6aed9e84abbf..b55812521537 100644 --- a/drivers/iio/imu/adis16460.c +++ b/drivers/iio/imu/adis16460.c @@ -80,7 +80,7 @@ static int adis16460_show_serial_number(void *arg, u64 *val) ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_SERIAL_NUM, &serial); - if (ret < 0) + if (ret) return ret; *val = serial; @@ -98,7 +98,7 @@ static int adis16460_show_product_id(void *arg, u64 *val) ret = adis_read_reg_16(&adis16460->adis, ADIS16460_REG_PROD_ID, &prod_id); - if (ret < 0) + if (ret) return ret; *val = prod_id; @@ -116,7 +116,7 @@ static int adis16460_show_flash_count(void *arg, u64 *val) ret = adis_read_reg_32(&adis16460->adis, ADIS16460_REG_FLASH_CNT, &flash_count); - if (ret < 0) + if (ret) return ret; *val = flash_count; @@ -176,7 +176,7 @@ static int adis16460_get_freq(struct iio_dev *indio_dev, int *val, int *val2) unsigned int freq; ret = adis_read_reg_16(&st->adis, ADIS16460_REG_DEC_RATE, &t); - if (ret < 0) + if (ret) return ret; freq = 2048000 / (t + 1); diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c index 8743b2f376e2..748f8bbf184d 100644 --- a/drivers/iio/imu/adis16480.c +++ b/drivers/iio/imu/adis16480.c @@ -181,7 +181,7 @@ static ssize_t adis16480_show_firmware_revision(struct file *file, int ret; ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev); - if (ret < 0) + if (ret) return ret; len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff); @@ -206,11 +206,11 @@ static ssize_t adis16480_show_firmware_date(struct file *file, int ret; ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year); - if (ret < 0) + if (ret) return ret; ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md); - if (ret < 0) + if (ret) return ret; len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", @@ -234,7 +234,7 @@ static int adis16480_show_serial_number(void *arg, u64 *val) ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM, &serial); - if (ret < 0) + if (ret) return ret; *val = serial; @@ -252,7 +252,7 @@ static int adis16480_show_product_id(void *arg, u64 *val) ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID, &prod_id); - if (ret < 0) + if (ret) return ret; *val = prod_id; @@ -270,7 +270,7 @@ static int adis16480_show_flash_count(void *arg, u64 *val) ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT, &flash_count); - if (ret < 0) + if (ret) return ret; *val = flash_count; @@ -353,7 +353,7 @@ static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2) struct adis16480 *st = iio_priv(indio_dev); uint16_t t; int ret; - unsigned freq; + unsigned int freq; unsigned int reg; if (st->clk_mode == ADIS16480_CLK_PPS) @@ -362,7 +362,7 @@ static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2) reg = ADIS16480_REG_DEC_RATE; ret = adis_read_reg_16(&st->adis, reg, &t); - if (ret < 0) + if (ret) return ret; /* @@ -454,18 +454,20 @@ static int adis16480_get_calibbias(struct iio_dev *indio_dev, case IIO_MAGN: case IIO_PRESSURE: ret = adis_read_reg_16(&st->adis, reg, &val16); - *bias = sign_extend32(val16, 15); + if (ret == 0) + *bias = sign_extend32(val16, 15); break; case IIO_ANGL_VEL: case IIO_ACCEL: ret = adis_read_reg_32(&st->adis, reg, &val32); - *bias = sign_extend32(val32, 31); + if (ret == 0) + *bias = sign_extend32(val32, 31); break; default: - ret = -EINVAL; + ret = -EINVAL; } - if (ret < 0) + if (ret) return ret; return IIO_VAL_INT; @@ -492,7 +494,7 @@ static int adis16480_get_calibscale(struct iio_dev *indio_dev, int ret; ret = adis_read_reg_16(&st->adis, reg, &val16); - if (ret < 0) + if (ret) return ret; *scale = sign_extend32(val16, 15); @@ -538,7 +540,7 @@ static int adis16480_get_filter_freq(struct iio_dev *indio_dev, enable_mask = BIT(offset + 2); ret = adis_read_reg_16(&st->adis, reg, &val); - if (ret < 0) + if (ret) return ret; if (!(val & enable_mask)) @@ -564,7 +566,7 @@ static int adis16480_set_filter_freq(struct iio_dev *indio_dev, enable_mask = BIT(offset + 2); ret = adis_read_reg_16(&st->adis, reg, &val); - if (ret < 0) + if (ret) return ret; if (freq == 0) { @@ -623,9 +625,13 @@ static int adis16480_read_raw(struct iio_dev *indio_dev, *val2 = (st->chip_info->temp_scale % 1000) * 1000; return IIO_VAL_INT_PLUS_MICRO; case IIO_PRESSURE: - *val = 0; - *val2 = 4000; /* 40ubar = 0.004 kPa */ - return IIO_VAL_INT_PLUS_MICRO; + /* + * max scale is 1310 mbar + * max raw value is 32767 shifted for 32bits + */ + *val = 131; /* 1310mbar = 131 kPa */ + *val2 = 32767 << 16; + return IIO_VAL_FRACTIONAL; default: return -EINVAL; } @@ -786,13 +792,14 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), /* - * storing the value in rad/degree and the scale in degree - * gives us the result in rad and better precession than - * storing the scale directly in rad. + * Typically we do IIO_RAD_TO_DEGREE in the denominator, which + * is exactly the same as IIO_DEGREE_TO_RAD in numerator, since + * it gives better approximation. However, in this case we + * cannot do it since it would not fit in a 32bit variable. */ - .gyro_max_val = IIO_RAD_TO_DEGREE(22887), - .gyro_max_scale = 300, - .accel_max_val = IIO_M_S_2_TO_G(21973), + .gyro_max_val = 22887 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(300), + .accel_max_val = IIO_M_S_2_TO_G(21973 << 16), .accel_max_scale = 18, .temp_scale = 5650, /* 5.65 milli degree Celsius */ .int_clk = 2460000, @@ -802,9 +809,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16480] = { .channels = adis16480_channels, .num_channels = ARRAY_SIZE(adis16480_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(22500), - .gyro_max_scale = 450, - .accel_max_val = IIO_M_S_2_TO_G(12500), + .gyro_max_val = 22500 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(450), + .accel_max_val = IIO_M_S_2_TO_G(12500 << 16), .accel_max_scale = 10, .temp_scale = 5650, /* 5.65 milli degree Celsius */ .int_clk = 2460000, @@ -814,9 +821,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16485] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(22500), - .gyro_max_scale = 450, - .accel_max_val = IIO_M_S_2_TO_G(20000), + .gyro_max_val = 22500 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(450), + .accel_max_val = IIO_M_S_2_TO_G(20000 << 16), .accel_max_scale = 5, .temp_scale = 5650, /* 5.65 milli degree Celsius */ .int_clk = 2460000, @@ -826,9 +833,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16488] = { .channels = adis16480_channels, .num_channels = ARRAY_SIZE(adis16480_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(22500), - .gyro_max_scale = 450, - .accel_max_val = IIO_M_S_2_TO_G(22500), + .gyro_max_val = 22500 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(450), + .accel_max_val = IIO_M_S_2_TO_G(22500 << 16), .accel_max_scale = 18, .temp_scale = 5650, /* 5.65 milli degree Celsius */ .int_clk = 2460000, @@ -838,9 +845,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16495_1] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(20000), - .gyro_max_scale = 125, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 20000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(125), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 8, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -851,9 +858,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16495_2] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(18000), - .gyro_max_scale = 450, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 18000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(450), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 8, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -864,9 +871,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16495_3] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(20000), - .gyro_max_scale = 2000, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 20000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(2000), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 8, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -877,9 +884,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16497_1] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(20000), - .gyro_max_scale = 125, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 20000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(125), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 40, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -890,9 +897,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16497_2] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(18000), - .gyro_max_scale = 450, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 18000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(450), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 40, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -903,9 +910,9 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { [ADIS16497_3] = { .channels = adis16485_channels, .num_channels = ARRAY_SIZE(adis16485_channels), - .gyro_max_val = IIO_RAD_TO_DEGREE(20000), - .gyro_max_scale = 2000, - .accel_max_val = IIO_M_S_2_TO_G(32000), + .gyro_max_val = 20000 << 16, + .gyro_max_scale = IIO_DEGREE_TO_RAD(2000), + .accel_max_val = IIO_M_S_2_TO_G(32000 << 16), .accel_max_scale = 40, .temp_scale = 12500, /* 12.5 milli degree Celsius */ .int_clk = 4250000, @@ -919,6 +926,7 @@ static const struct iio_info adis16480_info = { .read_raw = &adis16480_read_raw, .write_raw = &adis16480_write_raw, .update_scan_mode = adis_update_scan_mode, + .debugfs_reg_access = adis_debugfs_reg_access, }; static int adis16480_stop_device(struct iio_dev *indio_dev) @@ -940,7 +948,7 @@ static int adis16480_enable_irq(struct adis *adis, bool enable) int ret; ret = adis_read_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL, &val); - if (ret < 0) + if (ret) return ret; val &= ~ADIS16480_DRDY_EN_MSK; @@ -1118,7 +1126,7 @@ static int adis16480_ext_clk_config(struct adis16480 *st, int ret; ret = adis_read_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, &val); - if (ret < 0) + if (ret) return ret; pin = adis16480_of_get_ext_clk_pin(st, of_node); @@ -1144,7 +1152,7 @@ static int adis16480_ext_clk_config(struct adis16480 *st, val |= mode; ret = adis_write_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, val); - if (ret < 0) + if (ret) return ret; return clk_prepare_enable(st->ext_clk); diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h new file mode 100644 index 000000000000..6dfb8d7099e4 --- /dev/null +++ b/drivers/iio/imu/fxos8700.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef FXOS8700_H_ +#define FXOS8700_H_ + +extern const struct regmap_config fxos8700_regmap_config; + +int fxos8700_core_probe(struct device *dev, struct regmap *regmap, + const char *name, bool use_spi); + +#endif /* FXOS8700_H_ */ diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c new file mode 100644 index 000000000000..7b47be44ea59 --- /dev/null +++ b/drivers/iio/imu/fxos8700_core.c @@ -0,0 +1,649 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * FXOS8700 - NXP IMU (accelerometer plus magnetometer) + * + * IIO core driver for FXOS8700, with support for I2C/SPI busses + * + * TODO: Buffer, trigger, and IRQ support + */ +#include +#include +#include +#include + +#include +#include + +#include "fxos8700.h" + +/* Register Definitions */ +#define FXOS8700_STATUS 0x00 +#define FXOS8700_OUT_X_MSB 0x01 +#define FXOS8700_OUT_X_LSB 0x02 +#define FXOS8700_OUT_Y_MSB 0x03 +#define FXOS8700_OUT_Y_LSB 0x04 +#define FXOS8700_OUT_Z_MSB 0x05 +#define FXOS8700_OUT_Z_LSB 0x06 +#define FXOS8700_F_SETUP 0x09 +#define FXOS8700_TRIG_CFG 0x0a +#define FXOS8700_SYSMOD 0x0b +#define FXOS8700_INT_SOURCE 0x0c +#define FXOS8700_WHO_AM_I 0x0d +#define FXOS8700_XYZ_DATA_CFG 0x0e +#define FXOS8700_HP_FILTER_CUTOFF 0x0f +#define FXOS8700_PL_STATUS 0x10 +#define FXOS8700_PL_CFG 0x11 +#define FXOS8700_PL_COUNT 0x12 +#define FXOS8700_PL_BF_ZCOMP 0x13 +#define FXOS8700_PL_THS_REG 0x14 +#define FXOS8700_A_FFMT_CFG 0x15 +#define FXOS8700_A_FFMT_SRC 0x16 +#define FXOS8700_A_FFMT_THS 0x17 +#define FXOS8700_A_FFMT_COUNT 0x18 +#define FXOS8700_TRANSIENT_CFG 0x1d +#define FXOS8700_TRANSIENT_SRC 0x1e +#define FXOS8700_TRANSIENT_THS 0x1f +#define FXOS8700_TRANSIENT_COUNT 0x20 +#define FXOS8700_PULSE_CFG 0x21 +#define FXOS8700_PULSE_SRC 0x22 +#define FXOS8700_PULSE_THSX 0x23 +#define FXOS8700_PULSE_THSY 0x24 +#define FXOS8700_PULSE_THSZ 0x25 +#define FXOS8700_PULSE_TMLT 0x26 +#define FXOS8700_PULSE_LTCY 0x27 +#define FXOS8700_PULSE_WIND 0x28 +#define FXOS8700_ASLP_COUNT 0x29 +#define FXOS8700_CTRL_REG1 0x2a +#define FXOS8700_CTRL_REG2 0x2b +#define FXOS8700_CTRL_REG3 0x2c +#define FXOS8700_CTRL_REG4 0x2d +#define FXOS8700_CTRL_REG5 0x2e +#define FXOS8700_OFF_X 0x2f +#define FXOS8700_OFF_Y 0x30 +#define FXOS8700_OFF_Z 0x31 +#define FXOS8700_M_DR_STATUS 0x32 +#define FXOS8700_M_OUT_X_MSB 0x33 +#define FXOS8700_M_OUT_X_LSB 0x34 +#define FXOS8700_M_OUT_Y_MSB 0x35 +#define FXOS8700_M_OUT_Y_LSB 0x36 +#define FXOS8700_M_OUT_Z_MSB 0x37 +#define FXOS8700_M_OUT_Z_LSB 0x38 +#define FXOS8700_CMP_X_MSB 0x39 +#define FXOS8700_CMP_X_LSB 0x3a +#define FXOS8700_CMP_Y_MSB 0x3b +#define FXOS8700_CMP_Y_LSB 0x3c +#define FXOS8700_CMP_Z_MSB 0x3d +#define FXOS8700_CMP_Z_LSB 0x3e +#define FXOS8700_M_OFF_X_MSB 0x3f +#define FXOS8700_M_OFF_X_LSB 0x40 +#define FXOS8700_M_OFF_Y_MSB 0x41 +#define FXOS8700_M_OFF_Y_LSB 0x42 +#define FXOS8700_M_OFF_Z_MSB 0x43 +#define FXOS8700_M_OFF_Z_LSB 0x44 +#define FXOS8700_MAX_X_MSB 0x45 +#define FXOS8700_MAX_X_LSB 0x46 +#define FXOS8700_MAX_Y_MSB 0x47 +#define FXOS8700_MAX_Y_LSB 0x48 +#define FXOS8700_MAX_Z_MSB 0x49 +#define FXOS8700_MAX_Z_LSB 0x4a +#define FXOS8700_MIN_X_MSB 0x4b +#define FXOS8700_MIN_X_LSB 0x4c +#define FXOS8700_MIN_Y_MSB 0x4d +#define FXOS8700_MIN_Y_LSB 0x4e +#define FXOS8700_MIN_Z_MSB 0x4f +#define FXOS8700_MIN_Z_LSB 0x50 +#define FXOS8700_TEMP 0x51 +#define FXOS8700_M_THS_CFG 0x52 +#define FXOS8700_M_THS_SRC 0x53 +#define FXOS8700_M_THS_X_MSB 0x54 +#define FXOS8700_M_THS_X_LSB 0x55 +#define FXOS8700_M_THS_Y_MSB 0x56 +#define FXOS8700_M_THS_Y_LSB 0x57 +#define FXOS8700_M_THS_Z_MSB 0x58 +#define FXOS8700_M_THS_Z_LSB 0x59 +#define FXOS8700_M_THS_COUNT 0x5a +#define FXOS8700_M_CTRL_REG1 0x5b +#define FXOS8700_M_CTRL_REG2 0x5c +#define FXOS8700_M_CTRL_REG3 0x5d +#define FXOS8700_M_INT_SRC 0x5e +#define FXOS8700_A_VECM_CFG 0x5f +#define FXOS8700_A_VECM_THS_MSB 0x60 +#define FXOS8700_A_VECM_THS_LSB 0x61 +#define FXOS8700_A_VECM_CNT 0x62 +#define FXOS8700_A_VECM_INITX_MSB 0x63 +#define FXOS8700_A_VECM_INITX_LSB 0x64 +#define FXOS8700_A_VECM_INITY_MSB 0x65 +#define FXOS8700_A_VECM_INITY_LSB 0x66 +#define FXOS8700_A_VECM_INITZ_MSB 0x67 +#define FXOS8700_A_VECM_INITZ_LSB 0x68 +#define FXOS8700_M_VECM_CFG 0x69 +#define FXOS8700_M_VECM_THS_MSB 0x6a +#define FXOS8700_M_VECM_THS_LSB 0x6b +#define FXOS8700_M_VECM_CNT 0x6c +#define FXOS8700_M_VECM_INITX_MSB 0x6d +#define FXOS8700_M_VECM_INITX_LSB 0x6e +#define FXOS8700_M_VECM_INITY_MSB 0x6f +#define FXOS8700_M_VECM_INITY_LSB 0x70 +#define FXOS8700_M_VECM_INITZ_MSB 0x71 +#define FXOS8700_M_VECM_INITZ_LSB 0x72 +#define FXOS8700_A_FFMT_THS_X_MSB 0x73 +#define FXOS8700_A_FFMT_THS_X_LSB 0x74 +#define FXOS8700_A_FFMT_THS_Y_MSB 0x75 +#define FXOS8700_A_FFMT_THS_Y_LSB 0x76 +#define FXOS8700_A_FFMT_THS_Z_MSB 0x77 +#define FXOS8700_A_FFMT_THS_Z_LSB 0x78 +#define FXOS8700_A_TRAN_INIT_MSB 0x79 +#define FXOS8700_A_TRAN_INIT_LSB_X 0x7a +#define FXOS8700_A_TRAN_INIT_LSB_Y 0x7b +#define FXOS8700_A_TRAN_INIT_LSB_Z 0x7d +#define FXOS8700_TM_NVM_LOCK 0x7e +#define FXOS8700_NVM_DATA0_35 0x80 +#define FXOS8700_NVM_DATA_BNK3 0xa4 +#define FXOS8700_NVM_DATA_BNK2 0xa5 +#define FXOS8700_NVM_DATA_BNK1 0xa6 +#define FXOS8700_NVM_DATA_BNK0 0xa7 + +/* Bit definitions for FXOS8700_CTRL_REG1 */ +#define FXOS8700_CTRL_ODR_MSK 0x38 +#define FXOS8700_CTRL_ODR_MAX 0x00 +#define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3) + +/* Bit definitions for FXOS8700_M_CTRL_REG1 */ +#define FXOS8700_HMS_MASK GENMASK(1, 0) +#define FXOS8700_OS_MASK GENMASK(4, 2) + +/* Bit definitions for FXOS8700_M_CTRL_REG2 */ +#define FXOS8700_MAXMIN_RST BIT(2) +#define FXOS8700_MAXMIN_DIS_THS BIT(3) +#define FXOS8700_MAXMIN_DIS BIT(4) + +#define FXOS8700_ACTIVE 0x01 +#define FXOS8700_ACTIVE_MIN_USLEEP 4000 /* from table 6 in datasheet */ + +#define FXOS8700_DEVICE_ID 0xC7 +#define FXOS8700_PRE_DEVICE_ID 0xC4 +#define FXOS8700_DATA_BUF_SIZE 3 + +struct fxos8700_data { + struct regmap *regmap; + struct iio_trigger *trig; + __be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned; +}; + +/* Regmap info */ +static const struct regmap_range read_range[] = { + { + .range_min = FXOS8700_STATUS, + .range_max = FXOS8700_A_FFMT_COUNT, + }, { + .range_min = FXOS8700_TRANSIENT_CFG, + .range_max = FXOS8700_A_FFMT_THS_Z_LSB, + }, +}; + +static const struct regmap_range write_range[] = { + { + .range_min = FXOS8700_F_SETUP, + .range_max = FXOS8700_TRIG_CFG, + }, { + .range_min = FXOS8700_XYZ_DATA_CFG, + .range_max = FXOS8700_HP_FILTER_CUTOFF, + }, { + .range_min = FXOS8700_PL_CFG, + .range_max = FXOS8700_A_FFMT_CFG, + }, { + .range_min = FXOS8700_A_FFMT_THS, + .range_max = FXOS8700_TRANSIENT_CFG, + }, { + .range_min = FXOS8700_TRANSIENT_THS, + .range_max = FXOS8700_PULSE_CFG, + }, { + .range_min = FXOS8700_PULSE_THSX, + .range_max = FXOS8700_OFF_Z, + }, { + .range_min = FXOS8700_M_OFF_X_MSB, + .range_max = FXOS8700_M_OFF_Z_LSB, + }, { + .range_min = FXOS8700_M_THS_CFG, + .range_max = FXOS8700_M_THS_CFG, + }, { + .range_min = FXOS8700_M_THS_X_MSB, + .range_max = FXOS8700_M_CTRL_REG3, + }, { + .range_min = FXOS8700_A_VECM_CFG, + .range_max = FXOS8700_A_FFMT_THS_Z_LSB, + }, +}; + +static const struct regmap_access_table driver_read_table = { + .yes_ranges = read_range, + .n_yes_ranges = ARRAY_SIZE(read_range), +}; + +static const struct regmap_access_table driver_write_table = { + .yes_ranges = write_range, + .n_yes_ranges = ARRAY_SIZE(write_range), +}; + +const struct regmap_config fxos8700_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = FXOS8700_NVM_DATA_BNK0, + .rd_table = &driver_read_table, + .wr_table = &driver_write_table, +}; +EXPORT_SYMBOL(fxos8700_regmap_config); + +#define FXOS8700_CHANNEL(_type, _axis) { \ + .type = _type, \ + .modified = 1, \ + .channel2 = IIO_MOD_##_axis, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ +} + +enum fxos8700_accel_scale_bits { + MODE_2G = 0, + MODE_4G, + MODE_8G, +}; + +/* scan indexes follow DATA register order */ +enum fxos8700_scan_axis { + FXOS8700_SCAN_ACCEL_X = 0, + FXOS8700_SCAN_ACCEL_Y, + FXOS8700_SCAN_ACCEL_Z, + FXOS8700_SCAN_MAGN_X, + FXOS8700_SCAN_MAGN_Y, + FXOS8700_SCAN_MAGN_Z, + FXOS8700_SCAN_RHALL, + FXOS8700_SCAN_TIMESTAMP, +}; + +enum fxos8700_sensor { + FXOS8700_ACCEL = 0, + FXOS8700_MAGN, + FXOS8700_NUM_SENSORS /* must be last */ +}; + +enum fxos8700_int_pin { + FXOS8700_PIN_INT1, + FXOS8700_PIN_INT2 +}; + +struct fxos8700_scale { + u8 bits; + int uscale; +}; + +struct fxos8700_odr { + u8 bits; + int odr; + int uodr; +}; + +static const struct fxos8700_scale fxos8700_accel_scale[] = { + { MODE_2G, 244}, + { MODE_4G, 488}, + { MODE_8G, 976}, +}; + +/* + * Accellerometer and magnetometer have the same ODR options, set in the + * CTRL_REG1 register. ODR is halved when using both sensors at once in + * hybrid mode. + */ +static const struct fxos8700_odr fxos8700_odr[] = { + {0x00, 800, 0}, + {0x01, 400, 0}, + {0x02, 200, 0}, + {0x03, 100, 0}, + {0x04, 50, 0}, + {0x05, 12, 500000}, + {0x06, 6, 250000}, + {0x07, 1, 562500}, +}; + +static const struct iio_chan_spec fxos8700_channels[] = { + FXOS8700_CHANNEL(IIO_ACCEL, X), + FXOS8700_CHANNEL(IIO_ACCEL, Y), + FXOS8700_CHANNEL(IIO_ACCEL, Z), + FXOS8700_CHANNEL(IIO_MAGN, X), + FXOS8700_CHANNEL(IIO_MAGN, Y), + FXOS8700_CHANNEL(IIO_MAGN, Z), + IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP), +}; + +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type) +{ + switch (iio_type) { + case IIO_ACCEL: + return FXOS8700_ACCEL; + case IIO_ANGL_VEL: + return FXOS8700_MAGN; + default: + return -EINVAL; + } +} + +static int fxos8700_set_active_mode(struct fxos8700_data *data, + enum fxos8700_sensor t, bool mode) +{ + int ret; + + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode); + if (ret) + return ret; + + usleep_range(FXOS8700_ACTIVE_MIN_USLEEP, + FXOS8700_ACTIVE_MIN_USLEEP + 1000); + + return 0; +} + +static int fxos8700_set_scale(struct fxos8700_data *data, + enum fxos8700_sensor t, int uscale) +{ + int i; + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale); + struct device *dev = regmap_get_device(data->regmap); + + if (t == FXOS8700_MAGN) { + dev_err(dev, "Magnetometer scale is locked at 1200uT\n"); + return -EINVAL; + } + + for (i = 0; i < scale_num; i++) + if (fxos8700_accel_scale[i].uscale == uscale) + break; + + if (i == scale_num) + return -EINVAL; + + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, + fxos8700_accel_scale[i].bits); +} + +static int fxos8700_get_scale(struct fxos8700_data *data, + enum fxos8700_sensor t, int *uscale) +{ + int i, ret, val; + static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale); + + if (t == FXOS8700_MAGN) { + *uscale = 1200; /* Magnetometer is locked at 1200uT */ + return 0; + } + + ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val); + if (ret) + return ret; + + for (i = 0; i < scale_num; i++) { + if (fxos8700_accel_scale[i].bits == (val & 0x3)) { + *uscale = fxos8700_accel_scale[i].uscale; + return 0; + } + } + + return -EINVAL; +} + +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type, + int axis, int *val) +{ + u8 base, reg; + int ret; + enum fxos8700_sensor type = fxos8700_to_sensor(chan_type); + + base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB; + + /* Block read 6 bytes of device output registers to avoid data loss */ + ret = regmap_bulk_read(data->regmap, base, data->buf, + FXOS8700_DATA_BUF_SIZE); + if (ret) + return ret; + + /* Convert axis to buffer index */ + reg = axis - IIO_MOD_X; + + /* Convert to native endianness */ + *val = sign_extend32(be16_to_cpu(data->buf[reg]), 15); + + return 0; +} + +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t, + int odr, int uodr) +{ + int i, ret, val; + bool active_mode; + static const int odr_num = ARRAY_SIZE(fxos8700_odr); + + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val); + if (ret) + return ret; + + active_mode = val & FXOS8700_ACTIVE; + + if (active_mode) { + /* + * The device must be in standby mode to change any of the + * other fields within CTRL_REG1 + */ + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, + val & ~FXOS8700_ACTIVE); + if (ret) + return ret; + } + + for (i = 0; i < odr_num; i++) + if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr) + break; + + if (i >= odr_num) + return -EINVAL; + + return regmap_update_bits(data->regmap, + FXOS8700_CTRL_REG1, + FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE, + fxos8700_odr[i].bits << 3 | active_mode); +} + +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, + int *odr, int *uodr) +{ + int i, val, ret; + static const int odr_num = ARRAY_SIZE(fxos8700_odr); + + ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val); + if (ret) + return ret; + + val &= FXOS8700_CTRL_ODR_MSK; + + for (i = 0; i < odr_num; i++) + if (val == fxos8700_odr[i].bits) + break; + + if (i >= odr_num) + return -EINVAL; + + *odr = fxos8700_odr[i].odr; + *uodr = fxos8700_odr[i].uodr; + + return 0; +} + +static int fxos8700_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + int ret; + struct fxos8700_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = fxos8700_get_data(data, chan->type, chan->channel2, val); + if (ret) + return ret; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val = 0; + ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type), + val2); + return ret ? ret : IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_SAMP_FREQ: + ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type), + val, val2); + return ret ? ret : IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } +} + +static int fxos8700_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct fxos8700_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_SCALE: + return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type), + val2); + case IIO_CHAN_INFO_SAMP_FREQ: + return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type), + val, val2); + default: + return -EINVAL; + } +} + +static IIO_CONST_ATTR(in_accel_sampling_frequency_available, + "1.5625 6.25 12.5 50 100 200 400 800"); +static IIO_CONST_ATTR(in_magn_sampling_frequency_available, + "1.5625 6.25 12.5 50 100 200 400 800"); +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976"); +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200"); + +static struct attribute *fxos8700_attrs[] = { + &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr, + &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr, + &iio_const_attr_in_accel_scale_available.dev_attr.attr, + &iio_const_attr_in_magn_scale_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group fxos8700_attrs_group = { + .attrs = fxos8700_attrs, +}; + +static const struct iio_info fxos8700_info = { + .read_raw = fxos8700_read_raw, + .write_raw = fxos8700_write_raw, + .attrs = &fxos8700_attrs_group, +}; + +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi) +{ + int ret; + unsigned int val; + struct device *dev = regmap_get_device(data->regmap); + + ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val); + if (ret) { + dev_err(dev, "Error reading chip id\n"); + return ret; + } + if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) { + dev_err(dev, "Wrong chip id, got %x expected %x or %x\n", + val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID); + return -ENODEV; + } + + ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true); + if (ret) + return ret; + + ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true); + if (ret) + return ret; + + /* + * The device must be in standby mode to change any of the other fields + * within CTRL_REG1 + */ + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00); + if (ret) + return ret; + + /* Set max oversample ratio (OSR) and both devices active */ + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1, + FXOS8700_HMS_MASK | FXOS8700_OS_MASK); + if (ret) + return ret; + + /* Disable and rst min/max measurements & threshold */ + ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2, + FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS | + FXOS8700_MAXMIN_DIS); + if (ret) + return ret; + + /* Max ODR (800Hz individual or 400Hz hybrid), active mode */ + ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, + FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE); + if (ret) + return ret; + + /* Set for max full-scale range (+/-8G) */ + return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G); +} + +static void fxos8700_chip_uninit(void *data) +{ + struct fxos8700_data *fxos8700_data = data; + + fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false); + fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false); +} + +int fxos8700_core_probe(struct device *dev, struct regmap *regmap, + const char *name, bool use_spi) +{ + struct iio_dev *indio_dev; + struct fxos8700_data *data; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + data = iio_priv(indio_dev); + dev_set_drvdata(dev, indio_dev); + data->regmap = regmap; + + ret = fxos8700_chip_init(data, use_spi); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data); + if (ret) + return ret; + + indio_dev->dev.parent = dev; + indio_dev->channels = fxos8700_channels; + indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels); + indio_dev->name = name ? name : "fxos8700"; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &fxos8700_info; + + return devm_iio_device_register(dev, indio_dev); +} +EXPORT_SYMBOL_GPL(fxos8700_core_probe); + +MODULE_AUTHOR("Robert Jones "); +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c new file mode 100644 index 000000000000..3ceb76366313 --- /dev/null +++ b/drivers/iio/imu/fxos8700_i2c.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * FXOS8700 - NXP IMU, I2C bits + * + * 7-bit I2C slave address determined by SA1 and SA0 logic level + * inputs represented in the following table: + * SA1 | SA0 | Slave Address + * 0 | 0 | 0x1E + * 0 | 1 | 0x1D + * 1 | 0 | 0x1C + * 1 | 1 | 0x1F + */ +#include +#include +#include +#include +#include + +#include "fxos8700.h" + +static int fxos8700_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct regmap *regmap; + const char *name = NULL; + + regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&client->dev, "Failed to register i2c regmap %d\n", + (int)PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + + if (id) + name = id->name; + + return fxos8700_core_probe(&client->dev, regmap, name, false); +} + +static const struct i2c_device_id fxos8700_i2c_id[] = { + {"fxos8700", 0}, + { } +}; +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id); + +static const struct acpi_device_id fxos8700_acpi_match[] = { + {"FXOS8700", 0}, + { } +}; +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match); + +static const struct of_device_id fxos8700_of_match[] = { + { .compatible = "nxp,fxos8700" }, + { } +}; +MODULE_DEVICE_TABLE(of, fxos8700_of_match); + +static struct i2c_driver fxos8700_i2c_driver = { + .driver = { + .name = "fxos8700_i2c", + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match), + .of_match_table = fxos8700_of_match, + }, + .probe = fxos8700_i2c_probe, + .id_table = fxos8700_i2c_id, +}; +module_i2c_driver(fxos8700_i2c_driver); + +MODULE_AUTHOR("Robert Jones "); +MODULE_DESCRIPTION("FXOS8700 I2C driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c new file mode 100644 index 000000000000..57e7bb6444e7 --- /dev/null +++ b/drivers/iio/imu/fxos8700_spi.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * FXOS8700 - NXP IMU, SPI bits + */ +#include +#include +#include +#include +#include + +#include "fxos8700.h" + +static int fxos8700_spi_probe(struct spi_device *spi) +{ + struct regmap *regmap; + const struct spi_device_id *id = spi_get_device_id(spi); + + regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&spi->dev, "Failed to register spi regmap %d\n", + (int)PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + + return fxos8700_core_probe(&spi->dev, regmap, id->name, true); +} + +static const struct spi_device_id fxos8700_spi_id[] = { + {"fxos8700", 0}, + { } +}; +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id); + +static const struct acpi_device_id fxos8700_acpi_match[] = { + {"FXOS8700", 0}, + { } +}; +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match); + +static const struct of_device_id fxos8700_of_match[] = { + { .compatible = "nxp,fxos8700" }, + { } +}; +MODULE_DEVICE_TABLE(of, fxos8700_of_match); + +static struct spi_driver fxos8700_spi_driver = { + .probe = fxos8700_spi_probe, + .id_table = fxos8700_spi_id, + .driver = { + .acpi_match_table = ACPI_PTR(fxos8700_acpi_match), + .of_match_table = fxos8700_of_match, + .name = "fxos8700_spi", + }, +}; +module_spi_driver(fxos8700_spi_driver); + +MODULE_AUTHOR("Robert Jones "); +MODULE_DESCRIPTION("FXOS8700 SPI driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/imu/inv_mpu6050/Makefile b/drivers/iio/imu/inv_mpu6050/Makefile index 70ffe0d13d8c..c103441a906b 100644 --- a/drivers/iio/imu/inv_mpu6050/Makefile +++ b/drivers/iio/imu/inv_mpu6050/Makefile @@ -4,10 +4,11 @@ # obj-$(CONFIG_INV_MPU6050_IIO) += inv-mpu6050.o -inv-mpu6050-objs := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o +inv-mpu6050-y := inv_mpu_core.o inv_mpu_ring.o inv_mpu_trigger.o \ + inv_mpu_aux.o inv_mpu_magn.o obj-$(CONFIG_INV_MPU6050_I2C) += inv-mpu6050-i2c.o -inv-mpu6050-i2c-objs := inv_mpu_i2c.o inv_mpu_acpi.o +inv-mpu6050-i2c-y := inv_mpu_i2c.o inv_mpu_acpi.o obj-$(CONFIG_INV_MPU6050_SPI) += inv-mpu6050-spi.o -inv-mpu6050-spi-objs := inv_mpu_spi.o +inv-mpu6050-spi-y := inv_mpu_spi.o diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.c new file mode 100644 index 000000000000..7327e5723f96 --- /dev/null +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.c @@ -0,0 +1,204 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 TDK-InvenSense, Inc. + */ + +#include +#include +#include +#include + +#include "inv_mpu_aux.h" +#include "inv_mpu_iio.h" + +/* + * i2c master auxiliary bus transfer function. + * Requires the i2c operations to be correctly setup before. + */ +static int inv_mpu_i2c_master_xfer(const struct inv_mpu6050_state *st) +{ + /* use 50hz frequency for xfer */ + const unsigned int freq = 50; + const unsigned int period_ms = 1000 / freq; + uint8_t d; + unsigned int user_ctrl; + int ret; + + /* set sample rate */ + d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(freq); + ret = regmap_write(st->map, st->reg->sample_rate_div, d); + if (ret) + return ret; + + /* start i2c master */ + user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN; + ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); + if (ret) + goto error_restore_rate; + + /* wait for xfer: 1 period + half-period margin */ + msleep(period_ms + period_ms / 2); + + /* stop i2c master */ + user_ctrl = st->chip_config.user_ctrl; + ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); + if (ret) + goto error_stop_i2c; + + /* restore sample rate */ + d = st->chip_config.divider; + ret = regmap_write(st->map, st->reg->sample_rate_div, d); + if (ret) + goto error_restore_rate; + + return 0; + +error_stop_i2c: + regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl); +error_restore_rate: + regmap_write(st->map, st->reg->sample_rate_div, st->chip_config.divider); + return ret; +} + +/** + * inv_mpu_aux_init() - init i2c auxiliary bus + * @st: driver internal state + * + * Returns 0 on success, a negative error code otherwise. + */ +int inv_mpu_aux_init(const struct inv_mpu6050_state *st) +{ + unsigned int val; + int ret; + + /* configure i2c master */ + val = INV_MPU6050_BITS_I2C_MST_CLK_400KHZ | + INV_MPU6050_BIT_WAIT_FOR_ES; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_MST_CTRL, val); + if (ret) + return ret; + + /* configure i2c master delay */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, 0); + if (ret) + return ret; + + val = INV_MPU6050_BIT_I2C_SLV0_DLY_EN | + INV_MPU6050_BIT_I2C_SLV1_DLY_EN | + INV_MPU6050_BIT_I2C_SLV2_DLY_EN | + INV_MPU6050_BIT_I2C_SLV3_DLY_EN | + INV_MPU6050_BIT_DELAY_ES_SHADOW; + return regmap_write(st->map, INV_MPU6050_REG_I2C_MST_DELAY_CTRL, val); +} + +/** + * inv_mpu_aux_read() - read register function for i2c auxiliary bus + * @st: driver internal state. + * @addr: chip i2c Address + * @reg: chip register address + * @val: buffer for storing read bytes + * @size: number of bytes to read + * + * Returns 0 on success, a negative error code otherwise. + */ +int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr, + uint8_t reg, uint8_t *val, size_t size) +{ + unsigned int status; + int ret; + + if (size > 0x0F) + return -EINVAL; + + /* setup i2c SLV0 control: i2c addr, register, enable + size */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), + INV_MPU6050_BIT_I2C_SLV_RNW | addr); + if (ret) + return ret; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg); + if (ret) + return ret; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), + INV_MPU6050_BIT_SLV_EN | size); + if (ret) + return ret; + + /* do i2c xfer */ + ret = inv_mpu_i2c_master_xfer(st); + if (ret) + goto error_disable_i2c; + + /* disable i2c slave */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); + if (ret) + goto error_disable_i2c; + + /* check i2c status */ + ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status); + if (ret) + return ret; + if (status & INV_MPU6050_BIT_I2C_SLV0_NACK) + return -EIO; + + /* read data in registers */ + return regmap_bulk_read(st->map, INV_MPU6050_REG_EXT_SENS_DATA, + val, size); + +error_disable_i2c: + regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); + return ret; +} + +/** + * inv_mpu_aux_write() - write register function for i2c auxiliary bus + * @st: driver internal state. + * @addr: chip i2c Address + * @reg: chip register address + * @val: 1 byte value to write + * + * Returns 0 on success, a negative error code otherwise. + */ +int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr, + uint8_t reg, uint8_t val) +{ + unsigned int status; + int ret; + + /* setup i2c SLV0 control: i2c addr, register, value, enable + size */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), addr); + if (ret) + return ret; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), reg); + if (ret) + return ret; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(0), val); + if (ret) + return ret; + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), + INV_MPU6050_BIT_SLV_EN | 1); + if (ret) + return ret; + + /* do i2c xfer */ + ret = inv_mpu_i2c_master_xfer(st); + if (ret) + goto error_disable_i2c; + + /* disable i2c slave */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); + if (ret) + goto error_disable_i2c; + + /* check i2c status */ + ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status); + if (ret) + return ret; + if (status & INV_MPU6050_BIT_I2C_SLV0_NACK) + return -EIO; + + return 0; + +error_disable_i2c: + regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); + return ret; +} diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.h new file mode 100644 index 000000000000..b66997545762 --- /dev/null +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_aux.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 TDK-InvenSense, Inc. + */ + +#ifndef INV_MPU_AUX_H_ +#define INV_MPU_AUX_H_ + +#include "inv_mpu_iio.h" + +int inv_mpu_aux_init(const struct inv_mpu6050_state *st); + +int inv_mpu_aux_read(const struct inv_mpu6050_state *st, uint8_t addr, + uint8_t reg, uint8_t *val, size_t size); + +int inv_mpu_aux_write(const struct inv_mpu6050_state *st, uint8_t addr, + uint8_t reg, uint8_t val); + +#endif /* INV_MPU_AUX_H_ */ diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c index 868281b8adb0..45e77b308238 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c @@ -17,6 +17,7 @@ #include #include #include "inv_mpu_iio.h" +#include "inv_mpu_magn.h" /* * this is the gyro scale translated from dynamic range plus/minus @@ -103,6 +104,7 @@ static const struct inv_mpu6050_chip_config chip_config_6050 = { .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE), .gyro_fifo_enable = false, .accl_fifo_enable = false, + .magn_fifo_enable = false, .accl_fs = INV_MPU6050_FS_02G, .user_ctrl = 0, }; @@ -341,6 +343,11 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) */ st->chip_period = NSEC_PER_MSEC; + /* magn chip init, noop if not present in the chip */ + result = inv_mpu_magn_probe(st); + if (result) + goto error_power_off; + return inv_mpu6050_set_power_itg(st, false); error_power_off: @@ -420,6 +427,9 @@ static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, ret = inv_mpu6050_sensor_show(st, st->reg->temperature, IIO_MOD_X, val); break; + case IIO_MAGN: + ret = inv_mpu_magn_read(st, chan->channel2, val); + break; default: ret = -EINVAL; break; @@ -478,6 +488,8 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev, *val2 = INV_MPU6050_TEMP_SCALE; return IIO_VAL_INT_PLUS_MICRO; + case IIO_MAGN: + return inv_mpu_magn_get_scale(st, chan, val, val2); default: return -EINVAL; } @@ -719,6 +731,11 @@ inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, if (result) goto fifo_rate_fail_power_off; + /* update rate for magn, noop if not present in chip */ + result = inv_mpu_magn_set_rate(st, fifo_rate); + if (result) + goto fifo_rate_fail_power_off; + fifo_rate_fail_power_off: result |= inv_mpu6050_set_power_itg(st, false); fifo_rate_fail_unlock: @@ -804,8 +821,14 @@ inv_get_mount_matrix(const struct iio_dev *indio_dev, const struct iio_chan_spec *chan) { struct inv_mpu6050_state *data = iio_priv(indio_dev); + const struct iio_mount_matrix *matrix; - return &data->orientation; + if (chan->type == IIO_MAGN) + matrix = &data->magn_orient; + else + matrix = &data->orientation; + + return matrix; } static const struct iio_chan_spec_ext_info inv_ext_info[] = { @@ -873,6 +896,98 @@ static const unsigned long inv_mpu_scan_masks[] = { 0, }; +#define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ + { \ + .type = IIO_MAGN, \ + .modified = 1, \ + .channel2 = _chan2, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_RAW), \ + .scan_index = _index, \ + .scan_type = { \ + .sign = 's', \ + .realbits = _bits, \ + .storagebits = 16, \ + .shift = 0, \ + .endianness = IIO_BE, \ + }, \ + .ext_info = inv_ext_info, \ + } + +static const struct iio_chan_spec inv_mpu9250_channels[] = { + IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), + /* + * Note that temperature should only be via polled reading only, + * not the final scan elements output. + */ + { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_OFFSET) + | BIT(IIO_CHAN_INFO_SCALE), + .scan_index = -1, + }, + INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), + INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), + INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), + + INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), + INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), + INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), + + /* Magnetometer resolution is 16 bits */ + INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), + INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), + INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), +}; + +static const unsigned long inv_mpu9x50_scan_masks[] = { + /* 3-axis accel */ + BIT(INV_MPU6050_SCAN_ACCL_X) + | BIT(INV_MPU6050_SCAN_ACCL_Y) + | BIT(INV_MPU6050_SCAN_ACCL_Z), + /* 3-axis gyro */ + BIT(INV_MPU6050_SCAN_GYRO_X) + | BIT(INV_MPU6050_SCAN_GYRO_Y) + | BIT(INV_MPU6050_SCAN_GYRO_Z), + /* 3-axis magn */ + BIT(INV_MPU9X50_SCAN_MAGN_X) + | BIT(INV_MPU9X50_SCAN_MAGN_Y) + | BIT(INV_MPU9X50_SCAN_MAGN_Z), + /* 6-axis accel + gyro */ + BIT(INV_MPU6050_SCAN_ACCL_X) + | BIT(INV_MPU6050_SCAN_ACCL_Y) + | BIT(INV_MPU6050_SCAN_ACCL_Z) + | BIT(INV_MPU6050_SCAN_GYRO_X) + | BIT(INV_MPU6050_SCAN_GYRO_Y) + | BIT(INV_MPU6050_SCAN_GYRO_Z), + /* 6-axis accel + magn */ + BIT(INV_MPU6050_SCAN_ACCL_X) + | BIT(INV_MPU6050_SCAN_ACCL_Y) + | BIT(INV_MPU6050_SCAN_ACCL_Z) + | BIT(INV_MPU9X50_SCAN_MAGN_X) + | BIT(INV_MPU9X50_SCAN_MAGN_Y) + | BIT(INV_MPU9X50_SCAN_MAGN_Z), + /* 6-axis gyro + magn */ + BIT(INV_MPU6050_SCAN_GYRO_X) + | BIT(INV_MPU6050_SCAN_GYRO_Y) + | BIT(INV_MPU6050_SCAN_GYRO_Z) + | BIT(INV_MPU9X50_SCAN_MAGN_X) + | BIT(INV_MPU9X50_SCAN_MAGN_Y) + | BIT(INV_MPU9X50_SCAN_MAGN_Z), + /* 9-axis accel + gyro + magn */ + BIT(INV_MPU6050_SCAN_ACCL_X) + | BIT(INV_MPU6050_SCAN_ACCL_Y) + | BIT(INV_MPU6050_SCAN_ACCL_Z) + | BIT(INV_MPU6050_SCAN_GYRO_X) + | BIT(INV_MPU6050_SCAN_GYRO_Y) + | BIT(INV_MPU6050_SCAN_GYRO_Z) + | BIT(INV_MPU9X50_SCAN_MAGN_X) + | BIT(INV_MPU9X50_SCAN_MAGN_Y) + | BIT(INV_MPU9X50_SCAN_MAGN_Z), + 0, +}; + static const struct iio_chan_spec inv_icm20602_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP), { @@ -1034,14 +1149,14 @@ error_power_off: return result; } -static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st) +static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) { int result; result = regulator_enable(st->vddio_supply); if (result) { dev_err(regmap_get_device(st->map), - "Failed to enable regulator: %d\n", result); + "Failed to enable vddio regulator: %d\n", result); } else { /* Give the device a little bit of time to start up. */ usleep_range(35000, 70000); @@ -1050,21 +1165,29 @@ static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st) return result; } -static int inv_mpu_core_disable_regulator(struct inv_mpu6050_state *st) +static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) { int result; result = regulator_disable(st->vddio_supply); if (result) dev_err(regmap_get_device(st->map), - "Failed to disable regulator: %d\n", result); + "Failed to disable vddio regulator: %d\n", result); return result; } static void inv_mpu_core_disable_regulator_action(void *_data) { - inv_mpu_core_disable_regulator(_data); + struct inv_mpu6050_state *st = _data; + int result; + + result = regulator_disable(st->vdd_supply); + if (result) + dev_err(regmap_get_device(st->map), + "Failed to disable vdd regulator: %d\n", result); + + inv_mpu_core_disable_regulator_vddio(st); } int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, @@ -1133,6 +1256,15 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, return -EINVAL; } + st->vdd_supply = devm_regulator_get(dev, "vdd"); + if (IS_ERR(st->vdd_supply)) { + if (PTR_ERR(st->vdd_supply) != -EPROBE_DEFER) + dev_err(dev, "Failed to get vdd regulator %d\n", + (int)PTR_ERR(st->vdd_supply)); + + return PTR_ERR(st->vdd_supply); + } + st->vddio_supply = devm_regulator_get(dev, "vddio"); if (IS_ERR(st->vddio_supply)) { if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER) @@ -1142,9 +1274,17 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, return PTR_ERR(st->vddio_supply); } - result = inv_mpu_core_enable_regulator(st); - if (result) + result = regulator_enable(st->vdd_supply); + if (result) { + dev_err(dev, "Failed to enable vdd regulator: %d\n", result); return result; + } + + result = inv_mpu_core_enable_regulator_vddio(st); + if (result) { + regulator_disable(st->vdd_supply); + return result; + } result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, st); @@ -1154,6 +1294,11 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, return result; } + /* fill magnetometer orientation */ + result = inv_mpu_magn_set_orient(st); + if (result) + return result; + /* power is turned on inside check chip type*/ result = inv_check_and_setup_chip(st); if (result) @@ -1165,9 +1310,6 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, return result; } - if (inv_mpu_bus_setup) - inv_mpu_bus_setup(indio_dev); - dev_set_drvdata(dev, indio_dev); indio_dev->dev.parent = dev; /* name will be NULL when enumerated via ACPI */ @@ -1176,14 +1318,37 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, else indio_dev->name = dev_name(dev); - if (chip_type == INV_ICM20602) { + /* requires parent device set in indio_dev */ + if (inv_mpu_bus_setup) + inv_mpu_bus_setup(indio_dev); + + switch (chip_type) { + case INV_MPU9250: + case INV_MPU9255: + /* + * Use magnetometer inside the chip only if there is no i2c + * auxiliary device in use. + */ + if (!st->magn_disabled) { + indio_dev->channels = inv_mpu9250_channels; + indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); + indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; + } else { + indio_dev->channels = inv_mpu_channels; + indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); + indio_dev->available_scan_masks = inv_mpu_scan_masks; + } + break; + case INV_ICM20602: indio_dev->channels = inv_icm20602_channels; indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels); indio_dev->available_scan_masks = inv_icm20602_scan_masks; - } else { + break; + default: indio_dev->channels = inv_mpu_channels; indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); indio_dev->available_scan_masks = inv_mpu_scan_masks; + break; } indio_dev->info = &mpu_info; @@ -1221,7 +1386,7 @@ static int inv_mpu_resume(struct device *dev) int result; mutex_lock(&st->lock); - result = inv_mpu_core_enable_regulator(st); + result = inv_mpu_core_enable_regulator_vddio(st); if (result) goto out_unlock; @@ -1239,7 +1404,7 @@ static int inv_mpu_suspend(struct device *dev) mutex_lock(&st->lock); result = inv_mpu6050_set_power_itg(st, false); - inv_mpu_core_disable_regulator(st); + inv_mpu_core_disable_regulator_vddio(st); mutex_unlock(&st->lock); return result; diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c index 4b8b5a87398c..389cc8505e0e 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c @@ -68,6 +68,56 @@ static const char *inv_mpu_match_acpi_device(struct device *dev, return dev_name(dev); } +static bool inv_mpu_i2c_aux_bus(struct device *dev) +{ + struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); + + switch (st->chip_type) { + case INV_ICM20608: + case INV_ICM20602: + /* no i2c auxiliary bus on the chip */ + return false; + case INV_MPU9250: + case INV_MPU9255: + if (st->magn_disabled) + return true; + else + return false; + default: + return true; + } +} + +/* + * MPU9xxx magnetometer support requires to disable i2c auxiliary bus support. + * To ensure backward compatibility with existing setups, do not disable + * i2c auxiliary bus if it used. + * Check for i2c-gate node in devicetree and set magnetometer disabled. + * Only MPU6500 is supported by ACPI, no need to check. + */ +static int inv_mpu_magn_disable(struct iio_dev *indio_dev) +{ + struct inv_mpu6050_state *st = iio_priv(indio_dev); + struct device *dev = indio_dev->dev.parent; + struct device_node *mux_node; + + switch (st->chip_type) { + case INV_MPU9250: + case INV_MPU9255: + mux_node = of_get_child_by_name(dev->of_node, "i2c-gate"); + if (mux_node != NULL) { + st->magn_disabled = true; + dev_warn(dev, "disable internal use of magnetometer\n"); + } + of_node_put(mux_node); + break; + default: + break; + } + + return 0; +} + /** * inv_mpu_probe() - probe function. * @client: i2c client. @@ -112,17 +162,12 @@ static int inv_mpu_probe(struct i2c_client *client, } result = inv_mpu_core_probe(regmap, client->irq, name, - NULL, chip_type); + inv_mpu_magn_disable, chip_type); if (result < 0) return result; st = iio_priv(dev_get_drvdata(&client->dev)); - switch (st->chip_type) { - case INV_ICM20608: - case INV_ICM20602: - /* no i2c auxiliary bus on the chip */ - break; - default: + if (inv_mpu_i2c_aux_bus(&client->dev)) { /* declare i2c auxiliary bus */ st->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, I2C_MUX_LOCKED | I2C_MUX_GATE, @@ -137,7 +182,6 @@ static int inv_mpu_probe(struct i2c_client *client, result = inv_mpu_acpi_create_mux_client(client); if (result) goto out_del_mux; - break; } return 0; diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index 51235677c534..f1fb7b6bdab1 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -2,6 +2,10 @@ /* * Copyright (C) 2012 Invensense, Inc. */ + +#ifndef INV_MPU_IIO_H_ +#define INV_MPU_IIO_H_ + #include #include #include @@ -82,6 +86,7 @@ enum inv_devices { * @accl_fs: accel full scale range. * @accl_fifo_enable: enable accel data output * @gyro_fifo_enable: enable gyro data output + * @magn_fifo_enable: enable magn data output * @divider: chip sample rate divider (sample rate divider - 1) */ struct inv_mpu6050_chip_config { @@ -90,6 +95,7 @@ struct inv_mpu6050_chip_config { unsigned int accl_fs:2; unsigned int accl_fifo_enable:1; unsigned int gyro_fifo_enable:1; + unsigned int magn_fifo_enable:1; u8 divider; u8 user_ctrl; }; @@ -126,7 +132,11 @@ struct inv_mpu6050_hw { * @chip_period: chip internal period estimation (~1kHz). * @it_timestamp: timestamp from previous interrupt. * @data_timestamp: timestamp for next data sample. - * @vddio_supply voltage regulator for the chip. + * @vdd_supply: VDD voltage regulator for the chip. + * @vddio_supply I/O voltage regulator for the chip. + * @magn_disabled: magnetometer disabled for backward compatibility reason. + * @magn_raw_to_gauss: coefficient to convert mag raw value to Gauss. + * @magn_orient: magnetometer sensor chip orientation if available. */ struct inv_mpu6050_state { struct mutex lock; @@ -147,7 +157,11 @@ struct inv_mpu6050_state { s64 chip_period; s64 it_timestamp; s64 data_timestamp; + struct regulator *vdd_supply; struct regulator *vddio_supply; + bool magn_disabled; + s32 magn_raw_to_gauss[3]; + struct iio_mount_matrix magn_orient; }; /*register and associated bit definition*/ @@ -160,9 +174,41 @@ struct inv_mpu6050_state { #define INV_MPU6050_REG_ACCEL_CONFIG 0x1C #define INV_MPU6050_REG_FIFO_EN 0x23 +#define INV_MPU6050_BIT_SLAVE_0 0x01 +#define INV_MPU6050_BIT_SLAVE_1 0x02 +#define INV_MPU6050_BIT_SLAVE_2 0x04 #define INV_MPU6050_BIT_ACCEL_OUT 0x08 #define INV_MPU6050_BITS_GYRO_OUT 0x70 +#define INV_MPU6050_REG_I2C_MST_CTRL 0x24 +#define INV_MPU6050_BITS_I2C_MST_CLK_400KHZ 0x0D +#define INV_MPU6050_BIT_I2C_MST_P_NSR 0x10 +#define INV_MPU6050_BIT_SLV3_FIFO_EN 0x20 +#define INV_MPU6050_BIT_WAIT_FOR_ES 0x40 +#define INV_MPU6050_BIT_MULT_MST_EN 0x80 + +/* control I2C slaves from 0 to 3 */ +#define INV_MPU6050_REG_I2C_SLV_ADDR(_x) (0x25 + 3 * (_x)) +#define INV_MPU6050_BIT_I2C_SLV_RNW 0x80 + +#define INV_MPU6050_REG_I2C_SLV_REG(_x) (0x26 + 3 * (_x)) + +#define INV_MPU6050_REG_I2C_SLV_CTRL(_x) (0x27 + 3 * (_x)) +#define INV_MPU6050_BIT_SLV_GRP 0x10 +#define INV_MPU6050_BIT_SLV_REG_DIS 0x20 +#define INV_MPU6050_BIT_SLV_BYTE_SW 0x40 +#define INV_MPU6050_BIT_SLV_EN 0x80 + +/* I2C master delay register */ +#define INV_MPU6050_REG_I2C_SLV4_CTRL 0x34 +#define INV_MPU6050_BITS_I2C_MST_DLY(_x) ((_x) & 0x1F) + +#define INV_MPU6050_REG_I2C_MST_STATUS 0x36 +#define INV_MPU6050_BIT_I2C_SLV0_NACK 0x01 +#define INV_MPU6050_BIT_I2C_SLV1_NACK 0x02 +#define INV_MPU6050_BIT_I2C_SLV2_NACK 0x04 +#define INV_MPU6050_BIT_I2C_SLV3_NACK 0x08 + #define INV_MPU6050_REG_INT_ENABLE 0x38 #define INV_MPU6050_BIT_DATA_RDY_EN 0x01 #define INV_MPU6050_BIT_DMP_INT_EN 0x02 @@ -175,6 +221,18 @@ struct inv_mpu6050_state { #define INV_MPU6050_BIT_FIFO_OVERFLOW_INT 0x10 #define INV_MPU6050_BIT_RAW_DATA_RDY_INT 0x01 +#define INV_MPU6050_REG_EXT_SENS_DATA 0x49 + +/* I2C slaves data output from 0 to 3 */ +#define INV_MPU6050_REG_I2C_SLV_DO(_x) (0x63 + (_x)) + +#define INV_MPU6050_REG_I2C_MST_DELAY_CTRL 0x67 +#define INV_MPU6050_BIT_I2C_SLV0_DLY_EN 0x01 +#define INV_MPU6050_BIT_I2C_SLV1_DLY_EN 0x02 +#define INV_MPU6050_BIT_I2C_SLV2_DLY_EN 0x04 +#define INV_MPU6050_BIT_I2C_SLV3_DLY_EN 0x08 +#define INV_MPU6050_BIT_DELAY_ES_SHADOW 0x80 + #define INV_MPU6050_REG_USER_CTRL 0x6A #define INV_MPU6050_BIT_FIFO_RST 0x04 #define INV_MPU6050_BIT_DMP_RST 0x08 @@ -202,6 +260,9 @@ struct inv_mpu6050_state { #define INV_MPU6050_BYTES_PER_3AXIS_SENSOR 6 #define INV_MPU6050_FIFO_COUNT_BYTE 2 +/* MPU9X50 9-axis magnetometer */ +#define INV_MPU9X50_BYTES_MAGN 7 + /* ICM20602 FIFO samples include temperature readings */ #define INV_ICM20602_BYTES_PER_TEMP_SENSOR 2 @@ -229,8 +290,8 @@ struct inv_mpu6050_state { #define INV_ICM20602_TEMP_OFFSET 8170 #define INV_ICM20602_TEMP_SCALE 3060 -/* 6 + 6 round up and plus 8 */ -#define INV_MPU6050_OUTPUT_DATA_SIZE 24 +/* 6 + 6 + 7 (for MPU9x50) = 19 round up to 24 and plus 8 */ +#define INV_MPU6050_OUTPUT_DATA_SIZE 32 #define INV_MPU6050_REG_INT_PIN_CFG 0x37 #define INV_MPU6050_ACTIVE_HIGH 0x00 @@ -279,6 +340,11 @@ enum inv_mpu6050_scan { INV_MPU6050_SCAN_GYRO_Y, INV_MPU6050_SCAN_GYRO_Z, INV_MPU6050_SCAN_TIMESTAMP, + + INV_MPU9X50_SCAN_MAGN_X = INV_MPU6050_SCAN_GYRO_Z + 1, + INV_MPU9X50_SCAN_MAGN_Y, + INV_MPU9X50_SCAN_MAGN_Z, + INV_MPU9X50_SCAN_TIMESTAMP, }; /* scan element definition for ICM20602, which includes temperature */ @@ -344,3 +410,5 @@ void inv_mpu_acpi_delete_mux_client(struct i2c_client *client); int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type); extern const struct dev_pm_ops inv_mpu_pmops; + +#endif diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c new file mode 100644 index 000000000000..02735af152c8 --- /dev/null +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.c @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 TDK-InvenSense, Inc. + */ + +#include +#include +#include + +#include "inv_mpu_aux.h" +#include "inv_mpu_iio.h" +#include "inv_mpu_magn.h" + +/* + * MPU9250 magnetometer is an AKM AK8963 chip on I2C aux bus + */ +#define INV_MPU_MAGN_I2C_ADDR 0x0C + +#define INV_MPU_MAGN_REG_WIA 0x00 +#define INV_MPU_MAGN_BITS_WIA 0x48 + +#define INV_MPU_MAGN_REG_ST1 0x02 +#define INV_MPU_MAGN_BIT_DRDY 0x01 +#define INV_MPU_MAGN_BIT_DOR 0x02 + +#define INV_MPU_MAGN_REG_DATA 0x03 + +#define INV_MPU_MAGN_REG_ST2 0x09 +#define INV_MPU_MAGN_BIT_HOFL 0x08 +#define INV_MPU_MAGN_BIT_BITM 0x10 + +#define INV_MPU_MAGN_REG_CNTL1 0x0A +#define INV_MPU_MAGN_BITS_MODE_PWDN 0x00 +#define INV_MPU_MAGN_BITS_MODE_SINGLE 0x01 +#define INV_MPU_MAGN_BITS_MODE_FUSE 0x0F +#define INV_MPU_MAGN_BIT_OUTPUT_BIT 0x10 + +#define INV_MPU_MAGN_REG_CNTL2 0x0B +#define INV_MPU_MAGN_BIT_SRST 0x01 + +#define INV_MPU_MAGN_REG_ASAX 0x10 +#define INV_MPU_MAGN_REG_ASAY 0x11 +#define INV_MPU_MAGN_REG_ASAZ 0x12 + +/* Magnetometer maximum frequency */ +#define INV_MPU_MAGN_FREQ_HZ_MAX 50 + +static bool inv_magn_supported(const struct inv_mpu6050_state *st) +{ + switch (st->chip_type) { + case INV_MPU9250: + case INV_MPU9255: + return true; + default: + return false; + } +} + +/* init magnetometer chip */ +static int inv_magn_init(struct inv_mpu6050_state *st) +{ + uint8_t val; + uint8_t asa[3]; + int ret; + + /* check whoami */ + ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_WIA, + &val, sizeof(val)); + if (ret) + return ret; + if (val != INV_MPU_MAGN_BITS_WIA) + return -ENODEV; + + /* reset chip */ + ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR, + INV_MPU_MAGN_REG_CNTL2, + INV_MPU_MAGN_BIT_SRST); + if (ret) + return ret; + + /* read fuse ROM data */ + ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR, + INV_MPU_MAGN_REG_CNTL1, + INV_MPU_MAGN_BITS_MODE_FUSE); + if (ret) + return ret; + + ret = inv_mpu_aux_read(st, INV_MPU_MAGN_I2C_ADDR, INV_MPU_MAGN_REG_ASAX, + asa, sizeof(asa)); + if (ret) + return ret; + + /* switch back to power-down */ + ret = inv_mpu_aux_write(st, INV_MPU_MAGN_I2C_ADDR, + INV_MPU_MAGN_REG_CNTL1, + INV_MPU_MAGN_BITS_MODE_PWDN); + if (ret) + return ret; + + /* + * Sensitivity adjustement and scale to Gauss + * + * Hadj = H * (((ASA - 128) * 0.5 / 128) + 1) + * Factor simplification: + * Hadj = H * ((ASA + 128) / 256) + * + * Sensor sentivity + * 0.15 uT in 16 bits mode + * 1 uT = 0.01 G and value is in micron (1e6) + * sensitvity = 0.15 uT * 0.01 * 1e6 + * + * raw_to_gauss = Hadj * 1500 + */ + st->magn_raw_to_gauss[0] = (((int32_t)asa[0] + 128) * 1500) / 256; + st->magn_raw_to_gauss[1] = (((int32_t)asa[1] + 128) * 1500) / 256; + st->magn_raw_to_gauss[2] = (((int32_t)asa[2] + 128) * 1500) / 256; + + return 0; +} + +/** + * inv_mpu_magn_probe() - probe and setup magnetometer chip + * @st: driver internal state + * + * Returns 0 on success, a negative error code otherwise + * + * It is probing the chip and setting up all needed i2c transfers. + * Noop if there is no magnetometer in the chip. + */ +int inv_mpu_magn_probe(struct inv_mpu6050_state *st) +{ + int ret; + + /* quit if chip is not supported */ + if (!inv_magn_supported(st)) + return 0; + + /* configure i2c master aux port */ + ret = inv_mpu_aux_init(st); + if (ret) + return ret; + + /* check and init mag chip */ + ret = inv_magn_init(st); + if (ret) + return ret; + + /* + * configure mpu i2c master accesses + * i2c SLV0: read sensor data, 7 bytes data(6)-ST2 + * Byte swap data to store them in big-endian in impair address groups + */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(0), + INV_MPU6050_BIT_I2C_SLV_RNW | INV_MPU_MAGN_I2C_ADDR); + if (ret) + return ret; + + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(0), + INV_MPU_MAGN_REG_DATA); + if (ret) + return ret; + + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), + INV_MPU6050_BIT_SLV_EN | + INV_MPU6050_BIT_SLV_BYTE_SW | + INV_MPU6050_BIT_SLV_GRP | + INV_MPU9X50_BYTES_MAGN); + if (ret) + return ret; + + /* i2c SLV1: launch single measurement */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_ADDR(1), + INV_MPU_MAGN_I2C_ADDR); + if (ret) + return ret; + + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_REG(1), + INV_MPU_MAGN_REG_CNTL1); + if (ret) + return ret; + + /* add 16 bits mode */ + ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_DO(1), + INV_MPU_MAGN_BITS_MODE_SINGLE | + INV_MPU_MAGN_BIT_OUTPUT_BIT); + if (ret) + return ret; + + return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(1), + INV_MPU6050_BIT_SLV_EN | 1); +} + +/** + * inv_mpu_magn_set_rate() - set magnetometer sampling rate + * @st: driver internal state + * @fifo_rate: mpu set fifo rate + * + * Returns 0 on success, a negative error code otherwise + * + * Limit sampling frequency to the maximum value supported by the + * magnetometer chip. Resulting in duplicated data for higher frequencies. + * Noop if there is no magnetometer in the chip. + */ +int inv_mpu_magn_set_rate(const struct inv_mpu6050_state *st, int fifo_rate) +{ + uint8_t d; + + /* quit if chip is not supported */ + if (!inv_magn_supported(st)) + return 0; + + /* + * update i2c master delay to limit mag sampling to max frequency + * compute fifo_rate divider d: rate = fifo_rate / (d + 1) + */ + if (fifo_rate > INV_MPU_MAGN_FREQ_HZ_MAX) + d = fifo_rate / INV_MPU_MAGN_FREQ_HZ_MAX - 1; + else + d = 0; + + return regmap_write(st->map, INV_MPU6050_REG_I2C_SLV4_CTRL, d); +} + +/** + * inv_mpu_magn_set_orient() - fill magnetometer mounting matrix + * @st: driver internal state + * + * Returns 0 on success, a negative error code otherwise + * + * Fill magnetometer mounting matrix using the provided chip matrix. + */ +int inv_mpu_magn_set_orient(struct inv_mpu6050_state *st) +{ + const char *orient; + char *str; + int i; + + /* fill magnetometer orientation */ + switch (st->chip_type) { + case INV_MPU9250: + case INV_MPU9255: + /* x <- y */ + st->magn_orient.rotation[0] = st->orientation.rotation[3]; + st->magn_orient.rotation[1] = st->orientation.rotation[4]; + st->magn_orient.rotation[2] = st->orientation.rotation[5]; + /* y <- x */ + st->magn_orient.rotation[3] = st->orientation.rotation[0]; + st->magn_orient.rotation[4] = st->orientation.rotation[1]; + st->magn_orient.rotation[5] = st->orientation.rotation[2]; + /* z <- -z */ + for (i = 0; i < 3; ++i) { + orient = st->orientation.rotation[6 + i]; + /* use length + 2 for adding minus sign if needed */ + str = devm_kzalloc(regmap_get_device(st->map), + strlen(orient) + 2, GFP_KERNEL); + if (str == NULL) + return -ENOMEM; + if (strcmp(orient, "0") == 0) { + strcpy(str, orient); + } else if (orient[0] == '-') { + strcpy(str, &orient[1]); + } else { + str[0] = '-'; + strcpy(&str[1], orient); + } + st->magn_orient.rotation[6 + i] = str; + } + break; + default: + st->magn_orient = st->orientation; + break; + } + + return 0; +} + +/** + * inv_mpu_magn_read() - read magnetometer data + * @st: driver internal state + * @axis: IIO modifier axis value + * @val: store corresponding axis value + * + * Returns 0 on success, a negative error code otherwise + */ +int inv_mpu_magn_read(const struct inv_mpu6050_state *st, int axis, int *val) +{ + unsigned int user_ctrl, status; + __be16 data[3]; + uint8_t addr; + uint8_t d; + unsigned int period_ms; + int ret; + + /* quit if chip is not supported */ + if (!inv_magn_supported(st)) + return -ENODEV; + + /* Mag data: X - Y - Z */ + switch (axis) { + case IIO_MOD_X: + addr = 0; + break; + case IIO_MOD_Y: + addr = 1; + break; + case IIO_MOD_Z: + addr = 2; + break; + default: + return -EINVAL; + } + + /* set sample rate to max mag freq */ + d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU_MAGN_FREQ_HZ_MAX); + ret = regmap_write(st->map, st->reg->sample_rate_div, d); + if (ret) + return ret; + + /* start i2c master, wait for xfer, stop */ + user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN; + ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); + if (ret) + return ret; + + /* need to wait 2 periods + half-period margin */ + period_ms = 1000 / INV_MPU_MAGN_FREQ_HZ_MAX; + msleep(period_ms * 2 + period_ms / 2); + user_ctrl = st->chip_config.user_ctrl; + ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); + if (ret) + return ret; + + /* restore sample rate */ + d = st->chip_config.divider; + ret = regmap_write(st->map, st->reg->sample_rate_div, d); + if (ret) + return ret; + + /* check i2c status and read raw data */ + ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status); + if (ret) + return ret; + + if (status & INV_MPU6050_BIT_I2C_SLV0_NACK || + status & INV_MPU6050_BIT_I2C_SLV1_NACK) + return -EIO; + + ret = regmap_bulk_read(st->map, INV_MPU6050_REG_EXT_SENS_DATA, + data, sizeof(data)); + if (ret) + return ret; + + *val = (int16_t)be16_to_cpu(data[addr]); + + return IIO_VAL_INT; +} diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.h new file mode 100644 index 000000000000..b41bd0578478 --- /dev/null +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_magn.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 TDK-InvenSense, Inc. + */ + +#ifndef INV_MPU_MAGN_H_ +#define INV_MPU_MAGN_H_ + +#include + +#include "inv_mpu_iio.h" + +int inv_mpu_magn_probe(struct inv_mpu6050_state *st); + +/** + * inv_mpu_magn_get_scale() - get magnetometer scale value + * @st: driver internal state + * + * Returns IIO data format. + */ +static inline int inv_mpu_magn_get_scale(const struct inv_mpu6050_state *st, + const struct iio_chan_spec *chan, + int *val, int *val2) +{ + *val = 0; + *val2 = st->magn_raw_to_gauss[chan->address]; + return IIO_VAL_INT_PLUS_MICRO; +} + +int inv_mpu_magn_set_rate(const struct inv_mpu6050_state *st, int fifo_rate); + +int inv_mpu_magn_set_orient(struct inv_mpu6050_state *st); + +int inv_mpu_magn_read(const struct inv_mpu6050_state *st, int axis, int *val); + +#endif /* INV_MPU_MAGN_H_ */ diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c index 72d8c5790076..10d16ec5104b 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c @@ -124,7 +124,8 @@ int inv_reset_fifo(struct iio_dev *indio_dev) /* enable interrupt */ if (st->chip_config.accl_fifo_enable || - st->chip_config.gyro_fifo_enable) { + st->chip_config.gyro_fifo_enable || + st->chip_config.magn_fifo_enable) { result = regmap_write(st->map, st->reg->int_enable, INV_MPU6050_BIT_DATA_RDY_EN); if (result) @@ -141,6 +142,8 @@ int inv_reset_fifo(struct iio_dev *indio_dev) d |= INV_MPU6050_BITS_GYRO_OUT; if (st->chip_config.accl_fifo_enable) d |= INV_MPU6050_BIT_ACCEL_OUT; + if (st->chip_config.magn_fifo_enable) + d |= INV_MPU6050_BIT_SLAVE_0; result = regmap_write(st->map, st->reg->fifo_en, d); if (result) goto reset_fifo_fail; @@ -187,7 +190,8 @@ irqreturn_t inv_mpu6050_read_fifo(int irq, void *p) } if (!(st->chip_config.accl_fifo_enable | - st->chip_config.gyro_fifo_enable)) + st->chip_config.gyro_fifo_enable | + st->chip_config.magn_fifo_enable)) goto end_session; bytes_per_datum = 0; if (st->chip_config.accl_fifo_enable) @@ -199,6 +203,9 @@ irqreturn_t inv_mpu6050_read_fifo(int irq, void *p) if (st->chip_type == INV_ICM20602) bytes_per_datum += INV_ICM20602_BYTES_PER_TEMP_SENSOR; + if (st->chip_config.magn_fifo_enable) + bytes_per_datum += INV_MPU9X50_BYTES_MAGN; + /* * read fifo_count register to know how many bytes are inside the FIFO * right now diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c index dd55e70b6f77..d7d951927a44 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c @@ -5,7 +5,7 @@ #include "inv_mpu_iio.h" -static void inv_scan_query(struct iio_dev *indio_dev) +static void inv_scan_query_mpu6050(struct iio_dev *indio_dev) { struct inv_mpu6050_state *st = iio_priv(indio_dev); @@ -26,6 +26,60 @@ static void inv_scan_query(struct iio_dev *indio_dev) indio_dev->active_scan_mask); } +static void inv_scan_query_mpu9x50(struct iio_dev *indio_dev) +{ + struct inv_mpu6050_state *st = iio_priv(indio_dev); + + inv_scan_query_mpu6050(indio_dev); + + /* no magnetometer if i2c auxiliary bus is used */ + if (st->magn_disabled) + return; + + st->chip_config.magn_fifo_enable = + test_bit(INV_MPU9X50_SCAN_MAGN_X, + indio_dev->active_scan_mask) || + test_bit(INV_MPU9X50_SCAN_MAGN_Y, + indio_dev->active_scan_mask) || + test_bit(INV_MPU9X50_SCAN_MAGN_Z, + indio_dev->active_scan_mask); +} + +static void inv_scan_query(struct iio_dev *indio_dev) +{ + struct inv_mpu6050_state *st = iio_priv(indio_dev); + + switch (st->chip_type) { + case INV_MPU9250: + case INV_MPU9255: + return inv_scan_query_mpu9x50(indio_dev); + default: + return inv_scan_query_mpu6050(indio_dev); + } +} + +static unsigned int inv_compute_skip_samples(const struct inv_mpu6050_state *st) +{ + unsigned int gyro_skip = 0; + unsigned int magn_skip = 0; + unsigned int skip_samples; + + /* gyro first sample is out of specs, skip it */ + if (st->chip_config.gyro_fifo_enable) + gyro_skip = 1; + + /* mag first sample is always not ready, skip it */ + if (st->chip_config.magn_fifo_enable) + magn_skip = 1; + + /* compute first samples to skip */ + skip_samples = gyro_skip; + if (magn_skip > skip_samples) + skip_samples = magn_skip; + + return skip_samples; +} + /** * inv_mpu6050_set_enable() - enable chip functions. * @indio_dev: Device driver instance. @@ -34,6 +88,7 @@ static void inv_scan_query(struct iio_dev *indio_dev) static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable) { struct inv_mpu6050_state *st = iio_priv(indio_dev); + uint8_t d; int result; if (enable) { @@ -41,14 +96,11 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable) if (result) return result; inv_scan_query(indio_dev); - st->skip_samples = 0; if (st->chip_config.gyro_fifo_enable) { result = inv_mpu6050_switch_engine(st, true, INV_MPU6050_BIT_PWR_GYRO_STBY); if (result) goto error_power_off; - /* gyro first sample is out of specs, skip it */ - st->skip_samples = 1; } if (st->chip_config.accl_fifo_enable) { result = inv_mpu6050_switch_engine(st, true, @@ -56,22 +108,32 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable) if (result) goto error_gyro_off; } + if (st->chip_config.magn_fifo_enable) { + d = st->chip_config.user_ctrl | + INV_MPU6050_BIT_I2C_MST_EN; + result = regmap_write(st->map, st->reg->user_ctrl, d); + if (result) + goto error_accl_off; + st->chip_config.user_ctrl = d; + } + st->skip_samples = inv_compute_skip_samples(st); result = inv_reset_fifo(indio_dev); if (result) - goto error_accl_off; + goto error_magn_off; } else { result = regmap_write(st->map, st->reg->fifo_en, 0); if (result) - goto error_accl_off; + goto error_magn_off; result = regmap_write(st->map, st->reg->int_enable, 0); if (result) - goto error_accl_off; + goto error_magn_off; - result = regmap_write(st->map, st->reg->user_ctrl, - st->chip_config.user_ctrl); + d = st->chip_config.user_ctrl & ~INV_MPU6050_BIT_I2C_MST_EN; + result = regmap_write(st->map, st->reg->user_ctrl, d); if (result) - goto error_accl_off; + goto error_magn_off; + st->chip_config.user_ctrl = d; result = inv_mpu6050_switch_engine(st, false, INV_MPU6050_BIT_PWR_ACCL_STBY); @@ -90,6 +152,10 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable) return 0; +error_magn_off: + /* always restore user_ctrl to disable fifo properly */ + st->chip_config.user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; + regmap_write(st->map, st->reg->user_ctrl, st->chip_config.user_ctrl); error_accl_off: if (st->chip_config.accl_fifo_enable) inv_mpu6050_switch_engine(st, false, diff --git a/drivers/iio/imu/st_lsm6dsx/Kconfig b/drivers/iio/imu/st_lsm6dsx/Kconfig index 77aa0e77212d..28f59d09208a 100644 --- a/drivers/iio/imu/st_lsm6dsx/Kconfig +++ b/drivers/iio/imu/st_lsm6dsx/Kconfig @@ -12,7 +12,8 @@ config IIO_ST_LSM6DSX Say yes here to build support for STMicroelectronics LSM6DSx imu sensor. Supported devices: lsm6ds3, lsm6ds3h, lsm6dsl, lsm6dsm, ism330dlc, lsm6dso, lsm6dsox, asm330lhh, lsm6dsr, lsm6ds3tr-c, - ism330dhcx and the accelerometer/gyroscope of lsm9ds1. + ism330dhcx, lsm6dsrx, lsm6ds0 and the accelerometer/gyroscope + of lsm9ds1. To compile this driver as a module, choose M here: the module will be called st_lsm6dsx. diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h index 0fe6999b8257..c605b153be41 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -12,6 +12,7 @@ #define ST_LSM6DSX_H #include +#include #define ST_LSM6DS3_DEV_NAME "lsm6ds3" #define ST_LSM6DS3H_DEV_NAME "lsm6ds3h" @@ -25,6 +26,8 @@ #define ST_LSM6DS3TRC_DEV_NAME "lsm6ds3tr-c" #define ST_ISM330DHCX_DEV_NAME "ism330dhcx" #define ST_LSM9DS1_DEV_NAME "lsm9ds1-imu" +#define ST_LSM6DS0_DEV_NAME "lsm6ds0" +#define ST_LSM6DSRX_DEV_NAME "lsm6dsrx" enum st_lsm6dsx_hw_id { ST_LSM6DS3_ID, @@ -39,6 +42,8 @@ enum st_lsm6dsx_hw_id { ST_LSM6DS3TRC_ID, ST_ISM330DHCX_ID, ST_LSM9DS1_ID, + ST_LSM6DS0_ID, + ST_LSM6DSRX_ID, ST_LSM6DSX_MAX_ID, }; @@ -54,6 +59,26 @@ enum st_lsm6dsx_hw_id { * ST_LSM6DSX_TAGGED_SAMPLE_SIZE) #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) +#define ST_LSM6DSX_CHANNEL_ACC(chan_type, addr, mod, scan_idx) \ +{ \ + .type = chan_type, \ + .address = addr, \ + .modified = 1, \ + .channel2 = mod, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ + .scan_index = scan_idx, \ + .scan_type = { \ + .sign = 's', \ + .realbits = 16, \ + .storagebits = 16, \ + .endianness = IIO_LE, \ + }, \ + .event_spec = &st_lsm6dsx_event, \ + .num_event_specs = 1, \ +} + #define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \ { \ .type = chan_type, \ @@ -81,14 +106,16 @@ struct st_lsm6dsx_sensor; struct st_lsm6dsx_hw; struct st_lsm6dsx_odr { - u16 hz; + u32 milli_hz; u8 val; }; #define ST_LSM6DSX_ODR_LIST_SIZE 6 struct st_lsm6dsx_odr_table_entry { struct st_lsm6dsx_reg reg; + struct st_lsm6dsx_odr odr_avl[ST_LSM6DSX_ODR_LIST_SIZE]; + int odr_len; }; struct st_lsm6dsx_fs { @@ -132,12 +159,14 @@ struct st_lsm6dsx_fifo_ops { * @hr_timer: Hw timer resolution register info (addr + mask). * @fifo_en: Hw timer FIFO enable register info (addr + mask). * @decimator: Hw timer FIFO decimator register info (addr + mask). + * @freq_fine: Difference in % of ODR with respect to the typical. */ struct st_lsm6dsx_hw_ts_settings { struct st_lsm6dsx_reg timer_en; struct st_lsm6dsx_reg hr_timer; struct st_lsm6dsx_reg fifo_en; struct st_lsm6dsx_reg decimator; + u8 freq_fine; }; /** @@ -164,6 +193,16 @@ struct st_lsm6dsx_shub_settings { u8 batch_en; }; +struct st_lsm6dsx_event_settings { + struct st_lsm6dsx_reg enable_reg; + struct st_lsm6dsx_reg wakeup_reg; + u8 wakeup_src_reg; + u8 wakeup_src_status_mask; + u8 wakeup_src_z_mask; + u8 wakeup_src_y_mask; + u8 wakeup_src_x_mask; +}; + enum st_lsm6dsx_ext_sensor_id { ST_LSM6DSX_ID_MAGN, }; @@ -207,12 +246,14 @@ struct st_lsm6dsx_ext_dev_settings { /** * struct st_lsm6dsx_settings - ST IMU sensor settings * @wai: Sensor WhoAmI default value. - * @int1_addr: Control Register address for INT1 - * @int2_addr: Control Register address for INT2 - * @reset_addr: register address for reset/reboot + * @reset: register address for reset. + * @boot: register address for boot. + * @bdu: register address for Block Data Update. * @max_fifo_size: Sensor max fifo length in FIFO words. * @id: List of hw id/device name supported by the driver configuration. * @channels: IIO channels supported by the device. + * @irq_config: interrupts related registers. + * @drdy_mask: register info for data-ready mask (addr + mask). * @odr_table: Hw sensors odr table (Hz + val). * @fs_table: Hw sensors gain table (gain + val). * @decimator: List of decimator register info (addr + mask). @@ -223,9 +264,9 @@ struct st_lsm6dsx_ext_dev_settings { */ struct st_lsm6dsx_settings { u8 wai; - u8 int1_addr; - u8 int2_addr; - u8 reset_addr; + struct st_lsm6dsx_reg reset; + struct st_lsm6dsx_reg boot; + struct st_lsm6dsx_reg bdu; u16 max_fifo_size; struct { enum st_lsm6dsx_hw_id hw_id; @@ -235,6 +276,17 @@ struct st_lsm6dsx_settings { const struct iio_chan_spec *chan; int len; } channels[2]; + struct { + struct st_lsm6dsx_reg irq1; + struct st_lsm6dsx_reg irq2; + struct st_lsm6dsx_reg irq1_func; + struct st_lsm6dsx_reg irq2_func; + struct st_lsm6dsx_reg lir; + struct st_lsm6dsx_reg clear_on_read; + struct st_lsm6dsx_reg hla; + struct st_lsm6dsx_reg od; + } irq_config; + struct st_lsm6dsx_reg drdy_mask; struct st_lsm6dsx_odr_table_entry odr_table[2]; struct st_lsm6dsx_fs_table_entry fs_table[2]; struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID]; @@ -242,6 +294,7 @@ struct st_lsm6dsx_settings { struct st_lsm6dsx_fifo_ops fifo_ops; struct st_lsm6dsx_hw_ts_settings ts_settings; struct st_lsm6dsx_shub_settings shub_settings; + struct st_lsm6dsx_event_settings event_settings; }; enum st_lsm6dsx_sensor_id { @@ -277,7 +330,7 @@ struct st_lsm6dsx_sensor { struct st_lsm6dsx_hw *hw; u32 gain; - u16 odr; + u32 odr; u16 watermark; u8 sip; @@ -301,9 +354,13 @@ struct st_lsm6dsx_sensor { * @fifo_mode: FIFO operating mode supported by the device. * @suspend_mask: Suspended sensor bitmask. * @enable_mask: Enabled sensor bitmask. + * @ts_gain: Hw timestamp rate after internal calibration. * @ts_sip: Total number of timestamp samples in a given pattern. * @sip: Total number of samples (acc/gyro/ts) in a given pattern. * @buff: Device read buffer. + * @irq_routing: pointer to interrupt routing configuration. + * @event_threshold: wakeup event threshold. + * @enable_event: enabled event bitmask. * @iio_devs: Pointers to acc/gyro iio_dev instances. * @settings: Pointer to the specific sensor settings in use. */ @@ -319,9 +376,14 @@ struct st_lsm6dsx_hw { enum st_lsm6dsx_fifo_mode fifo_mode; u8 suspend_mask; u8 enable_mask; + s64 ts_gain; u8 ts_sip; u8 sip; + const struct st_lsm6dsx_reg *irq_routing; + u8 event_threshold; + u8 enable_event; + u8 *buff; struct iio_dev *iio_devs[ST_LSM6DSX_ID_MAX]; @@ -329,6 +391,13 @@ struct st_lsm6dsx_hw { const struct st_lsm6dsx_settings *settings; }; +static const struct iio_event_spec st_lsm6dsx_event = { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE) +}; + static const unsigned long st_lsm6dsx_available_scan_masks[] = {0x7, 0x0}; extern const struct dev_pm_ops st_lsm6dsx_pm_ops; @@ -346,7 +415,7 @@ int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_fifo_mode fifo_mode); int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw); int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw); -int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val); +int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val); int st_lsm6dsx_shub_probe(struct st_lsm6dsx_hw *hw, const char *name); int st_lsm6dsx_shub_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable); int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable); diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c index b0f3da1976e4..d416990ae309 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c @@ -14,10 +14,10 @@ * (e.g. Gx, Gy, Gz, Ax, Ay, Az), then data are repeated depending on the * value of the decimation factor and ODR set for each FIFO data set. * - * LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX: The FIFO buffer can be - * configured to store data from gyroscope and accelerometer. Each sample - * is queued with a tag (1B) indicating data source (gyroscope, accelerometer, - * hw timer). + * LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/LSM6DSRX/ISM330DHCX: + * The FIFO buffer can be configured to store data from gyroscope and + * accelerometer. Each sample is queued with a tag (1B) indicating data + * source (gyroscope, accelerometer, hw timer). * * FIFO supported modes: * - BYPASS: FIFO disabled @@ -30,8 +30,6 @@ * Denis Ciocca */ #include -#include -#include #include #include #include @@ -42,10 +40,6 @@ #include "st_lsm6dsx.h" -#define ST_LSM6DSX_REG_HLACTIVE_ADDR 0x12 -#define ST_LSM6DSX_REG_HLACTIVE_MASK BIT(5) -#define ST_LSM6DSX_REG_PP_OD_ADDR 0x12 -#define ST_LSM6DSX_REG_PP_OD_MASK BIT(4) #define ST_LSM6DSX_REG_FIFO_MODE_ADDR 0x0a #define ST_LSM6DSX_FIFO_MODE_MASK GENMASK(2, 0) #define ST_LSM6DSX_FIFO_ODR_MASK GENMASK(6, 3) @@ -56,7 +50,6 @@ #define ST_LSM6DSX_MAX_FIFO_ODR_VAL 0x08 -#define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ #define ST_LSM6DSX_TS_RESET_VAL 0xaa struct st_lsm6dsx_decimator_entry { @@ -98,7 +91,7 @@ static int st_lsm6dsx_get_decimator_val(u8 val) } static void st_lsm6dsx_get_max_min_odr(struct st_lsm6dsx_hw *hw, - u16 *max_odr, u16 *min_odr) + u32 *max_odr, u32 *min_odr) { struct st_lsm6dsx_sensor *sensor; int i; @@ -113,16 +106,17 @@ static void st_lsm6dsx_get_max_min_odr(struct st_lsm6dsx_hw *hw, if (!(hw->enable_mask & BIT(sensor->id))) continue; - *max_odr = max_t(u16, *max_odr, sensor->odr); - *min_odr = min_t(u16, *min_odr, sensor->odr); + *max_odr = max_t(u32, *max_odr, sensor->odr); + *min_odr = min_t(u32, *min_odr, sensor->odr); } } static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw) { - u16 max_odr, min_odr, sip = 0, ts_sip = 0; const struct st_lsm6dsx_reg *ts_dec_reg; struct st_lsm6dsx_sensor *sensor; + u16 sip = 0, ts_sip = 0; + u32 max_odr, min_odr; int err = 0, i; u8 data; @@ -429,7 +423,7 @@ int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) */ if (!reset_ts && ts >= 0xff0000) reset_ts = true; - ts *= ST_LSM6DSX_TS_SENSITIVITY; + ts *= hw->ts_gain; offset += ST_LSM6DSX_SAMPLE_SIZE; } @@ -456,13 +450,19 @@ int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) return read_len; } +#define ST_LSM6DSX_INVALID_SAMPLE 0x7ffd static int st_lsm6dsx_push_tagged_data(struct st_lsm6dsx_hw *hw, u8 tag, u8 *data, s64 ts) { + s16 val = le16_to_cpu(*(__le16 *)data); struct st_lsm6dsx_sensor *sensor; struct iio_dev *iio_dev; + /* invalid sample during bootstrap phase */ + if (val >= ST_LSM6DSX_INVALID_SAMPLE) + return -EINVAL; + /* * EXT_TAG are managed in FIFO fashion so ST_LSM6DSX_EXT0_TAG * corresponds to the first enabled channel, ST_LSM6DSX_EXT1_TAG @@ -572,7 +572,7 @@ int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw) */ if (!reset_ts && ts >= 0xffff0000) reset_ts = true; - ts *= ST_LSM6DSX_TS_SENSITIVITY; + ts *= hw->ts_gain; } else { st_lsm6dsx_push_tagged_data(hw, tag, iio_buff, ts); @@ -592,6 +592,9 @@ int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw) { int err; + if (!hw->settings->fifo_ops.read_fifo) + return -ENOTSUPP; + mutex_lock(&hw->fifo_lock); hw->settings->fifo_ops.read_fifo(hw); @@ -654,25 +657,6 @@ out: return err; } -static irqreturn_t st_lsm6dsx_handler_irq(int irq, void *private) -{ - struct st_lsm6dsx_hw *hw = private; - - return hw->sip > 0 ? IRQ_WAKE_THREAD : IRQ_NONE; -} - -static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) -{ - struct st_lsm6dsx_hw *hw = private; - int count; - - mutex_lock(&hw->fifo_lock); - count = hw->settings->fifo_ops.read_fifo(hw); - mutex_unlock(&hw->fifo_lock); - - return count ? IRQ_HANDLED : IRQ_NONE; -} - static int st_lsm6dsx_buffer_preenable(struct iio_dev *iio_dev) { struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); @@ -702,59 +686,8 @@ static const struct iio_buffer_setup_ops st_lsm6dsx_buffer_ops = { int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw) { - struct device_node *np = hw->dev->of_node; - struct st_sensors_platform_data *pdata; struct iio_buffer *buffer; - unsigned long irq_type; - bool irq_active_low; - int i, err; - - irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); - - switch (irq_type) { - case IRQF_TRIGGER_HIGH: - case IRQF_TRIGGER_RISING: - irq_active_low = false; - break; - case IRQF_TRIGGER_LOW: - case IRQF_TRIGGER_FALLING: - irq_active_low = true; - break; - default: - dev_info(hw->dev, "mode %lx unsupported\n", irq_type); - return -EINVAL; - } - - err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_HLACTIVE_ADDR, - ST_LSM6DSX_REG_HLACTIVE_MASK, - FIELD_PREP(ST_LSM6DSX_REG_HLACTIVE_MASK, - irq_active_low)); - if (err < 0) - return err; - - pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; - if ((np && of_property_read_bool(np, "drive-open-drain")) || - (pdata && pdata->open_drain)) { - err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_PP_OD_ADDR, - ST_LSM6DSX_REG_PP_OD_MASK, - FIELD_PREP(ST_LSM6DSX_REG_PP_OD_MASK, - 1)); - if (err < 0) - return err; - - irq_type |= IRQF_SHARED; - } - - err = devm_request_threaded_irq(hw->dev, hw->irq, - st_lsm6dsx_handler_irq, - st_lsm6dsx_handler_thread, - irq_type | IRQF_ONESHOT, - "lsm6dsx", hw); - if (err) { - dev_err(hw->dev, "failed to request trigger irq %d\n", - hw->irq); - return err; - } + int i; for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { if (!hw->iio_devs[i]) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c index fd5ebe1e1594..11b2c7bc8041 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -32,7 +32,7 @@ * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 * - FIFO size: 3KB * - * - LSM9DS1: + * - LSM9DS1/LSM6DS0: * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 @@ -48,8 +48,11 @@ #include #include #include +#include #include #include +#include +#include #include #include #include @@ -58,17 +61,14 @@ #include "st_lsm6dsx.h" -#define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK BIT(3) #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f -#define ST_LSM6DSX_REG_RESET_MASK BIT(0) -#define ST_LSM6DSX_REG_BOOT_MASK BIT(7) -#define ST_LSM6DSX_REG_BDU_ADDR 0x12 -#define ST_LSM6DSX_REG_BDU_MASK BIT(6) + +#define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { - ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0), - ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), - ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), + ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), + ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), + ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), IIO_CHAN_SOFT_TIMESTAMP(3), }; @@ -89,14 +89,26 @@ static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { { .wai = 0x68, - .int1_addr = 0x0c, - .int2_addr = 0x0d, - .reset_addr = 0x22, + .reset = { + .addr = 0x22, + .mask = BIT(0), + }, + .boot = { + .addr = 0x22, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x22, + .mask = BIT(6), + }, .max_fifo_size = 32, .id = { { .hw_id = ST_LSM9DS1_ID, .name = ST_LSM9DS1_DEV_NAME, + }, { + .hw_id = ST_LSM6DS0_ID, + .name = ST_LSM6DS0_DEV_NAME, }, }, .channels = { @@ -115,24 +127,26 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x20, .mask = GENMASK(7, 5), }, - .odr_avl[0] = { 10, 0x01 }, - .odr_avl[1] = { 50, 0x02 }, - .odr_avl[2] = { 119, 0x03 }, - .odr_avl[3] = { 238, 0x04 }, - .odr_avl[4] = { 476, 0x05 }, - .odr_avl[5] = { 952, 0x06 }, + .odr_avl[0] = { 10000, 0x01 }, + .odr_avl[1] = { 50000, 0x02 }, + .odr_avl[2] = { 119000, 0x03 }, + .odr_avl[3] = { 238000, 0x04 }, + .odr_avl[4] = { 476000, 0x05 }, + .odr_avl[5] = { 952000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x10, .mask = GENMASK(7, 5), }, - .odr_avl[0] = { 15, 0x01 }, - .odr_avl[1] = { 60, 0x02 }, - .odr_avl[2] = { 119, 0x03 }, - .odr_avl[3] = { 238, 0x04 }, - .odr_avl[4] = { 476, 0x05 }, - .odr_avl[5] = { 952, 0x06 }, + .odr_avl[0] = { 14900, 0x01 }, + .odr_avl[1] = { 59500, 0x02 }, + .odr_avl[2] = { 119000, 0x03 }, + .odr_avl[3] = { 238000, 0x04 }, + .odr_avl[4] = { 476000, 0x05 }, + .odr_avl[5] = { 952000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -152,18 +166,46 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x10, .mask = GENMASK(4, 3), }, - .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, - .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, - .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, + + .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, + .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, + .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, .fs_len = 3, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0c, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .hla = { + .addr = 0x22, + .mask = BIT(5), + }, + .od = { + .addr = 0x22, + .mask = BIT(4), + }, + }, }, { .wai = 0x69, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 1365, .id = { { @@ -187,24 +229,26 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -231,6 +275,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x58, + .mask = BIT(0), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .decimator = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x08, @@ -272,12 +346,32 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .mask = GENMASK(5, 3), }, }, + .event_settings = { + .wakeup_reg = { + .addr = 0x5B, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), + }, }, { .wai = 0x69, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 682, .id = { { @@ -301,24 +395,26 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -345,6 +441,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x58, + .mask = BIT(0), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .decimator = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x08, @@ -386,12 +512,32 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .mask = GENMASK(5, 3), }, }, + .event_settings = { + .wakeup_reg = { + .addr = 0x5B, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), + }, }, { .wai = 0x6a, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 682, .id = { { @@ -424,24 +570,26 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -468,6 +616,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x58, + .mask = BIT(0), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .decimator = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x08, @@ -509,12 +687,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .mask = GENMASK(5, 3), }, }, + .event_settings = { + .enable_reg = { + .addr = 0x58, + .mask = BIT(7), + }, + .wakeup_reg = { + .addr = 0x5B, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), + }, }, { .wai = 0x6c, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 512, .id = { { @@ -535,30 +737,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), }, }, + .drdy_mask = { + .addr = 0x13, + .mask = BIT(3), + }, .odr_table = { [ST_LSM6DSX_ID_ACC] = { .reg = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -585,6 +793,40 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x56, + .mask = BIT(0), + }, + .clear_on_read = { + .addr = 0x56, + .mask = BIT(6), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .batch = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x09, @@ -617,6 +859,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x0a, .mask = GENMASK(7, 6), }, + .freq_fine = 0x63, }, .shub_settings = { .page_mux = { @@ -643,13 +886,37 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .slv0_addr = 0x15, .dw_slv0_addr = 0x21, .batch_en = BIT(3), - } + }, + .event_settings = { + .enable_reg = { + .addr = 0x58, + .mask = BIT(7), + }, + .wakeup_reg = { + .addr = 0x5b, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), + }, }, { .wai = 0x6b, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 512, .id = { { @@ -667,30 +934,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), }, }, + .drdy_mask = { + .addr = 0x13, + .mask = BIT(3), + }, .odr_table = { [ST_LSM6DSX_ID_ACC] = { .reg = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -717,6 +990,40 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x56, + .mask = BIT(0), + }, + .clear_on_read = { + .addr = 0x56, + .mask = BIT(6), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .batch = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x09, @@ -749,13 +1056,38 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x0a, .mask = GENMASK(7, 6), }, + .freq_fine = 0x63, + }, + .event_settings = { + .enable_reg = { + .addr = 0x58, + .mask = BIT(7), + }, + .wakeup_reg = { + .addr = 0x5B, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), }, }, { .wai = 0x6b, - .int1_addr = 0x0d, - .int2_addr = 0x0e, - .reset_addr = 0x12, + .reset = { + .addr = 0x12, + .mask = BIT(0), + }, + .boot = { + .addr = 0x12, + .mask = BIT(7), + }, + .bdu = { + .addr = 0x12, + .mask = BIT(6), + }, .max_fifo_size = 512, .id = { { @@ -764,6 +1096,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { }, { .hw_id = ST_ISM330DHCX_ID, .name = ST_ISM330DHCX_DEV_NAME, + }, { + .hw_id = ST_LSM6DSRX_ID, + .name = ST_LSM6DSRX_DEV_NAME, }, }, .channels = { @@ -776,30 +1111,36 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), }, }, + .drdy_mask = { + .addr = 0x13, + .mask = BIT(3), + }, .odr_table = { [ST_LSM6DSX_ID_ACC] = { .reg = { .addr = 0x10, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, [ST_LSM6DSX_ID_GYRO] = { .reg = { .addr = 0x11, .mask = GENMASK(7, 4), }, - .odr_avl[0] = { 13, 0x01 }, - .odr_avl[1] = { 26, 0x02 }, - .odr_avl[2] = { 52, 0x03 }, - .odr_avl[3] = { 104, 0x04 }, - .odr_avl[4] = { 208, 0x05 }, - .odr_avl[5] = { 416, 0x06 }, + .odr_avl[0] = { 12500, 0x01 }, + .odr_avl[1] = { 26000, 0x02 }, + .odr_avl[2] = { 52000, 0x03 }, + .odr_avl[3] = { 104000, 0x04 }, + .odr_avl[4] = { 208000, 0x05 }, + .odr_avl[5] = { 416000, 0x06 }, + .odr_len = 6, }, }, .fs_table = { @@ -826,6 +1167,40 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .fs_len = 4, }, }, + .irq_config = { + .irq1 = { + .addr = 0x0d, + .mask = BIT(3), + }, + .irq2 = { + .addr = 0x0e, + .mask = BIT(3), + }, + .lir = { + .addr = 0x56, + .mask = BIT(0), + }, + .clear_on_read = { + .addr = 0x56, + .mask = BIT(6), + }, + .irq1_func = { + .addr = 0x5e, + .mask = BIT(5), + }, + .irq2_func = { + .addr = 0x5f, + .mask = BIT(5), + }, + .hla = { + .addr = 0x12, + .mask = BIT(5), + }, + .od = { + .addr = 0x12, + .mask = BIT(4), + }, + }, .batch = { [ST_LSM6DSX_ID_ACC] = { .addr = 0x09, @@ -858,6 +1233,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .addr = 0x0a, .mask = GENMASK(7, 6), }, + .freq_fine = 0x63, }, .shub_settings = { .page_mux = { @@ -884,6 +1260,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { .slv0_addr = 0x15, .dw_slv0_addr = 0x21, .batch_en = BIT(3), + }, + .event_settings = { + .enable_reg = { + .addr = 0x58, + .mask = BIT(7), + }, + .wakeup_reg = { + .addr = 0x5B, + .mask = GENMASK(5, 0), + }, + .wakeup_src_reg = 0x1b, + .wakeup_src_status_mask = BIT(3), + .wakeup_src_z_mask = BIT(0), + .wakeup_src_y_mask = BIT(1), + .wakeup_src_x_mask = BIT(2), } }, }; @@ -967,36 +1358,37 @@ static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, return 0; } -int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) +int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val) { const struct st_lsm6dsx_odr_table_entry *odr_table; int i; odr_table = &sensor->hw->settings->odr_table[sensor->id]; - for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) + for (i = 0; i < odr_table->odr_len; i++) { /* * ext devices can run at different odr respect to * accel sensor */ - if (odr_table->odr_avl[i].hz >= odr) + if (odr_table->odr_avl[i].milli_hz >= odr) break; + } - if (i == ST_LSM6DSX_ODR_LIST_SIZE) + if (i == odr_table->odr_len) return -EINVAL; *val = odr_table->odr_avl[i].val; - - return 0; + return odr_table->odr_avl[i].milli_hz; } -static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, - enum st_lsm6dsx_sensor_id id) +static int +st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr, + enum st_lsm6dsx_sensor_id id) { struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); if (odr > 0) { if (hw->enable_mask & BIT(id)) - return max_t(u16, ref->odr, odr); + return max_t(u32, ref->odr, odr); else return odr; } else { @@ -1004,7 +1396,8 @@ static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, } } -static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) +static int +st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr) { struct st_lsm6dsx_sensor *ref_sensor = sensor; struct st_lsm6dsx_hw *hw = sensor->hw; @@ -1018,7 +1411,7 @@ static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) case ST_LSM6DSX_ID_EXT1: case ST_LSM6DSX_ID_EXT2: case ST_LSM6DSX_ID_ACC: { - u16 odr; + u32 odr; int i; /* @@ -1058,7 +1451,7 @@ int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable) { struct st_lsm6dsx_hw *hw = sensor->hw; - u16 odr = enable ? sensor->odr : 0; + u32 odr = enable ? sensor->odr : 0; int err; err = st_lsm6dsx_set_odr(sensor, odr); @@ -1084,14 +1477,15 @@ static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, if (err < 0) return err; - delay = 1000000 / sensor->odr; + delay = 1000000000 / sensor->odr; usleep_range(delay, 2 * delay); err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); if (err < 0) return err; - st_lsm6dsx_sensor_set_enable(sensor, false); + if (!hw->enable_event) + st_lsm6dsx_sensor_set_enable(sensor, false); *val = (s16)le16_to_cpu(data); @@ -1115,8 +1509,9 @@ static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, iio_device_release_direct_mode(iio_dev); break; case IIO_CHAN_INFO_SAMP_FREQ: - *val = sensor->odr; - ret = IIO_VAL_INT; + *val = sensor->odr / 1000; + *val2 = (sensor->odr % 1000) * 1000; + ret = IIO_VAL_INT_PLUS_MICRO; break; case IIO_CHAN_INFO_SCALE: *val = 0; @@ -1149,8 +1544,11 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, case IIO_CHAN_INFO_SAMP_FREQ: { u8 data; - err = st_lsm6dsx_check_odr(sensor, val, &data); - if (!err) + val = val * 1000 + val2 / 1000; + val = st_lsm6dsx_check_odr(sensor, val, &data); + if (val < 0) + err = val; + else sensor->odr = val; break; } @@ -1164,6 +1562,144 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, return err; } +static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) +{ + const struct st_lsm6dsx_reg *reg; + unsigned int data; + int err; + + if (!hw->settings->irq_config.irq1_func.addr) + return -ENOTSUPP; + + reg = &hw->settings->event_settings.enable_reg; + if (reg->addr) { + data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask); + err = st_lsm6dsx_update_bits_locked(hw, reg->addr, + reg->mask, data); + if (err < 0) + return err; + } + + /* Enable wakeup interrupt */ + data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); + return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, + hw->irq_routing->mask, data); +} + +static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); + struct st_lsm6dsx_hw *hw = sensor->hw; + + if (type != IIO_EV_TYPE_THRESH) + return -EINVAL; + + *val2 = 0; + *val = hw->event_threshold; + + return IIO_VAL_INT; +} + +static int +st_lsm6dsx_write_event(struct iio_dev *iio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); + struct st_lsm6dsx_hw *hw = sensor->hw; + const struct st_lsm6dsx_reg *reg; + unsigned int data; + int err; + + if (type != IIO_EV_TYPE_THRESH) + return -EINVAL; + + if (val < 0 || val > 31) + return -EINVAL; + + reg = &hw->settings->event_settings.wakeup_reg; + data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); + err = st_lsm6dsx_update_bits_locked(hw, reg->addr, + reg->mask, data); + if (err < 0) + return -EINVAL; + + hw->event_threshold = val; + + return 0; +} + +static int +st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); + struct st_lsm6dsx_hw *hw = sensor->hw; + + if (type != IIO_EV_TYPE_THRESH) + return -EINVAL; + + return !!(hw->enable_event & BIT(chan->channel2)); +} + +static int +st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); + struct st_lsm6dsx_hw *hw = sensor->hw; + u8 enable_event; + int err = 0; + + if (type != IIO_EV_TYPE_THRESH) + return -EINVAL; + + if (state) { + enable_event = hw->enable_event | BIT(chan->channel2); + + /* do not enable events if they are already enabled */ + if (hw->enable_event) + goto out; + } else { + enable_event = hw->enable_event & ~BIT(chan->channel2); + + /* only turn off sensor if no events is enabled */ + if (enable_event) + goto out; + } + + /* stop here if no changes have been made */ + if (hw->enable_event == enable_event) + return 0; + + err = st_lsm6dsx_event_setup(hw, state); + if (err < 0) + return err; + + mutex_lock(&hw->conf_lock); + err = st_lsm6dsx_sensor_set_enable(sensor, state); + mutex_unlock(&hw->conf_lock); + if (err < 0) + return err; + +out: + hw->enable_event = enable_event; + + return 0; +} + int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) { struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); @@ -1193,13 +1729,14 @@ st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, char *buf) { struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); - enum st_lsm6dsx_sensor_id id = sensor->id; - struct st_lsm6dsx_hw *hw = sensor->hw; + const struct st_lsm6dsx_odr_table_entry *odr_table; int i, len = 0; - for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) - len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", - hw->settings->odr_table[id].odr_avl[i].hz); + odr_table = &sensor->hw->settings->odr_table[sensor->id]; + for (i = 0; i < odr_table->odr_len; i++) + len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ", + odr_table->odr_avl[i].milli_hz / 1000, + odr_table->odr_avl[i].milli_hz % 1000); buf[len - 1] = '\n'; return len; @@ -1243,6 +1780,10 @@ static const struct iio_info st_lsm6dsx_acc_info = { .attrs = &st_lsm6dsx_acc_attribute_group, .read_raw = st_lsm6dsx_read_raw, .write_raw = st_lsm6dsx_write_raw, + .read_event_value = st_lsm6dsx_read_event, + .write_event_value = st_lsm6dsx_write_event, + .read_event_config = st_lsm6dsx_read_event_config, + .write_event_config = st_lsm6dsx_write_event_config, .hwfifo_set_watermark = st_lsm6dsx_set_watermark, }; @@ -1273,7 +1814,9 @@ static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin); } -static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg) +static int +st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, + const struct st_lsm6dsx_reg **drdy_reg) { int err = 0, drdy_pin; @@ -1287,10 +1830,12 @@ static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg) switch (drdy_pin) { case 1: - *drdy_reg = hw->settings->int1_addr; + hw->irq_routing = &hw->settings->irq_config.irq1_func; + *drdy_reg = &hw->settings->irq_config.irq1; break; case 2: - *drdy_reg = hw->settings->int2_addr; + hw->irq_routing = &hw->settings->irq_config.irq2_func; + *drdy_reg = &hw->settings->irq_config.irq2; break; default: dev_err(hw->dev, "unsupported data ready pin\n"); @@ -1381,51 +1926,95 @@ static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) if (err < 0) return err; } + + /* calibrate timestamp sensitivity */ + hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY; + if (ts_settings->freq_fine) { + err = regmap_read(hw->regmap, ts_settings->freq_fine, &val); + if (err < 0) + return err; + + /* + * linearize the AN5192 formula: + * 1 / (1 + x) ~= 1 - x (Taylor’s Series) + * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val)) + * ttrim[ns] ~= 25000 - 37.5 * val + * ttrim[ns] ~= 25000 - (37500 * val) / 1000 + */ + hw->ts_gain -= ((s8)val * 37500) / 1000; + } + return 0; } static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) { - u8 drdy_int_reg; + const struct st_lsm6dsx_reg *reg; int err; /* device sw reset */ - err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, - ST_LSM6DSX_REG_RESET_MASK, - FIELD_PREP(ST_LSM6DSX_REG_RESET_MASK, 1)); + reg = &hw->settings->reset; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); if (err < 0) return err; msleep(50); /* reload trimming parameter */ - err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, - ST_LSM6DSX_REG_BOOT_MASK, - FIELD_PREP(ST_LSM6DSX_REG_BOOT_MASK, 1)); + reg = &hw->settings->boot; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); if (err < 0) return err; msleep(50); /* enable Block Data Update */ - err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_BDU_ADDR, - ST_LSM6DSX_REG_BDU_MASK, - FIELD_PREP(ST_LSM6DSX_REG_BDU_MASK, 1)); + reg = &hw->settings->bdu; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); if (err < 0) return err; /* enable FIFO watermak interrupt */ - err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg); + err = st_lsm6dsx_get_drdy_reg(hw, ®); if (err < 0) return err; - err = regmap_update_bits(hw->regmap, drdy_int_reg, - ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, - FIELD_PREP(ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, - 1)); + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); if (err < 0) return err; + /* enable Latched interrupts for device events */ + if (hw->settings->irq_config.lir.addr) { + reg = &hw->settings->irq_config.lir; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); + if (err < 0) + return err; + + /* enable clear on read for latched interrupts */ + if (hw->settings->irq_config.clear_on_read.addr) { + reg = &hw->settings->irq_config.clear_on_read; + err = regmap_update_bits(hw->regmap, + reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); + if (err < 0) + return err; + } + } + + /* enable drdy-mas if available */ + if (hw->settings->drdy_mask.addr) { + reg = &hw->settings->drdy_mask; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); + if (err < 0) + return err; + } + err = st_lsm6dsx_init_shub(hw); if (err < 0) return err; @@ -1453,7 +2042,7 @@ static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, sensor = iio_priv(iio_dev); sensor->id = id; sensor->hw = hw; - sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz; + sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz; sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; sensor->watermark = 1; @@ -1476,10 +2065,138 @@ static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, return iio_dev; } +static bool +st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) +{ + const struct st_lsm6dsx_event_settings *event_settings; + int err, data; + s64 timestamp; + + if (!hw->enable_event) + return false; + + event_settings = &hw->settings->event_settings; + err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, + &data, sizeof(data)); + if (err < 0) + return false; + + timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); + if ((data & hw->settings->event_settings.wakeup_src_z_mask) && + (hw->enable_event & BIT(IIO_MOD_Z))) + iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], + IIO_MOD_EVENT_CODE(IIO_ACCEL, + 0, + IIO_MOD_Z, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_EITHER), + timestamp); + + if ((data & hw->settings->event_settings.wakeup_src_y_mask) && + (hw->enable_event & BIT(IIO_MOD_Y))) + iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], + IIO_MOD_EVENT_CODE(IIO_ACCEL, + 0, + IIO_MOD_Y, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_EITHER), + timestamp); + + if ((data & hw->settings->event_settings.wakeup_src_x_mask) && + (hw->enable_event & BIT(IIO_MOD_X))) + iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], + IIO_MOD_EVENT_CODE(IIO_ACCEL, + 0, + IIO_MOD_X, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_EITHER), + timestamp); + + return data & event_settings->wakeup_src_status_mask; +} + +static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) +{ + struct st_lsm6dsx_hw *hw = private; + bool event; + int count; + + event = st_lsm6dsx_report_motion_event(hw); + + if (!hw->settings->fifo_ops.read_fifo) + return event ? IRQ_HANDLED : IRQ_NONE; + + mutex_lock(&hw->fifo_lock); + count = hw->settings->fifo_ops.read_fifo(hw); + mutex_unlock(&hw->fifo_lock); + + return count || event ? IRQ_HANDLED : IRQ_NONE; +} + +static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) +{ + struct device_node *np = hw->dev->of_node; + struct st_sensors_platform_data *pdata; + const struct st_lsm6dsx_reg *reg; + unsigned long irq_type; + bool irq_active_low; + int err; + + irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); + + switch (irq_type) { + case IRQF_TRIGGER_HIGH: + case IRQF_TRIGGER_RISING: + irq_active_low = false; + break; + case IRQF_TRIGGER_LOW: + case IRQF_TRIGGER_FALLING: + irq_active_low = true; + break; + default: + dev_info(hw->dev, "mode %lx unsupported\n", irq_type); + return -EINVAL; + } + + reg = &hw->settings->irq_config.hla; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(irq_active_low, + reg->mask)); + if (err < 0) + return err; + + pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; + if ((np && of_property_read_bool(np, "drive-open-drain")) || + (pdata && pdata->open_drain)) { + reg = &hw->settings->irq_config.od; + err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); + if (err < 0) + return err; + + irq_type |= IRQF_SHARED; + } + + err = devm_request_threaded_irq(hw->dev, hw->irq, + NULL, + st_lsm6dsx_handler_thread, + irq_type | IRQF_ONESHOT, + "lsm6dsx", hw); + if (err) { + dev_err(hw->dev, "failed to request trigger irq %d\n", + hw->irq); + return err; + } + + return 0; +} + int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, struct regmap *regmap) { + struct st_sensors_platform_data *pdata = dev->platform_data; const struct st_lsm6dsx_shub_settings *hub_settings; + struct device_node *np = dev->of_node; struct st_lsm6dsx_hw *hw; const char *name = NULL; int i, err; @@ -1524,6 +2241,10 @@ int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, } if (hw->irq > 0) { + err = st_lsm6dsx_irq_setup(hw); + if (err < 0) + return err; + err = st_lsm6dsx_fifo_setup(hw); if (err < 0) return err; @@ -1538,6 +2259,10 @@ int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, return err; } + if ((np && of_property_read_bool(np, "wakeup-source")) || + (pdata && pdata->wakeup_source)) + device_init_wakeup(dev, true); + return 0; } EXPORT_SYMBOL(st_lsm6dsx_probe); @@ -1556,6 +2281,13 @@ static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) if (!(hw->enable_mask & BIT(sensor->id))) continue; + if (device_may_wakeup(dev) && + sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { + /* Enable wake from IRQ */ + enable_irq_wake(hw->irq); + continue; + } + if (sensor->id == ST_LSM6DSX_ID_EXT0 || sensor->id == ST_LSM6DSX_ID_EXT1 || sensor->id == ST_LSM6DSX_ID_EXT2) @@ -1585,6 +2317,10 @@ static int __maybe_unused st_lsm6dsx_resume(struct device *dev) continue; sensor = iio_priv(hw->iio_devs[i]); + if (device_may_wakeup(dev) && + sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) + disable_irq_wake(hw->irq); + if (!(hw->suspend_mask & BIT(sensor->id))) continue; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c index f52511059545..cd47ec1fedcb 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c @@ -87,6 +87,14 @@ static const struct of_device_id st_lsm6dsx_i2c_of_match[] = { .compatible = "st,lsm9ds1-imu", .data = (void *)ST_LSM9DS1_ID, }, + { + .compatible = "st,lsm6ds0", + .data = (void *)ST_LSM6DS0_ID, + }, + { + .compatible = "st,lsm6dsrx", + .data = (void *)ST_LSM6DSRX_ID, + }, {}, }; MODULE_DEVICE_TABLE(of, st_lsm6dsx_i2c_of_match); @@ -104,6 +112,8 @@ static const struct i2c_device_id st_lsm6dsx_i2c_id_table[] = { { ST_LSM6DS3TRC_DEV_NAME, ST_LSM6DS3TRC_ID }, { ST_ISM330DHCX_DEV_NAME, ST_ISM330DHCX_ID }, { ST_LSM9DS1_DEV_NAME, ST_LSM9DS1_ID }, + { ST_LSM6DS0_DEV_NAME, ST_LSM6DS0_ID }, + { ST_LSM6DSRX_DEV_NAME, ST_LSM6DSRX_ID }, {}, }; MODULE_DEVICE_TABLE(i2c, st_lsm6dsx_i2c_id_table); diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c index ea472cf6db7b..fa5d1001a46c 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c @@ -51,10 +51,11 @@ static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = { .addr = 0x60, .mask = GENMASK(3, 2), }, - .odr_avl[0] = { 10, 0x0 }, - .odr_avl[1] = { 20, 0x1 }, - .odr_avl[2] = { 50, 0x2 }, - .odr_avl[3] = { 100, 0x3 }, + .odr_avl[0] = { 10000, 0x0 }, + .odr_avl[1] = { 20000, 0x1 }, + .odr_avl[2] = { 50000, 0x2 }, + .odr_avl[3] = { 100000, 0x3 }, + .odr_len = 4, }, .fs_table = { .fs_avl[0] = { @@ -93,11 +94,11 @@ static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = { static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw) { struct st_lsm6dsx_sensor *sensor; - u16 odr; + u32 odr; sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); - odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 13; - msleep((2000U / odr) + 1); + odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 12500; + msleep((2000000U / odr) + 1); } /** @@ -317,17 +318,18 @@ st_lsm6dsx_shub_write_with_mask(struct st_lsm6dsx_sensor *sensor, static int st_lsm6dsx_shub_get_odr_val(struct st_lsm6dsx_sensor *sensor, - u16 odr, u16 *val) + u32 odr, u16 *val) { const struct st_lsm6dsx_ext_dev_settings *settings; int i; settings = sensor->ext_info.settings; - for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) - if (settings->odr_table.odr_avl[i].hz == odr) + for (i = 0; i < settings->odr_table.odr_len; i++) { + if (settings->odr_table.odr_avl[i].milli_hz == odr) break; + } - if (i == ST_LSM6DSX_ODR_LIST_SIZE) + if (i == settings->odr_table.odr_len) return -EINVAL; *val = settings->odr_table.odr_avl[i].val; @@ -335,7 +337,7 @@ st_lsm6dsx_shub_get_odr_val(struct st_lsm6dsx_sensor *sensor, } static int -st_lsm6dsx_shub_set_odr(struct st_lsm6dsx_sensor *sensor, u16 odr) +st_lsm6dsx_shub_set_odr(struct st_lsm6dsx_sensor *sensor, u32 odr) { const struct st_lsm6dsx_ext_dev_settings *settings; u16 val; @@ -440,7 +442,7 @@ st_lsm6dsx_shub_read_oneshot(struct st_lsm6dsx_sensor *sensor, if (err < 0) return err; - delay = 1000000 / sensor->odr; + delay = 1000000000 / sensor->odr; usleep_range(delay, 2 * delay); len = min_t(int, sizeof(data), ch->scan_type.realbits >> 3); @@ -480,8 +482,9 @@ st_lsm6dsx_shub_read_raw(struct iio_dev *iio_dev, iio_device_release_direct_mode(iio_dev); break; case IIO_CHAN_INFO_SAMP_FREQ: - *val = sensor->odr; - ret = IIO_VAL_INT; + *val = sensor->odr / 1000; + *val2 = (sensor->odr % 1000) * 1000; + ret = IIO_VAL_INT_PLUS_MICRO; break; case IIO_CHAN_INFO_SCALE: *val = 0; @@ -512,6 +515,7 @@ st_lsm6dsx_shub_write_raw(struct iio_dev *iio_dev, case IIO_CHAN_INFO_SAMP_FREQ: { u16 data; + val = val * 1000 + val2 / 1000; err = st_lsm6dsx_shub_get_odr_val(sensor, val, &data); if (!err) sensor->odr = val; @@ -537,12 +541,11 @@ st_lsm6dsx_shub_sampling_freq_avail(struct device *dev, int i, len = 0; settings = sensor->ext_info.settings; - for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) { - u16 val = settings->odr_table.odr_avl[i].hz; + for (i = 0; i < settings->odr_table.odr_len; i++) { + u32 val = settings->odr_table.odr_avl[i].milli_hz; - if (val > 0) - len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", - val); + len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ", + val / 1000, val % 1000); } buf[len - 1] = '\n'; @@ -607,7 +610,7 @@ st_lsm6dsx_shub_alloc_iiodev(struct st_lsm6dsx_hw *hw, sensor = iio_priv(iio_dev); sensor->id = id; sensor->hw = hw; - sensor->odr = info->odr_table.odr_avl[0].hz; + sensor->odr = info->odr_table.odr_avl[0].milli_hz; sensor->gain = info->fs_table.fs_avl[0].gain; sensor->ext_info.settings = info; sensor->ext_info.addr = i2c_addr; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c index 344b28dddebb..67ff36eac247 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c @@ -87,6 +87,14 @@ static const struct of_device_id st_lsm6dsx_spi_of_match[] = { .compatible = "st,lsm9ds1-imu", .data = (void *)ST_LSM9DS1_ID, }, + { + .compatible = "st,lsm6ds0", + .data = (void *)ST_LSM6DS0_ID, + }, + { + .compatible = "st,lsm6dsrx", + .data = (void *)ST_LSM6DSRX_ID, + }, {}, }; MODULE_DEVICE_TABLE(of, st_lsm6dsx_spi_of_match); @@ -104,6 +112,8 @@ static const struct spi_device_id st_lsm6dsx_spi_id_table[] = { { ST_LSM6DS3TRC_DEV_NAME, ST_LSM6DS3TRC_ID }, { ST_ISM330DHCX_DEV_NAME, ST_ISM330DHCX_ID }, { ST_LSM9DS1_DEV_NAME, ST_LSM9DS1_ID }, + { ST_LSM6DS0_DEV_NAME, ST_LSM6DS0_ID }, + { ST_LSM6DSRX_DEV_NAME, ST_LSM6DSRX_ID }, {}, }; MODULE_DEVICE_TABLE(spi, st_lsm6dsx_spi_id_table); diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c index 524a686077ca..f72c2dc5f703 100644 --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c @@ -1238,6 +1238,16 @@ static ssize_t iio_show_dev_name(struct device *dev, static DEVICE_ATTR(name, S_IRUGO, iio_show_dev_name, NULL); +static ssize_t iio_show_dev_label(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + return snprintf(buf, PAGE_SIZE, "%s\n", indio_dev->label); +} + +static DEVICE_ATTR(label, S_IRUGO, iio_show_dev_label, NULL); + static ssize_t iio_show_timestamp_clock(struct device *dev, struct device_attribute *attr, char *buf) @@ -1354,6 +1364,8 @@ static int iio_device_register_sysfs(struct iio_dev *indio_dev) if (indio_dev->name) attrcount++; + if (indio_dev->label) + attrcount++; if (clk) attrcount++; @@ -1376,6 +1388,8 @@ static int iio_device_register_sysfs(struct iio_dev *indio_dev) indio_dev->chan_attr_group.attrs[attrn++] = &p->dev_attr.attr; if (indio_dev->name) indio_dev->chan_attr_group.attrs[attrn++] = &dev_attr_name.attr; + if (indio_dev->label) + indio_dev->chan_attr_group.attrs[attrn++] = &dev_attr_label.attr; if (clk) indio_dev->chan_attr_group.attrs[attrn++] = clk; @@ -1647,6 +1661,9 @@ int __iio_device_register(struct iio_dev *indio_dev, struct module *this_mod) if (!indio_dev->dev.of_node && indio_dev->dev.parent) indio_dev->dev.of_node = indio_dev->dev.parent->of_node; + indio_dev->label = of_get_property(indio_dev->dev.of_node, "label", + NULL); + ret = iio_check_unique_scan_index(indio_dev); if (ret < 0) return ret; diff --git a/drivers/iio/light/Kconfig b/drivers/iio/light/Kconfig index 4a1a883dc061..9968f982fbc7 100644 --- a/drivers/iio/light/Kconfig +++ b/drivers/iio/light/Kconfig @@ -32,6 +32,17 @@ config ADJD_S311 This driver can also be built as a module. If so, the module will be called adjd_s311. +config ADUX1020 + tristate "ADUX1020 photometric sensor" + select REGMAP_I2C + depends on I2C + help + Say Y here if you want to build a driver for the Analog Devices + ADUX1020 photometric sensor. + + To compile this driver as a module, choose M here: the + module will be called adux1020. + config AL3320A tristate "AL3320A ambient light sensor" depends on I2C @@ -496,6 +507,17 @@ config VCNL4035 To compile this driver as a module, choose M here: the module will be called vcnl4035. +config VEML6030 + tristate "VEML6030 ambient light sensor" + select REGMAP_I2C + depends on I2C + help + Say Y here if you want to build a driver for the Vishay VEML6030 + ambient light sensor (ALS). + + To compile this driver as a module, choose M here: the + module will be called veml6030. + config VEML6070 tristate "VEML6070 UV A light sensor" depends on I2C diff --git a/drivers/iio/light/Makefile b/drivers/iio/light/Makefile index 00d1f9b98f39..c98d1cefb861 100644 --- a/drivers/iio/light/Makefile +++ b/drivers/iio/light/Makefile @@ -6,6 +6,7 @@ # When adding new entries keep the list in alphabetical order obj-$(CONFIG_ACPI_ALS) += acpi-als.o obj-$(CONFIG_ADJD_S311) += adjd_s311.o +obj-$(CONFIG_ADUX1020) += adux1020.o obj-$(CONFIG_AL3320A) += al3320a.o obj-$(CONFIG_APDS9300) += apds9300.o obj-$(CONFIG_APDS9960) += apds9960.o @@ -48,6 +49,7 @@ obj-$(CONFIG_TSL4531) += tsl4531.o obj-$(CONFIG_US5182D) += us5182d.o obj-$(CONFIG_VCNL4000) += vcnl4000.o obj-$(CONFIG_VCNL4035) += vcnl4035.o +obj-$(CONFIG_VEML6030) += veml6030.o obj-$(CONFIG_VEML6070) += veml6070.o obj-$(CONFIG_VL6180) += vl6180.o obj-$(CONFIG_ZOPT2201) += zopt2201.o diff --git a/drivers/iio/light/adux1020.c b/drivers/iio/light/adux1020.c new file mode 100644 index 000000000000..b07797ac10d7 --- /dev/null +++ b/drivers/iio/light/adux1020.c @@ -0,0 +1,849 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * adux1020.c - Support for Analog Devices ADUX1020 photometric sensor + * + * Copyright (C) 2019 Linaro Ltd. + * Author: Manivannan Sadhasivam + * + * TODO: Triggered buffer support + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define ADUX1020_REGMAP_NAME "adux1020_regmap" +#define ADUX1020_DRV_NAME "adux1020" + +/* System registers */ +#define ADUX1020_REG_CHIP_ID 0x08 +#define ADUX1020_REG_SLAVE_ADDRESS 0x09 + +#define ADUX1020_REG_SW_RESET 0x0f +#define ADUX1020_REG_INT_ENABLE 0x1c +#define ADUX1020_REG_INT_POLARITY 0x1d +#define ADUX1020_REG_PROX_TH_ON1 0x2a +#define ADUX1020_REG_PROX_TH_OFF1 0x2b +#define ADUX1020_REG_PROX_TYPE 0x2f +#define ADUX1020_REG_TEST_MODES_3 0x32 +#define ADUX1020_REG_FORCE_MODE 0x33 +#define ADUX1020_REG_FREQUENCY 0x40 +#define ADUX1020_REG_LED_CURRENT 0x41 +#define ADUX1020_REG_OP_MODE 0x45 +#define ADUX1020_REG_INT_MASK 0x48 +#define ADUX1020_REG_INT_STATUS 0x49 +#define ADUX1020_REG_DATA_BUFFER 0x60 + +/* Chip ID bits */ +#define ADUX1020_CHIP_ID_MASK GENMASK(11, 0) +#define ADUX1020_CHIP_ID 0x03fc + +#define ADUX1020_SW_RESET BIT(1) +#define ADUX1020_FIFO_FLUSH BIT(15) +#define ADUX1020_OP_MODE_MASK GENMASK(3, 0) +#define ADUX1020_DATA_OUT_MODE_MASK GENMASK(7, 4) +#define ADUX1020_DATA_OUT_PROX_I FIELD_PREP(ADUX1020_DATA_OUT_MODE_MASK, 1) + +#define ADUX1020_MODE_INT_MASK GENMASK(7, 0) +#define ADUX1020_INT_ENABLE 0x2094 +#define ADUX1020_INT_DISABLE 0x2090 +#define ADUX1020_PROX_INT_ENABLE 0x00f0 +#define ADUX1020_PROX_ON1_INT BIT(0) +#define ADUX1020_PROX_OFF1_INT BIT(1) +#define ADUX1020_FIFO_INT_ENABLE 0x7f +#define ADUX1020_MODE_INT_DISABLE 0xff +#define ADUX1020_MODE_INT_STATUS_MASK GENMASK(7, 0) +#define ADUX1020_FIFO_STATUS_MASK GENMASK(15, 8) +#define ADUX1020_INT_CLEAR 0xff +#define ADUX1020_PROX_TYPE BIT(15) + +#define ADUX1020_INT_PROX_ON1 BIT(0) +#define ADUX1020_INT_PROX_OFF1 BIT(1) + +#define ADUX1020_FORCE_CLOCK_ON 0x0f4f +#define ADUX1020_FORCE_CLOCK_RESET 0x0040 +#define ADUX1020_ACTIVE_4_STATE 0x0008 + +#define ADUX1020_PROX_FREQ_MASK GENMASK(7, 4) +#define ADUX1020_PROX_FREQ(x) FIELD_PREP(ADUX1020_PROX_FREQ_MASK, x) + +#define ADUX1020_LED_CURRENT_MASK GENMASK(3, 0) +#define ADUX1020_LED_PIREF_EN BIT(12) + +/* Operating modes */ +enum adux1020_op_modes { + ADUX1020_MODE_STANDBY, + ADUX1020_MODE_PROX_I, + ADUX1020_MODE_PROX_XY, + ADUX1020_MODE_GEST, + ADUX1020_MODE_SAMPLE, + ADUX1020_MODE_FORCE = 0x0e, + ADUX1020_MODE_IDLE = 0x0f, +}; + +struct adux1020_data { + struct i2c_client *client; + struct iio_dev *indio_dev; + struct mutex lock; + struct regmap *regmap; +}; + +struct adux1020_mode_data { + u8 bytes; + u8 buf_len; + u16 int_en; +}; + +static const struct adux1020_mode_data adux1020_modes[] = { + [ADUX1020_MODE_PROX_I] = { + .bytes = 2, + .buf_len = 1, + .int_en = ADUX1020_PROX_INT_ENABLE, + }, +}; + +static const struct regmap_config adux1020_regmap_config = { + .name = ADUX1020_REGMAP_NAME, + .reg_bits = 8, + .val_bits = 16, + .max_register = 0x6F, + .cache_type = REGCACHE_NONE, +}; + +static const struct reg_sequence adux1020_def_conf[] = { + { 0x000c, 0x000f }, + { 0x0010, 0x1010 }, + { 0x0011, 0x004c }, + { 0x0012, 0x5f0c }, + { 0x0013, 0xada5 }, + { 0x0014, 0x0080 }, + { 0x0015, 0x0000 }, + { 0x0016, 0x0600 }, + { 0x0017, 0x0000 }, + { 0x0018, 0x2693 }, + { 0x0019, 0x0004 }, + { 0x001a, 0x4280 }, + { 0x001b, 0x0060 }, + { 0x001c, 0x2094 }, + { 0x001d, 0x0020 }, + { 0x001e, 0x0001 }, + { 0x001f, 0x0100 }, + { 0x0020, 0x0320 }, + { 0x0021, 0x0A13 }, + { 0x0022, 0x0320 }, + { 0x0023, 0x0113 }, + { 0x0024, 0x0000 }, + { 0x0025, 0x2412 }, + { 0x0026, 0x2412 }, + { 0x0027, 0x0022 }, + { 0x0028, 0x0000 }, + { 0x0029, 0x0300 }, + { 0x002a, 0x0700 }, + { 0x002b, 0x0600 }, + { 0x002c, 0x6000 }, + { 0x002d, 0x4000 }, + { 0x002e, 0x0000 }, + { 0x002f, 0x0000 }, + { 0x0030, 0x0000 }, + { 0x0031, 0x0000 }, + { 0x0032, 0x0040 }, + { 0x0033, 0x0008 }, + { 0x0034, 0xE400 }, + { 0x0038, 0x8080 }, + { 0x0039, 0x8080 }, + { 0x003a, 0x2000 }, + { 0x003b, 0x1f00 }, + { 0x003c, 0x2000 }, + { 0x003d, 0x2000 }, + { 0x003e, 0x0000 }, + { 0x0040, 0x8069 }, + { 0x0041, 0x1f2f }, + { 0x0042, 0x4000 }, + { 0x0043, 0x0000 }, + { 0x0044, 0x0008 }, + { 0x0046, 0x0000 }, + { 0x0048, 0x00ef }, + { 0x0049, 0x0000 }, + { 0x0045, 0x0000 }, +}; + +static const int adux1020_rates[][2] = { + { 0, 100000 }, + { 0, 200000 }, + { 0, 500000 }, + { 1, 0 }, + { 2, 0 }, + { 5, 0 }, + { 10, 0 }, + { 20, 0 }, + { 50, 0 }, + { 100, 0 }, + { 190, 0 }, + { 450, 0 }, + { 820, 0 }, + { 1400, 0 }, +}; + +static const int adux1020_led_currents[][2] = { + { 0, 25000 }, + { 0, 40000 }, + { 0, 55000 }, + { 0, 70000 }, + { 0, 85000 }, + { 0, 100000 }, + { 0, 115000 }, + { 0, 130000 }, + { 0, 145000 }, + { 0, 160000 }, + { 0, 175000 }, + { 0, 190000 }, + { 0, 205000 }, + { 0, 220000 }, + { 0, 235000 }, + { 0, 250000 }, +}; + +static int adux1020_flush_fifo(struct adux1020_data *data) +{ + int ret; + + /* Force Idle mode */ + ret = regmap_write(data->regmap, ADUX1020_REG_FORCE_MODE, + ADUX1020_ACTIVE_4_STATE); + if (ret < 0) + return ret; + + ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE, + ADUX1020_OP_MODE_MASK, ADUX1020_MODE_FORCE); + if (ret < 0) + return ret; + + ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE, + ADUX1020_OP_MODE_MASK, ADUX1020_MODE_IDLE); + if (ret < 0) + return ret; + + /* Flush FIFO */ + ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3, + ADUX1020_FORCE_CLOCK_ON); + if (ret < 0) + return ret; + + ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS, + ADUX1020_FIFO_FLUSH); + if (ret < 0) + return ret; + + return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3, + ADUX1020_FORCE_CLOCK_RESET); +} + +static int adux1020_read_fifo(struct adux1020_data *data, u16 *buf, u8 buf_len) +{ + unsigned int regval; + int i, ret; + + /* Enable 32MHz clock */ + ret = regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3, + ADUX1020_FORCE_CLOCK_ON); + if (ret < 0) + return ret; + + for (i = 0; i < buf_len; i++) { + ret = regmap_read(data->regmap, ADUX1020_REG_DATA_BUFFER, + ®val); + if (ret < 0) + return ret; + + buf[i] = regval; + } + + /* Set 32MHz clock to be controlled by internal state machine */ + return regmap_write(data->regmap, ADUX1020_REG_TEST_MODES_3, + ADUX1020_FORCE_CLOCK_RESET); +} + +static int adux1020_set_mode(struct adux1020_data *data, + enum adux1020_op_modes mode) +{ + int ret; + + /* Switch to standby mode before changing the mode */ + ret = regmap_write(data->regmap, ADUX1020_REG_OP_MODE, + ADUX1020_MODE_STANDBY); + if (ret < 0) + return ret; + + /* Set data out and switch to the desired mode */ + switch (mode) { + case ADUX1020_MODE_PROX_I: + ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE, + ADUX1020_DATA_OUT_MODE_MASK, + ADUX1020_DATA_OUT_PROX_I); + if (ret < 0) + return ret; + + ret = regmap_update_bits(data->regmap, ADUX1020_REG_OP_MODE, + ADUX1020_OP_MODE_MASK, + ADUX1020_MODE_PROX_I); + if (ret < 0) + return ret; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int adux1020_measure(struct adux1020_data *data, + enum adux1020_op_modes mode, + u16 *val) +{ + unsigned int status; + int ret, tries = 50; + + /* Disable INT pin as polling is going to be used */ + ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE, + ADUX1020_INT_DISABLE); + if (ret < 0) + return ret; + + /* Enable mode interrupt */ + ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK, + ADUX1020_MODE_INT_MASK, + adux1020_modes[mode].int_en); + if (ret < 0) + return ret; + + while (tries--) { + ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS, + &status); + if (ret < 0) + return ret; + + status &= ADUX1020_FIFO_STATUS_MASK; + if (status >= adux1020_modes[mode].bytes) + break; + msleep(20); + } + + if (tries < 0) + return -EIO; + + ret = adux1020_read_fifo(data, val, adux1020_modes[mode].buf_len); + if (ret < 0) + return ret; + + /* Clear mode interrupt */ + ret = regmap_write(data->regmap, ADUX1020_REG_INT_STATUS, + (~adux1020_modes[mode].int_en)); + if (ret < 0) + return ret; + + /* Disable mode interrupts */ + return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK, + ADUX1020_MODE_INT_MASK, + ADUX1020_MODE_INT_DISABLE); +} + +static int adux1020_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct adux1020_data *data = iio_priv(indio_dev); + u16 buf[3]; + int ret = -EINVAL; + unsigned int regval; + + mutex_lock(&data->lock); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + switch (chan->type) { + case IIO_PROXIMITY: + ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I); + if (ret < 0) + goto fail; + + ret = adux1020_measure(data, ADUX1020_MODE_PROX_I, buf); + if (ret < 0) + goto fail; + + *val = buf[0]; + ret = IIO_VAL_INT; + break; + default: + break; + } + break; + case IIO_CHAN_INFO_PROCESSED: + switch (chan->type) { + case IIO_CURRENT: + ret = regmap_read(data->regmap, + ADUX1020_REG_LED_CURRENT, ®val); + if (ret < 0) + goto fail; + + regval = regval & ADUX1020_LED_CURRENT_MASK; + + *val = adux1020_led_currents[regval][0]; + *val2 = adux1020_led_currents[regval][1]; + + ret = IIO_VAL_INT_PLUS_MICRO; + break; + default: + break; + } + break; + case IIO_CHAN_INFO_SAMP_FREQ: + switch (chan->type) { + case IIO_PROXIMITY: + ret = regmap_read(data->regmap, ADUX1020_REG_FREQUENCY, + ®val); + if (ret < 0) + goto fail; + + regval = FIELD_GET(ADUX1020_PROX_FREQ_MASK, regval); + + *val = adux1020_rates[regval][0]; + *val2 = adux1020_rates[regval][1]; + + ret = IIO_VAL_INT_PLUS_MICRO; + break; + default: + break; + } + break; + default: + break; + } + +fail: + mutex_unlock(&data->lock); + + return ret; +}; + +static inline int adux1020_find_index(const int array[][2], int count, int val, + int val2) +{ + int i; + + for (i = 0; i < count; i++) + if (val == array[i][0] && val2 == array[i][1]) + return i; + + return -EINVAL; +} + +static int adux1020_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct adux1020_data *data = iio_priv(indio_dev); + int i, ret = -EINVAL; + + mutex_lock(&data->lock); + + switch (mask) { + case IIO_CHAN_INFO_SAMP_FREQ: + if (chan->type == IIO_PROXIMITY) { + i = adux1020_find_index(adux1020_rates, + ARRAY_SIZE(adux1020_rates), + val, val2); + if (i < 0) { + ret = i; + goto fail; + } + + ret = regmap_update_bits(data->regmap, + ADUX1020_REG_FREQUENCY, + ADUX1020_PROX_FREQ_MASK, + ADUX1020_PROX_FREQ(i)); + } + break; + case IIO_CHAN_INFO_PROCESSED: + if (chan->type == IIO_CURRENT) { + i = adux1020_find_index(adux1020_led_currents, + ARRAY_SIZE(adux1020_led_currents), + val, val2); + if (i < 0) { + ret = i; + goto fail; + } + + ret = regmap_update_bits(data->regmap, + ADUX1020_REG_LED_CURRENT, + ADUX1020_LED_CURRENT_MASK, i); + } + break; + default: + break; + } + +fail: + mutex_unlock(&data->lock); + + return ret; +} + +static int adux1020_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + struct adux1020_data *data = iio_priv(indio_dev); + int ret, mask; + + mutex_lock(&data->lock); + + ret = regmap_write(data->regmap, ADUX1020_REG_INT_ENABLE, + ADUX1020_INT_ENABLE); + if (ret < 0) + goto fail; + + ret = regmap_write(data->regmap, ADUX1020_REG_INT_POLARITY, 0); + if (ret < 0) + goto fail; + + switch (chan->type) { + case IIO_PROXIMITY: + if (dir == IIO_EV_DIR_RISING) + mask = ADUX1020_PROX_ON1_INT; + else + mask = ADUX1020_PROX_OFF1_INT; + + if (state) + state = 0; + else + state = mask; + + ret = regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK, + mask, state); + if (ret < 0) + goto fail; + + /* + * Trigger proximity interrupt when the intensity is above + * or below threshold + */ + ret = regmap_update_bits(data->regmap, ADUX1020_REG_PROX_TYPE, + ADUX1020_PROX_TYPE, + ADUX1020_PROX_TYPE); + if (ret < 0) + goto fail; + + /* Set proximity mode */ + ret = adux1020_set_mode(data, ADUX1020_MODE_PROX_I); + break; + default: + ret = -EINVAL; + break; + } + +fail: + mutex_unlock(&data->lock); + + return ret; +} + +static int adux1020_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct adux1020_data *data = iio_priv(indio_dev); + int ret, mask; + unsigned int regval; + + switch (chan->type) { + case IIO_PROXIMITY: + if (dir == IIO_EV_DIR_RISING) + mask = ADUX1020_PROX_ON1_INT; + else + mask = ADUX1020_PROX_OFF1_INT; + break; + default: + return -EINVAL; + } + + ret = regmap_read(data->regmap, ADUX1020_REG_INT_MASK, ®val); + if (ret < 0) + return ret; + + return !(regval & mask); +} + +static int adux1020_read_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) +{ + struct adux1020_data *data = iio_priv(indio_dev); + u8 reg; + int ret; + unsigned int regval; + + switch (chan->type) { + case IIO_PROXIMITY: + if (dir == IIO_EV_DIR_RISING) + reg = ADUX1020_REG_PROX_TH_ON1; + else + reg = ADUX1020_REG_PROX_TH_OFF1; + break; + default: + return -EINVAL; + } + + ret = regmap_read(data->regmap, reg, ®val); + if (ret < 0) + return ret; + + *val = regval; + + return IIO_VAL_INT; +} + +static int adux1020_write_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int val, int val2) +{ + struct adux1020_data *data = iio_priv(indio_dev); + u8 reg; + + switch (chan->type) { + case IIO_PROXIMITY: + if (dir == IIO_EV_DIR_RISING) + reg = ADUX1020_REG_PROX_TH_ON1; + else + reg = ADUX1020_REG_PROX_TH_OFF1; + break; + default: + return -EINVAL; + } + + /* Full scale threshold value is 0-65535 */ + if (val < 0 || val > 65535) + return -EINVAL; + + return regmap_write(data->regmap, reg, val); +} + +static const struct iio_event_spec adux1020_proximity_event[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_separate = BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE), + }, + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_separate = BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE), + }, +}; + +static const struct iio_chan_spec adux1020_channels[] = { + { + .type = IIO_PROXIMITY, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .event_spec = adux1020_proximity_event, + .num_event_specs = ARRAY_SIZE(adux1020_proximity_event), + }, + { + .type = IIO_CURRENT, + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), + .extend_name = "led", + .output = 1, + }, +}; + +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( + "0.1 0.2 0.5 1 2 5 10 20 50 100 190 450 820 1400"); + +static struct attribute *adux1020_attributes[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + NULL +}; + +static const struct attribute_group adux1020_attribute_group = { + .attrs = adux1020_attributes, +}; + +static const struct iio_info adux1020_info = { + .attrs = &adux1020_attribute_group, + .read_raw = adux1020_read_raw, + .write_raw = adux1020_write_raw, + .read_event_config = adux1020_read_event_config, + .write_event_config = adux1020_write_event_config, + .read_event_value = adux1020_read_thresh, + .write_event_value = adux1020_write_thresh, +}; + +static irqreturn_t adux1020_interrupt_handler(int irq, void *private) +{ + struct iio_dev *indio_dev = private; + struct adux1020_data *data = iio_priv(indio_dev); + int ret, status; + + ret = regmap_read(data->regmap, ADUX1020_REG_INT_STATUS, &status); + if (ret < 0) + return IRQ_HANDLED; + + status &= ADUX1020_MODE_INT_STATUS_MASK; + + if (status & ADUX1020_INT_PROX_ON1) { + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + iio_get_time_ns(indio_dev)); + } + + if (status & ADUX1020_INT_PROX_OFF1) { + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING), + iio_get_time_ns(indio_dev)); + } + + regmap_update_bits(data->regmap, ADUX1020_REG_INT_STATUS, + ADUX1020_MODE_INT_MASK, ADUX1020_INT_CLEAR); + + return IRQ_HANDLED; +} + +static int adux1020_chip_init(struct adux1020_data *data) +{ + struct i2c_client *client = data->client; + int ret; + unsigned int val; + + ret = regmap_read(data->regmap, ADUX1020_REG_CHIP_ID, &val); + if (ret < 0) + return ret; + + if ((val & ADUX1020_CHIP_ID_MASK) != ADUX1020_CHIP_ID) { + dev_err(&client->dev, "invalid chip id 0x%04x\n", val); + return -ENODEV; + } + + dev_dbg(&client->dev, "Detected ADUX1020 with chip id: 0x%04x\n", val); + + ret = regmap_update_bits(data->regmap, ADUX1020_REG_SW_RESET, + ADUX1020_SW_RESET, ADUX1020_SW_RESET); + if (ret < 0) + return ret; + + /* Load default configuration */ + ret = regmap_multi_reg_write(data->regmap, adux1020_def_conf, + ARRAY_SIZE(adux1020_def_conf)); + if (ret < 0) + return ret; + + ret = adux1020_flush_fifo(data); + if (ret < 0) + return ret; + + /* Use LED_IREF for proximity mode */ + ret = regmap_update_bits(data->regmap, ADUX1020_REG_LED_CURRENT, + ADUX1020_LED_PIREF_EN, 0); + if (ret < 0) + return ret; + + /* Mask all interrupts */ + return regmap_update_bits(data->regmap, ADUX1020_REG_INT_MASK, + ADUX1020_MODE_INT_MASK, ADUX1020_MODE_INT_DISABLE); +} + +static int adux1020_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct adux1020_data *data; + struct iio_dev *indio_dev; + int ret; + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + indio_dev->dev.parent = &client->dev; + indio_dev->info = &adux1020_info; + indio_dev->name = ADUX1020_DRV_NAME; + indio_dev->channels = adux1020_channels; + indio_dev->num_channels = ARRAY_SIZE(adux1020_channels); + indio_dev->modes = INDIO_DIRECT_MODE; + + data = iio_priv(indio_dev); + + data->regmap = devm_regmap_init_i2c(client, &adux1020_regmap_config); + if (IS_ERR(data->regmap)) { + dev_err(&client->dev, "regmap initialization failed.\n"); + return PTR_ERR(data->regmap); + } + + data->client = client; + data->indio_dev = indio_dev; + mutex_init(&data->lock); + + ret = adux1020_chip_init(data); + if (ret) + return ret; + + if (client->irq) { + ret = devm_request_threaded_irq(&client->dev, client->irq, + NULL, adux1020_interrupt_handler, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + ADUX1020_DRV_NAME, indio_dev); + if (ret) { + dev_err(&client->dev, "irq request error %d\n", -ret); + return ret; + } + } + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static const struct i2c_device_id adux1020_id[] = { + { "adux1020", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, adux1020_id); + +static const struct of_device_id adux1020_of_match[] = { + { .compatible = "adi,adux1020" }, + { } +}; +MODULE_DEVICE_TABLE(of, adux1020_of_match); + +static struct i2c_driver adux1020_driver = { + .driver = { + .name = ADUX1020_DRV_NAME, + .of_match_table = adux1020_of_match, + }, + .probe = adux1020_probe, + .id_table = adux1020_id, +}; +module_i2c_driver(adux1020_driver); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("ADUX1020 photometric sensor"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/light/bh1750.c b/drivers/iio/light/bh1750.c index 28347df78cff..adb5ab9e3439 100644 --- a/drivers/iio/light/bh1750.c +++ b/drivers/iio/light/bh1750.c @@ -59,9 +59,9 @@ struct bh1750_chip_info { u16 int_time_low_mask; u16 int_time_high_mask; -} +}; -static const bh1750_chip_info_tbl[] = { +static const struct bh1750_chip_info bh1750_chip_info_tbl[] = { [BH1710] = { 140, 1022, 300, 400, 250000000, 2, 0x001F, 0x03E0 }, [BH1721] = { 140, 1020, 300, 400, 250000000, 2, 0x0010, 0x03E0 }, [BH1750] = { 31, 254, 69, 1740, 57500000, 1, 0x001F, 0x00E0 }, diff --git a/drivers/iio/light/cm36651.c b/drivers/iio/light/cm36651.c index 1019d625adb1..90e38fcc974b 100644 --- a/drivers/iio/light/cm36651.c +++ b/drivers/iio/light/cm36651.c @@ -532,7 +532,7 @@ static int cm36651_write_prox_event_config(struct iio_dev *indio_dev, int state) { struct cm36651_data *cm36651 = iio_priv(indio_dev); - int cmd, ret = -EINVAL; + int cmd, ret; mutex_lock(&cm36651->lock); diff --git a/drivers/iio/light/tcs3414.c b/drivers/iio/light/tcs3414.c index 7c0291c5fe76..b542e5619ead 100644 --- a/drivers/iio/light/tcs3414.c +++ b/drivers/iio/light/tcs3414.c @@ -240,32 +240,42 @@ static const struct iio_info tcs3414_info = { .attrs = &tcs3414_attribute_group, }; -static int tcs3414_buffer_preenable(struct iio_dev *indio_dev) +static int tcs3414_buffer_postenable(struct iio_dev *indio_dev) { struct tcs3414_data *data = iio_priv(indio_dev); + int ret; + + ret = iio_triggered_buffer_postenable(indio_dev); + if (ret) + return ret; data->control |= TCS3414_CONTROL_ADC_EN; - return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, + ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, data->control); + if (ret) + iio_triggered_buffer_predisable(indio_dev); + + return ret; } static int tcs3414_buffer_predisable(struct iio_dev *indio_dev) { struct tcs3414_data *data = iio_priv(indio_dev); - int ret; - - ret = iio_triggered_buffer_predisable(indio_dev); - if (ret < 0) - return ret; + int ret, ret2; data->control &= ~TCS3414_CONTROL_ADC_EN; - return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, + ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, data->control); + + ret2 = iio_triggered_buffer_predisable(indio_dev); + if (!ret) + ret = ret2; + + return ret; } static const struct iio_buffer_setup_ops tcs3414_buffer_setup_ops = { - .preenable = tcs3414_buffer_preenable, - .postenable = &iio_triggered_buffer_postenable, + .postenable = tcs3414_buffer_postenable, .predisable = tcs3414_buffer_predisable, }; diff --git a/drivers/iio/light/veml6030.c b/drivers/iio/light/veml6030.c new file mode 100644 index 000000000000..aa25b87fca8f --- /dev/null +++ b/drivers/iio/light/veml6030.c @@ -0,0 +1,908 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * VEML6030 Ambient Light Sensor + * + * Copyright (c) 2019, Rishi Gupta + * + * Datasheet: https://www.vishay.com/docs/84366/veml6030.pdf + * Appnote-84367: https://www.vishay.com/docs/84367/designingveml6030.pdf + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Device registers */ +#define VEML6030_REG_ALS_CONF 0x00 +#define VEML6030_REG_ALS_WH 0x01 +#define VEML6030_REG_ALS_WL 0x02 +#define VEML6030_REG_ALS_PSM 0x03 +#define VEML6030_REG_ALS_DATA 0x04 +#define VEML6030_REG_WH_DATA 0x05 +#define VEML6030_REG_ALS_INT 0x06 + +/* Bit masks for specific functionality */ +#define VEML6030_ALS_IT GENMASK(9, 6) +#define VEML6030_PSM GENMASK(2, 1) +#define VEML6030_ALS_PERS GENMASK(5, 4) +#define VEML6030_ALS_GAIN GENMASK(12, 11) +#define VEML6030_PSM_EN BIT(0) +#define VEML6030_INT_TH_LOW BIT(15) +#define VEML6030_INT_TH_HIGH BIT(14) +#define VEML6030_ALS_INT_EN BIT(1) +#define VEML6030_ALS_SD BIT(0) + +/* + * The resolution depends on both gain and integration time. The + * cur_resolution stores one of the resolution mentioned in the + * table during startup and gets updated whenever integration time + * or gain is changed. + * + * Table 'resolution and maximum detection range' in appnote 84367 + * is visualized as a 2D array. The cur_gain stores index of gain + * in this table (0-3) while the cur_integration_time holds index + * of integration time (0-5). + */ +struct veml6030_data { + struct i2c_client *client; + struct regmap *regmap; + int cur_resolution; + int cur_gain; + int cur_integration_time; +}; + +/* Integration time available in seconds */ +static IIO_CONST_ATTR(in_illuminance_integration_time_available, + "0.025 0.05 0.1 0.2 0.4 0.8"); + +/* + * Scale is 1/gain. Value 0.125 is ALS gain x (1/8), 0.25 is + * ALS gain x (1/4), 1.0 = ALS gain x 1 and 2.0 is ALS gain x 2. + */ +static IIO_CONST_ATTR(in_illuminance_scale_available, + "0.125 0.25 1.0 2.0"); + +static struct attribute *veml6030_attributes[] = { + &iio_const_attr_in_illuminance_integration_time_available.dev_attr.attr, + &iio_const_attr_in_illuminance_scale_available.dev_attr.attr, + NULL +}; + +static const struct attribute_group veml6030_attr_group = { + .attrs = veml6030_attributes, +}; + +/* + * Persistence = 1/2/4/8 x integration time + * Minimum time for which light readings must stay above configured + * threshold to assert the interrupt. + */ +static const char * const period_values[] = { + "0.1 0.2 0.4 0.8", + "0.2 0.4 0.8 1.6", + "0.4 0.8 1.6 3.2", + "0.8 1.6 3.2 6.4", + "0.05 0.1 0.2 0.4", + "0.025 0.050 0.1 0.2" +}; + +/* + * Return list of valid period values in seconds corresponding to + * the currently active integration time. + */ +static ssize_t in_illuminance_period_available_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret, reg, x; + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); + struct veml6030_data *data = iio_priv(indio_dev); + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als conf register %d\n", ret); + return ret; + } + + ret = ((reg >> 6) & 0xF); + switch (ret) { + case 0: + case 1: + case 2: + case 3: + x = ret; + break; + case 8: + x = 4; + break; + case 12: + x = 5; + break; + default: + return -EINVAL; + } + + return snprintf(buf, PAGE_SIZE, "%s\n", period_values[x]); +} + +static IIO_DEVICE_ATTR_RO(in_illuminance_period_available, 0); + +static struct attribute *veml6030_event_attributes[] = { + &iio_dev_attr_in_illuminance_period_available.dev_attr.attr, + NULL +}; + +static const struct attribute_group veml6030_event_attr_group = { + .attrs = veml6030_event_attributes, +}; + +static int veml6030_als_pwr_on(struct veml6030_data *data) +{ + return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_SD, 0); +} + +static int veml6030_als_shut_down(struct veml6030_data *data) +{ + return regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_SD, 1); +} + +static void veml6030_als_shut_down_action(void *data) +{ + veml6030_als_shut_down(data); +} + +static const struct iio_event_spec veml6030_event_spec[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = BIT(IIO_EV_INFO_PERIOD) | + BIT(IIO_EV_INFO_ENABLE), + }, +}; + +/* Channel number */ +enum veml6030_chan { + CH_ALS, + CH_WHITE, +}; + +static const struct iio_chan_spec veml6030_channels[] = { + { + .type = IIO_LIGHT, + .channel = CH_ALS, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_PROCESSED) | + BIT(IIO_CHAN_INFO_INT_TIME) | + BIT(IIO_CHAN_INFO_SCALE), + .event_spec = veml6030_event_spec, + .num_event_specs = ARRAY_SIZE(veml6030_event_spec), + }, + { + .type = IIO_INTENSITY, + .channel = CH_WHITE, + .modified = 1, + .channel2 = IIO_MOD_LIGHT_BOTH, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_PROCESSED), + }, +}; + +static const struct regmap_config veml6030_regmap_config = { + .name = "veml6030_regmap", + .reg_bits = 8, + .val_bits = 16, + .max_register = VEML6030_REG_ALS_INT, + .val_format_endian = REGMAP_ENDIAN_LITTLE, +}; + +static int veml6030_get_intgrn_tm(struct iio_dev *indio_dev, + int *val, int *val2) +{ + int ret, reg; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als conf register %d\n", ret); + return ret; + } + + switch ((reg >> 6) & 0xF) { + case 0: + *val2 = 100000; + break; + case 1: + *val2 = 200000; + break; + case 2: + *val2 = 400000; + break; + case 3: + *val2 = 800000; + break; + case 8: + *val2 = 50000; + break; + case 12: + *val2 = 25000; + break; + default: + return -EINVAL; + } + + *val = 0; + return IIO_VAL_INT_PLUS_MICRO; +} + +static int veml6030_set_intgrn_tm(struct iio_dev *indio_dev, + int val, int val2) +{ + int ret, new_int_time, int_idx; + struct veml6030_data *data = iio_priv(indio_dev); + + if (val) + return -EINVAL; + + switch (val2) { + case 25000: + new_int_time = 0x300; + int_idx = 5; + break; + case 50000: + new_int_time = 0x200; + int_idx = 4; + break; + case 100000: + new_int_time = 0x00; + int_idx = 3; + break; + case 200000: + new_int_time = 0x40; + int_idx = 2; + break; + case 400000: + new_int_time = 0x80; + int_idx = 1; + break; + case 800000: + new_int_time = 0xC0; + int_idx = 0; + break; + default: + return -EINVAL; + } + + ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_IT, new_int_time); + if (ret) { + dev_err(&data->client->dev, + "can't update als integration time %d\n", ret); + return ret; + } + + /* + * Cache current integration time and update resolution. For every + * increase in integration time to next level, resolution is halved + * and vice-versa. + */ + if (data->cur_integration_time < int_idx) + data->cur_resolution <<= int_idx - data->cur_integration_time; + else if (data->cur_integration_time > int_idx) + data->cur_resolution >>= data->cur_integration_time - int_idx; + + data->cur_integration_time = int_idx; + + return ret; +} + +static int veml6030_read_persistence(struct iio_dev *indio_dev, + int *val, int *val2) +{ + int ret, reg, period, x, y; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = veml6030_get_intgrn_tm(indio_dev, &x, &y); + if (ret < 0) + return ret; + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als conf register %d\n", ret); + } + + /* integration time multiplied by 1/2/4/8 */ + period = y * (1 << ((reg >> 4) & 0x03)); + + *val = period / 1000000; + *val2 = period % 1000000; + + return IIO_VAL_INT_PLUS_MICRO; +} + +static int veml6030_write_persistence(struct iio_dev *indio_dev, + int val, int val2) +{ + int ret, period, x, y; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = veml6030_get_intgrn_tm(indio_dev, &x, &y); + if (ret < 0) + return ret; + + if (!val) { + period = val2 / y; + } else { + if ((val == 1) && (val2 == 600000)) + period = 1600000 / y; + else if ((val == 3) && (val2 == 200000)) + period = 3200000 / y; + else if ((val == 6) && (val2 == 400000)) + period = 6400000 / y; + else + period = -1; + } + + if (period <= 0 || period > 8 || hweight8(period) != 1) + return -EINVAL; + + ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_PERS, (ffs(period) - 1) << 4); + if (ret) + dev_err(&data->client->dev, + "can't set persistence value %d\n", ret); + + return ret; +} + +static int veml6030_set_als_gain(struct iio_dev *indio_dev, + int val, int val2) +{ + int ret, new_gain, gain_idx; + struct veml6030_data *data = iio_priv(indio_dev); + + if (val == 0 && val2 == 125000) { + new_gain = 0x1000; /* 0x02 << 11 */ + gain_idx = 3; + } else if (val == 0 && val2 == 250000) { + new_gain = 0x1800; + gain_idx = 2; + } else if (val == 1 && val2 == 0) { + new_gain = 0x00; + gain_idx = 1; + } else if (val == 2 && val2 == 0) { + new_gain = 0x800; + gain_idx = 0; + } else { + return -EINVAL; + } + + ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_GAIN, new_gain); + if (ret) { + dev_err(&data->client->dev, + "can't set als gain %d\n", ret); + return ret; + } + + /* + * Cache currently set gain & update resolution. For every + * increase in the gain to next level, resolution is halved + * and vice-versa. + */ + if (data->cur_gain < gain_idx) + data->cur_resolution <<= gain_idx - data->cur_gain; + else if (data->cur_gain > gain_idx) + data->cur_resolution >>= data->cur_gain - gain_idx; + + data->cur_gain = gain_idx; + + return ret; +} + +static int veml6030_get_als_gain(struct iio_dev *indio_dev, + int *val, int *val2) +{ + int ret, reg; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als conf register %d\n", ret); + return ret; + } + + switch ((reg >> 11) & 0x03) { + case 0: + *val = 1; + *val2 = 0; + break; + case 1: + *val = 2; + *val2 = 0; + break; + case 2: + *val = 0; + *val2 = 125000; + break; + case 3: + *val = 0; + *val2 = 250000; + break; + default: + return -EINVAL; + } + + return IIO_VAL_INT_PLUS_MICRO; +} + +static int veml6030_read_thresh(struct iio_dev *indio_dev, + int *val, int *val2, int dir) +{ + int ret, reg; + struct veml6030_data *data = iio_priv(indio_dev); + + if (dir == IIO_EV_DIR_RISING) + ret = regmap_read(data->regmap, VEML6030_REG_ALS_WH, ®); + else + ret = regmap_read(data->regmap, VEML6030_REG_ALS_WL, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als threshold value %d\n", ret); + return ret; + } + + *val = reg & 0xffff; + return IIO_VAL_INT; +} + +static int veml6030_write_thresh(struct iio_dev *indio_dev, + int val, int val2, int dir) +{ + int ret; + struct veml6030_data *data = iio_priv(indio_dev); + + if (val > 0xFFFF || val < 0 || val2) + return -EINVAL; + + if (dir == IIO_EV_DIR_RISING) { + ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, val); + if (ret) + dev_err(&data->client->dev, + "can't set high threshold %d\n", ret); + } else { + ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, val); + if (ret) + dev_err(&data->client->dev, + "can't set low threshold %d\n", ret); + } + + return ret; +} + +/* + * Provide both raw as well as light reading in lux. + * light (in lux) = resolution * raw reading + */ +static int veml6030_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + int ret, reg; + struct veml6030_data *data = iio_priv(indio_dev); + struct regmap *regmap = data->regmap; + struct device *dev = &data->client->dev; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + case IIO_CHAN_INFO_PROCESSED: + switch (chan->type) { + case IIO_LIGHT: + ret = regmap_read(regmap, VEML6030_REG_ALS_DATA, ®); + if (ret < 0) { + dev_err(dev, "can't read als data %d\n", ret); + return ret; + } + if (mask == IIO_CHAN_INFO_PROCESSED) { + *val = (reg * data->cur_resolution) / 10000; + *val2 = (reg * data->cur_resolution) % 10000; + return IIO_VAL_INT_PLUS_MICRO; + } + *val = reg; + return IIO_VAL_INT; + case IIO_INTENSITY: + ret = regmap_read(regmap, VEML6030_REG_WH_DATA, ®); + if (ret < 0) { + dev_err(dev, "can't read white data %d\n", ret); + return ret; + } + if (mask == IIO_CHAN_INFO_PROCESSED) { + *val = (reg * data->cur_resolution) / 10000; + *val2 = (reg * data->cur_resolution) % 10000; + return IIO_VAL_INT_PLUS_MICRO; + } + *val = reg; + return IIO_VAL_INT; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_INT_TIME: + if (chan->type == IIO_LIGHT) + return veml6030_get_intgrn_tm(indio_dev, val, val2); + return -EINVAL; + case IIO_CHAN_INFO_SCALE: + if (chan->type == IIO_LIGHT) + return veml6030_get_als_gain(indio_dev, val, val2); + return -EINVAL; + default: + return -EINVAL; + } +} + +static int veml6030_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_INT_TIME: + switch (chan->type) { + case IIO_LIGHT: + return veml6030_set_intgrn_tm(indio_dev, val, val2); + default: + return -EINVAL; + } + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_LIGHT: + return veml6030_set_als_gain(indio_dev, val, val2); + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} + +static int veml6030_read_event_val(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, enum iio_event_type type, + enum iio_event_direction dir, enum iio_event_info info, + int *val, int *val2) +{ + switch (info) { + case IIO_EV_INFO_VALUE: + switch (dir) { + case IIO_EV_DIR_RISING: + case IIO_EV_DIR_FALLING: + return veml6030_read_thresh(indio_dev, val, val2, dir); + default: + return -EINVAL; + } + break; + case IIO_EV_INFO_PERIOD: + return veml6030_read_persistence(indio_dev, val, val2); + default: + return -EINVAL; + } +} + +static int veml6030_write_event_val(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, enum iio_event_type type, + enum iio_event_direction dir, enum iio_event_info info, + int val, int val2) +{ + switch (info) { + case IIO_EV_INFO_VALUE: + return veml6030_write_thresh(indio_dev, val, val2, dir); + case IIO_EV_INFO_PERIOD: + return veml6030_write_persistence(indio_dev, val, val2); + default: + return -EINVAL; + } +} + +static int veml6030_read_interrupt_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, enum iio_event_type type, + enum iio_event_direction dir) +{ + int ret, reg; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_CONF, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als conf register %d\n", ret); + return ret; + } + + if (reg & VEML6030_ALS_INT_EN) + return 1; + else + return 0; +} + +/* + * Sensor should not be measuring light when interrupt is configured. + * Therefore correct sequence to configure interrupt functionality is: + * shut down -> enable/disable interrupt -> power on + * + * state = 1 enables interrupt, state = 0 disables interrupt + */ +static int veml6030_write_interrupt_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + int ret; + struct veml6030_data *data = iio_priv(indio_dev); + + if (state < 0 || state > 1) + return -EINVAL; + + ret = veml6030_als_shut_down(data); + if (ret < 0) { + dev_err(&data->client->dev, + "can't disable als to configure interrupt %d\n", ret); + return ret; + } + + /* enable interrupt + power on */ + ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_CONF, + VEML6030_ALS_INT_EN | VEML6030_ALS_SD, state << 1); + if (ret) + dev_err(&data->client->dev, + "can't enable interrupt & poweron als %d\n", ret); + + return ret; +} + +static const struct iio_info veml6030_info = { + .read_raw = veml6030_read_raw, + .write_raw = veml6030_write_raw, + .read_event_value = veml6030_read_event_val, + .write_event_value = veml6030_write_event_val, + .read_event_config = veml6030_read_interrupt_config, + .write_event_config = veml6030_write_interrupt_config, + .attrs = &veml6030_attr_group, + .event_attrs = &veml6030_event_attr_group, +}; + +static const struct iio_info veml6030_info_no_irq = { + .read_raw = veml6030_read_raw, + .write_raw = veml6030_write_raw, + .attrs = &veml6030_attr_group, +}; + +static irqreturn_t veml6030_event_handler(int irq, void *private) +{ + int ret, reg, evtdir; + struct iio_dev *indio_dev = private; + struct veml6030_data *data = iio_priv(indio_dev); + + ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, ®); + if (ret) { + dev_err(&data->client->dev, + "can't read als interrupt register %d\n", ret); + return IRQ_HANDLED; + } + + /* Spurious interrupt handling */ + if (!(reg & (VEML6030_INT_TH_HIGH | VEML6030_INT_TH_LOW))) + return IRQ_NONE; + + if (reg & VEML6030_INT_TH_HIGH) + evtdir = IIO_EV_DIR_RISING; + else + evtdir = IIO_EV_DIR_FALLING; + + iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, + 0, IIO_EV_TYPE_THRESH, evtdir), + iio_get_time_ns(indio_dev)); + + return IRQ_HANDLED; +} + +/* + * Set ALS gain to 1/8, integration time to 100 ms, PSM to mode 2, + * persistence to 1 x integration time and the threshold + * interrupt disabled by default. First shutdown the sensor, + * update registers and then power on the sensor. + */ +static int veml6030_hw_init(struct iio_dev *indio_dev) +{ + int ret, val; + struct veml6030_data *data = iio_priv(indio_dev); + struct i2c_client *client = data->client; + + ret = veml6030_als_shut_down(data); + if (ret) { + dev_err(&client->dev, "can't shutdown als %d\n", ret); + return ret; + } + + ret = regmap_write(data->regmap, VEML6030_REG_ALS_CONF, 0x1001); + if (ret) { + dev_err(&client->dev, "can't setup als configs %d\n", ret); + return ret; + } + + ret = regmap_update_bits(data->regmap, VEML6030_REG_ALS_PSM, + VEML6030_PSM | VEML6030_PSM_EN, 0x03); + if (ret) { + dev_err(&client->dev, "can't setup default PSM %d\n", ret); + return ret; + } + + ret = regmap_write(data->regmap, VEML6030_REG_ALS_WH, 0xFFFF); + if (ret) { + dev_err(&client->dev, "can't setup high threshold %d\n", ret); + return ret; + } + + ret = regmap_write(data->regmap, VEML6030_REG_ALS_WL, 0x0000); + if (ret) { + dev_err(&client->dev, "can't setup low threshold %d\n", ret); + return ret; + } + + ret = veml6030_als_pwr_on(data); + if (ret) { + dev_err(&client->dev, "can't poweron als %d\n", ret); + return ret; + } + + /* Wait 4 ms to let processor & oscillator start correctly */ + usleep_range(4000, 4002); + + /* Clear stale interrupt status bits if any during start */ + ret = regmap_read(data->regmap, VEML6030_REG_ALS_INT, &val); + if (ret < 0) { + dev_err(&client->dev, + "can't clear als interrupt status %d\n", ret); + return ret; + } + + /* Cache currently active measurement parameters */ + data->cur_gain = 3; + data->cur_resolution = 4608; + data->cur_integration_time = 3; + + return ret; +} + +static int veml6030_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret; + struct veml6030_data *data; + struct iio_dev *indio_dev; + struct regmap *regmap; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { + dev_err(&client->dev, "i2c adapter doesn't support plain i2c\n"); + return -EOPNOTSUPP; + } + + regmap = devm_regmap_init_i2c(client, &veml6030_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&client->dev, "can't setup regmap\n"); + return PTR_ERR(regmap); + } + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + data = iio_priv(indio_dev); + i2c_set_clientdata(client, indio_dev); + data->client = client; + data->regmap = regmap; + + indio_dev->dev.parent = &client->dev; + indio_dev->name = "veml6030"; + indio_dev->channels = veml6030_channels; + indio_dev->num_channels = ARRAY_SIZE(veml6030_channels); + indio_dev->modes = INDIO_DIRECT_MODE; + + if (client->irq) { + ret = devm_request_threaded_irq(&client->dev, client->irq, + NULL, veml6030_event_handler, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "veml6030", indio_dev); + if (ret < 0) { + dev_err(&client->dev, + "irq %d request failed\n", client->irq); + return ret; + } + indio_dev->info = &veml6030_info; + } else { + indio_dev->info = &veml6030_info_no_irq; + } + + ret = veml6030_hw_init(indio_dev); + if (ret < 0) + return ret; + + ret = devm_add_action_or_reset(&client->dev, + veml6030_als_shut_down_action, data); + if (ret < 0) + return ret; + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static int __maybe_unused veml6030_runtime_suspend(struct device *dev) +{ + int ret; + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); + struct veml6030_data *data = iio_priv(indio_dev); + + ret = veml6030_als_shut_down(data); + if (ret < 0) + dev_err(&data->client->dev, "can't suspend als %d\n", ret); + + return ret; +} + +static int __maybe_unused veml6030_runtime_resume(struct device *dev) +{ + int ret; + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); + struct veml6030_data *data = iio_priv(indio_dev); + + ret = veml6030_als_pwr_on(data); + if (ret < 0) + dev_err(&data->client->dev, "can't resume als %d\n", ret); + + return ret; +} + +static const struct dev_pm_ops veml6030_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(veml6030_runtime_suspend, + veml6030_runtime_resume, NULL) +}; + +static const struct of_device_id veml6030_of_match[] = { + { .compatible = "vishay,veml6030" }, + { } +}; +MODULE_DEVICE_TABLE(of, veml6030_of_match); + +static const struct i2c_device_id veml6030_id[] = { + { "veml6030", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, veml6030_id); + +static struct i2c_driver veml6030_driver = { + .driver = { + .name = "veml6030", + .of_match_table = veml6030_of_match, + .pm = &veml6030_pm_ops, + }, + .probe = veml6030_probe, + .id_table = veml6030_id, +}; +module_i2c_driver(veml6030_driver); + +MODULE_AUTHOR("Rishi Gupta "); +MODULE_DESCRIPTION("VEML6030 Ambient Light Sensor"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/magnetometer/st_magn_core.c b/drivers/iio/magnetometer/st_magn_core.c index a3a268ee2896..e68184a93a6d 100644 --- a/drivers/iio/magnetometer/st_magn_core.c +++ b/drivers/iio/magnetometer/st_magn_core.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/pressure/bmp280-core.c b/drivers/iio/pressure/bmp280-core.c index 8d0f15f27dc5..29c209cc1108 100644 --- a/drivers/iio/pressure/bmp280-core.c +++ b/drivers/iio/pressure/bmp280-core.c @@ -74,6 +74,12 @@ struct bmp280_calib { s8 H6; }; +static const char *const bmp280_supply_names[] = { + "vddd", "vdda" +}; + +#define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) + struct bmp280_data { struct device *dev; struct mutex lock; @@ -85,8 +91,7 @@ struct bmp280_data { struct bmp180_calib bmp180; struct bmp280_calib bmp280; } calib; - struct regulator *vddd; - struct regulator *vdda; + struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; unsigned int start_up_time; /* in microseconds */ /* log of base 2 of oversampling rate */ @@ -148,6 +153,8 @@ static int bmp280_read_calib(struct bmp280_data *data, { int ret; unsigned int tmp; + __le16 l16; + __be16 b16; struct device *dev = data->dev; __le16 t_buf[BMP280_COMP_TEMP_REG_COUNT / 2]; __le16 p_buf[BMP280_COMP_PRESS_REG_COUNT / 2]; @@ -207,12 +214,12 @@ static int bmp280_read_calib(struct bmp280_data *data, } calib->H1 = tmp; - ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H2, &tmp, 2); + ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H2, &l16, 2); if (ret < 0) { dev_err(dev, "failed to read H2 comp value\n"); return ret; } - calib->H2 = sign_extend32(le16_to_cpu(tmp), 15); + calib->H2 = sign_extend32(le16_to_cpu(l16), 15); ret = regmap_read(data->regmap, BMP280_REG_COMP_H3, &tmp); if (ret < 0) { @@ -221,20 +228,20 @@ static int bmp280_read_calib(struct bmp280_data *data, } calib->H3 = tmp; - ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H4, &tmp, 2); + ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H4, &b16, 2); if (ret < 0) { dev_err(dev, "failed to read H4 comp value\n"); return ret; } - calib->H4 = sign_extend32(((be16_to_cpu(tmp) >> 4) & 0xff0) | - (be16_to_cpu(tmp) & 0xf), 11); + calib->H4 = sign_extend32(((be16_to_cpu(b16) >> 4) & 0xff0) | + (be16_to_cpu(b16) & 0xf), 11); - ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H5, &tmp, 2); + ret = regmap_bulk_read(data->regmap, BMP280_REG_COMP_H5, &l16, 2); if (ret < 0) { dev_err(dev, "failed to read H5 comp value\n"); return ret; } - calib->H5 = sign_extend32(((le16_to_cpu(tmp) >> 4) & 0xfff), 11); + calib->H5 = sign_extend32(((le16_to_cpu(l16) >> 4) & 0xfff), 11); ret = regmap_read(data->regmap, BMP280_REG_COMP_H6, &tmp); if (ret < 0) { @@ -979,6 +986,22 @@ static int bmp085_fetch_eoc_irq(struct device *dev, return 0; } +static void bmp280_pm_disable(void *data) +{ + struct device *dev = data; + + pm_runtime_get_sync(dev); + pm_runtime_put_noidle(dev); + pm_runtime_disable(dev); +} + +static void bmp280_regulators_disable(void *data) +{ + struct regulator_bulk_data *supplies = data; + + regulator_bulk_disable(BMP280_NUM_SUPPLIES, supplies); +} + int bmp280_common_probe(struct device *dev, struct regmap *regmap, unsigned int chip, @@ -1033,27 +1056,28 @@ int bmp280_common_probe(struct device *dev, } /* Bring up regulators */ - data->vddd = devm_regulator_get(dev, "vddd"); - if (IS_ERR(data->vddd)) { - dev_err(dev, "failed to get VDDD regulator\n"); - return PTR_ERR(data->vddd); - } - ret = regulator_enable(data->vddd); + regulator_bulk_set_supply_names(data->supplies, + bmp280_supply_names, + BMP280_NUM_SUPPLIES); + + ret = devm_regulator_bulk_get(dev, + BMP280_NUM_SUPPLIES, data->supplies); if (ret) { - dev_err(dev, "failed to enable VDDD regulator\n"); + dev_err(dev, "failed to get regulators\n"); return ret; } - data->vdda = devm_regulator_get(dev, "vdda"); - if (IS_ERR(data->vdda)) { - dev_err(dev, "failed to get VDDA regulator\n"); - ret = PTR_ERR(data->vdda); - goto out_disable_vddd; - } - ret = regulator_enable(data->vdda); + + ret = regulator_bulk_enable(BMP280_NUM_SUPPLIES, data->supplies); if (ret) { - dev_err(dev, "failed to enable VDDA regulator\n"); - goto out_disable_vddd; + dev_err(dev, "failed to enable regulators\n"); + return ret; } + + ret = devm_add_action_or_reset(dev, bmp280_regulators_disable, + data->supplies); + if (ret) + return ret; + /* Wait to make sure we started up properly */ usleep_range(data->start_up_time, data->start_up_time + 100); @@ -1068,17 +1092,16 @@ int bmp280_common_probe(struct device *dev, data->regmap = regmap; ret = regmap_read(regmap, BMP280_REG_ID, &chip_id); if (ret < 0) - goto out_disable_vdda; + return ret; if (chip_id != chip) { dev_err(dev, "bad chip id: expected %x got %x\n", chip, chip_id); - ret = -EINVAL; - goto out_disable_vdda; + return -EINVAL; } ret = data->chip_info->chip_config(data); if (ret < 0) - goto out_disable_vdda; + return ret; dev_set_drvdata(dev, indio_dev); @@ -1092,14 +1115,14 @@ int bmp280_common_probe(struct device *dev, if (ret < 0) { dev_err(data->dev, "failed to read calibration coefficients\n"); - goto out_disable_vdda; + return ret; } } else if (chip_id == BMP280_CHIP_ID || chip_id == BME280_CHIP_ID) { ret = bmp280_read_calib(data, &data->calib.bmp280, chip_id); if (ret < 0) { dev_err(data->dev, "failed to read calibration coefficients\n"); - goto out_disable_vdda; + return ret; } } @@ -1111,7 +1134,7 @@ int bmp280_common_probe(struct device *dev, if (irq > 0 || (chip_id == BMP180_CHIP_ID)) { ret = bmp085_fetch_eoc_irq(dev, name, irq, data); if (ret) - goto out_disable_vdda; + return ret; } /* Enable runtime PM */ @@ -1126,51 +1149,21 @@ int bmp280_common_probe(struct device *dev, pm_runtime_use_autosuspend(dev); pm_runtime_put(dev); - ret = iio_device_register(indio_dev); + ret = devm_add_action_or_reset(dev, bmp280_pm_disable, dev); if (ret) - goto out_runtime_pm_disable; + return ret; - - return 0; - -out_runtime_pm_disable: - pm_runtime_get_sync(data->dev); - pm_runtime_put_noidle(data->dev); - pm_runtime_disable(data->dev); -out_disable_vdda: - regulator_disable(data->vdda); -out_disable_vddd: - regulator_disable(data->vddd); - return ret; + return devm_iio_device_register(dev, indio_dev); } EXPORT_SYMBOL(bmp280_common_probe); -int bmp280_common_remove(struct device *dev) -{ - struct iio_dev *indio_dev = dev_get_drvdata(dev); - struct bmp280_data *data = iio_priv(indio_dev); - - iio_device_unregister(indio_dev); - pm_runtime_get_sync(data->dev); - pm_runtime_put_noidle(data->dev); - pm_runtime_disable(data->dev); - regulator_disable(data->vdda); - regulator_disable(data->vddd); - return 0; -} -EXPORT_SYMBOL(bmp280_common_remove); - #ifdef CONFIG_PM static int bmp280_runtime_suspend(struct device *dev) { struct iio_dev *indio_dev = dev_get_drvdata(dev); struct bmp280_data *data = iio_priv(indio_dev); - int ret; - ret = regulator_disable(data->vdda); - if (ret) - return ret; - return regulator_disable(data->vddd); + return regulator_bulk_disable(BMP280_NUM_SUPPLIES, data->supplies); } static int bmp280_runtime_resume(struct device *dev) @@ -1179,10 +1172,7 @@ static int bmp280_runtime_resume(struct device *dev) struct bmp280_data *data = iio_priv(indio_dev); int ret; - ret = regulator_enable(data->vddd); - if (ret) - return ret; - ret = regulator_enable(data->vdda); + ret = regulator_bulk_enable(BMP280_NUM_SUPPLIES, data->supplies); if (ret) return ret; usleep_range(data->start_up_time, data->start_up_time + 100); diff --git a/drivers/iio/pressure/bmp280-i2c.c b/drivers/iio/pressure/bmp280-i2c.c index acd9a3784fb4..3109c8e2cc11 100644 --- a/drivers/iio/pressure/bmp280-i2c.c +++ b/drivers/iio/pressure/bmp280-i2c.c @@ -38,11 +38,6 @@ static int bmp280_i2c_probe(struct i2c_client *client, client->irq); } -static int bmp280_i2c_remove(struct i2c_client *client) -{ - return bmp280_common_remove(&client->dev); -} - static const struct acpi_device_id bmp280_acpi_i2c_match[] = { {"BMP0280", BMP280_CHIP_ID }, {"BMP0180", BMP180_CHIP_ID }, @@ -82,7 +77,6 @@ static struct i2c_driver bmp280_i2c_driver = { .pm = &bmp280_dev_pm_ops, }, .probe = bmp280_i2c_probe, - .remove = bmp280_i2c_remove, .id_table = bmp280_i2c_id, }; module_i2c_driver(bmp280_i2c_driver); diff --git a/drivers/iio/pressure/bmp280-spi.c b/drivers/iio/pressure/bmp280-spi.c index 9d57b7a3b134..625b86878ad8 100644 --- a/drivers/iio/pressure/bmp280-spi.c +++ b/drivers/iio/pressure/bmp280-spi.c @@ -86,11 +86,6 @@ static int bmp280_spi_probe(struct spi_device *spi) spi->irq); } -static int bmp280_spi_remove(struct spi_device *spi) -{ - return bmp280_common_remove(&spi->dev); -} - static const struct of_device_id bmp280_of_spi_match[] = { { .compatible = "bosch,bmp085", }, { .compatible = "bosch,bmp180", }, @@ -118,7 +113,6 @@ static struct spi_driver bmp280_spi_driver = { }, .id_table = bmp280_spi_id, .probe = bmp280_spi_probe, - .remove = bmp280_spi_remove, }; module_spi_driver(bmp280_spi_driver); diff --git a/drivers/iio/pressure/bmp280.h b/drivers/iio/pressure/bmp280.h index eda50ef65706..57ba0e85db91 100644 --- a/drivers/iio/pressure/bmp280.h +++ b/drivers/iio/pressure/bmp280.h @@ -112,7 +112,6 @@ int bmp280_common_probe(struct device *dev, unsigned int chip, const char *name, int irq); -int bmp280_common_remove(struct device *dev); /* PM ops */ extern const struct dev_pm_ops bmp280_dev_pm_ops; diff --git a/drivers/iio/pressure/cros_ec_baro.c b/drivers/iio/pressure/cros_ec_baro.c index 2354302375de..52f53f3123b1 100644 --- a/drivers/iio/pressure/cros_ec_baro.c +++ b/drivers/iio/pressure/cros_ec_baro.c @@ -114,6 +114,7 @@ static int cros_ec_baro_write(struct iio_dev *indio_dev, static const struct iio_info cros_ec_baro_info = { .read_raw = &cros_ec_baro_read, .write_raw = &cros_ec_baro_write, + .read_avail = &cros_ec_sensors_core_read_avail, }; static int cros_ec_baro_probe(struct platform_device *pdev) @@ -149,6 +150,8 @@ static int cros_ec_baro_probe(struct platform_device *pdev) BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ) | BIT(IIO_CHAN_INFO_FREQUENCY); + channel->info_mask_shared_by_all_available = + BIT(IIO_CHAN_INFO_SAMP_FREQ); channel->scan_type.realbits = CROS_EC_SENSOR_BITS; channel->scan_type.storagebits = CROS_EC_SENSOR_BITS; channel->scan_type.shift = 0; diff --git a/drivers/iio/pressure/st_pressure_core.c b/drivers/iio/pressure/st_pressure_core.c index ca6863b32a5f..bd972cec4830 100644 --- a/drivers/iio/pressure/st_pressure_core.c +++ b/drivers/iio/pressure/st_pressure_core.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/pressure/zpa2326.c b/drivers/iio/pressure/zpa2326.c index 9d0d07930236..99dfe33ee402 100644 --- a/drivers/iio/pressure/zpa2326.c +++ b/drivers/iio/pressure/zpa2326.c @@ -1243,6 +1243,11 @@ static int zpa2326_postenable_buffer(struct iio_dev *indio_dev) const struct zpa2326_private *priv = iio_priv(indio_dev); int err; + /* Plug our own trigger event handler. */ + err = iio_triggered_buffer_postenable(indio_dev); + if (err) + goto err; + if (!priv->waken) { /* * We were already power supplied. Just clear hardware FIFO to @@ -1250,7 +1255,7 @@ static int zpa2326_postenable_buffer(struct iio_dev *indio_dev) */ err = zpa2326_clear_fifo(indio_dev, 0); if (err) - goto err; + goto err_buffer_predisable; } if (!iio_trigger_using_own(indio_dev) && priv->waken) { @@ -1260,16 +1265,13 @@ static int zpa2326_postenable_buffer(struct iio_dev *indio_dev) */ err = zpa2326_config_oneshot(indio_dev, priv->irq); if (err) - goto err; + goto err_buffer_predisable; } - /* Plug our own trigger event handler. */ - err = iio_triggered_buffer_postenable(indio_dev); - if (err) - goto err; - return 0; +err_buffer_predisable: + iio_triggered_buffer_predisable(indio_dev); err: zpa2326_err(indio_dev, "failed to enable buffering (%d)", err); diff --git a/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c b/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c index 47af54f14756..5b369645ef49 100644 --- a/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c +++ b/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c @@ -136,12 +136,13 @@ static inline int lidar_write_power(struct lidar_data *data, int val) static int lidar_read_measurement(struct lidar_data *data, u16 *reg) { + __be16 value; int ret = data->xfer(data, LIDAR_REG_DATA_HBYTE | (data->i2c_enabled ? LIDAR_REG_DATA_WORD_READ : 0), - (u8 *) reg, 2); + (u8 *) &value, 2); if (!ret) - *reg = be16_to_cpu(*reg); + *reg = be16_to_cpu(value); return ret; } diff --git a/drivers/iio/proximity/sx9500.c b/drivers/iio/proximity/sx9500.c index 612f79c53cfc..287d288e40c2 100644 --- a/drivers/iio/proximity/sx9500.c +++ b/drivers/iio/proximity/sx9500.c @@ -675,11 +675,15 @@ out: return IRQ_HANDLED; } -static int sx9500_buffer_preenable(struct iio_dev *indio_dev) +static int sx9500_buffer_postenable(struct iio_dev *indio_dev) { struct sx9500_data *data = iio_priv(indio_dev); int ret = 0, i; + ret = iio_triggered_buffer_postenable(indio_dev); + if (ret) + return ret; + mutex_lock(&data->mutex); for (i = 0; i < SX9500_NUM_CHANNELS; i++) @@ -696,6 +700,9 @@ static int sx9500_buffer_preenable(struct iio_dev *indio_dev) mutex_unlock(&data->mutex); + if (ret) + iio_triggered_buffer_predisable(indio_dev); + return ret; } @@ -704,8 +711,6 @@ static int sx9500_buffer_predisable(struct iio_dev *indio_dev) struct sx9500_data *data = iio_priv(indio_dev); int ret = 0, i; - iio_triggered_buffer_predisable(indio_dev); - mutex_lock(&data->mutex); for (i = 0; i < SX9500_NUM_CHANNELS; i++) @@ -722,12 +727,13 @@ static int sx9500_buffer_predisable(struct iio_dev *indio_dev) mutex_unlock(&data->mutex); + iio_triggered_buffer_predisable(indio_dev); + return ret; } static const struct iio_buffer_setup_ops sx9500_buffer_setup_ops = { - .preenable = sx9500_buffer_preenable, - .postenable = iio_triggered_buffer_postenable, + .postenable = sx9500_buffer_postenable, .predisable = sx9500_buffer_predisable, }; diff --git a/drivers/iio/temperature/Kconfig b/drivers/iio/temperature/Kconfig index 737faa0901fe..e1ccb4003015 100644 --- a/drivers/iio/temperature/Kconfig +++ b/drivers/iio/temperature/Kconfig @@ -4,6 +4,17 @@ # menu "Temperature sensors" +config LTC2983 + tristate "Analog Devices Multi-Sensor Digital Temperature Measurement System" + depends on SPI + select REGMAP_SPI + help + Say yes here to build support for the LTC2983 Multi-Sensor + high accuracy digital temperature measurement system. + + To compile this driver as a module, choose M here: the module + will be called ltc2983. + config MAXIM_THERMOCOUPLE tristate "Maxim thermocouple sensors" depends on SPI diff --git a/drivers/iio/temperature/Makefile b/drivers/iio/temperature/Makefile index baca4776ca0d..d6b850b0cf63 100644 --- a/drivers/iio/temperature/Makefile +++ b/drivers/iio/temperature/Makefile @@ -3,6 +3,7 @@ # Makefile for industrial I/O temperature drivers # +obj-$(CONFIG_LTC2983) += ltc2983.o obj-$(CONFIG_HID_SENSOR_TEMP) += hid-sensor-temperature.o obj-$(CONFIG_MAXIM_THERMOCOUPLE) += maxim_thermocouple.o obj-$(CONFIG_MAX31856) += max31856.o diff --git a/drivers/iio/temperature/ltc2983.c b/drivers/iio/temperature/ltc2983.c new file mode 100644 index 000000000000..ddf47023364b --- /dev/null +++ b/drivers/iio/temperature/ltc2983.c @@ -0,0 +1,1557 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System + * driver + * + * Copyright 2019 Analog Devices Inc. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* register map */ +#define LTC2983_STATUS_REG 0x0000 +#define LTC2983_TEMP_RES_START_REG 0x0010 +#define LTC2983_TEMP_RES_END_REG 0x005F +#define LTC2983_GLOBAL_CONFIG_REG 0x00F0 +#define LTC2983_MULT_CHANNEL_START_REG 0x00F4 +#define LTC2983_MULT_CHANNEL_END_REG 0x00F7 +#define LTC2983_MUX_CONFIG_REG 0x00FF +#define LTC2983_CHAN_ASSIGN_START_REG 0x0200 +#define LTC2983_CHAN_ASSIGN_END_REG 0x024F +#define LTC2983_CUST_SENS_TBL_START_REG 0x0250 +#define LTC2983_CUST_SENS_TBL_END_REG 0x03CF + +#define LTC2983_DIFFERENTIAL_CHAN_MIN 2 +#define LTC2983_MAX_CHANNELS_NR 20 +#define LTC2983_MIN_CHANNELS_NR 1 +#define LTC2983_SLEEP 0x97 +#define LTC2983_CUSTOM_STEINHART_SIZE 24 +#define LTC2983_CUSTOM_SENSOR_ENTRY_SZ 6 +#define LTC2983_CUSTOM_STEINHART_ENTRY_SZ 4 + +#define LTC2983_CHAN_START_ADDR(chan) \ + (((chan - 1) * 4) + LTC2983_CHAN_ASSIGN_START_REG) +#define LTC2983_CHAN_RES_ADDR(chan) \ + (((chan - 1) * 4) + LTC2983_TEMP_RES_START_REG) +#define LTC2983_THERMOCOUPLE_DIFF_MASK BIT(3) +#define LTC2983_THERMOCOUPLE_SGL(x) \ + FIELD_PREP(LTC2983_THERMOCOUPLE_DIFF_MASK, x) +#define LTC2983_THERMOCOUPLE_OC_CURR_MASK GENMASK(1, 0) +#define LTC2983_THERMOCOUPLE_OC_CURR(x) \ + FIELD_PREP(LTC2983_THERMOCOUPLE_OC_CURR_MASK, x) +#define LTC2983_THERMOCOUPLE_OC_CHECK_MASK BIT(2) +#define LTC2983_THERMOCOUPLE_OC_CHECK(x) \ + FIELD_PREP(LTC2983_THERMOCOUPLE_OC_CHECK_MASK, x) + +#define LTC2983_THERMISTOR_DIFF_MASK BIT(2) +#define LTC2983_THERMISTOR_SGL(x) \ + FIELD_PREP(LTC2983_THERMISTOR_DIFF_MASK, x) +#define LTC2983_THERMISTOR_R_SHARE_MASK BIT(1) +#define LTC2983_THERMISTOR_R_SHARE(x) \ + FIELD_PREP(LTC2983_THERMISTOR_R_SHARE_MASK, x) +#define LTC2983_THERMISTOR_C_ROTATE_MASK BIT(0) +#define LTC2983_THERMISTOR_C_ROTATE(x) \ + FIELD_PREP(LTC2983_THERMISTOR_C_ROTATE_MASK, x) + +#define LTC2983_DIODE_DIFF_MASK BIT(2) +#define LTC2983_DIODE_SGL(x) \ + FIELD_PREP(LTC2983_DIODE_DIFF_MASK, x) +#define LTC2983_DIODE_3_CONV_CYCLE_MASK BIT(1) +#define LTC2983_DIODE_3_CONV_CYCLE(x) \ + FIELD_PREP(LTC2983_DIODE_3_CONV_CYCLE_MASK, x) +#define LTC2983_DIODE_AVERAGE_ON_MASK BIT(0) +#define LTC2983_DIODE_AVERAGE_ON(x) \ + FIELD_PREP(LTC2983_DIODE_AVERAGE_ON_MASK, x) + +#define LTC2983_RTD_4_WIRE_MASK BIT(3) +#define LTC2983_RTD_ROTATION_MASK BIT(1) +#define LTC2983_RTD_C_ROTATE(x) \ + FIELD_PREP(LTC2983_RTD_ROTATION_MASK, x) +#define LTC2983_RTD_KELVIN_R_SENSE_MASK GENMASK(3, 2) +#define LTC2983_RTD_N_WIRES_MASK GENMASK(3, 2) +#define LTC2983_RTD_N_WIRES(x) \ + FIELD_PREP(LTC2983_RTD_N_WIRES_MASK, x) +#define LTC2983_RTD_R_SHARE_MASK BIT(0) +#define LTC2983_RTD_R_SHARE(x) \ + FIELD_PREP(LTC2983_RTD_R_SHARE_MASK, 1) + +#define LTC2983_COMMON_HARD_FAULT_MASK GENMASK(31, 30) +#define LTC2983_COMMON_SOFT_FAULT_MASK GENMASK(27, 25) + +#define LTC2983_STATUS_START_MASK BIT(7) +#define LTC2983_STATUS_START(x) FIELD_PREP(LTC2983_STATUS_START_MASK, x) + +#define LTC2983_STATUS_CHAN_SEL_MASK GENMASK(4, 0) +#define LTC2983_STATUS_CHAN_SEL(x) \ + FIELD_PREP(LTC2983_STATUS_CHAN_SEL_MASK, x) + +#define LTC2983_TEMP_UNITS_MASK BIT(2) +#define LTC2983_TEMP_UNITS(x) FIELD_PREP(LTC2983_TEMP_UNITS_MASK, x) + +#define LTC2983_NOTCH_FREQ_MASK GENMASK(1, 0) +#define LTC2983_NOTCH_FREQ(x) FIELD_PREP(LTC2983_NOTCH_FREQ_MASK, x) + +#define LTC2983_RES_VALID_MASK BIT(24) +#define LTC2983_DATA_MASK GENMASK(23, 0) +#define LTC2983_DATA_SIGN_BIT 23 + +#define LTC2983_CHAN_TYPE_MASK GENMASK(31, 27) +#define LTC2983_CHAN_TYPE(x) FIELD_PREP(LTC2983_CHAN_TYPE_MASK, x) + +/* cold junction for thermocouples and rsense for rtd's and thermistor's */ +#define LTC2983_CHAN_ASSIGN_MASK GENMASK(26, 22) +#define LTC2983_CHAN_ASSIGN(x) FIELD_PREP(LTC2983_CHAN_ASSIGN_MASK, x) + +#define LTC2983_CUSTOM_LEN_MASK GENMASK(5, 0) +#define LTC2983_CUSTOM_LEN(x) FIELD_PREP(LTC2983_CUSTOM_LEN_MASK, x) + +#define LTC2983_CUSTOM_ADDR_MASK GENMASK(11, 6) +#define LTC2983_CUSTOM_ADDR(x) FIELD_PREP(LTC2983_CUSTOM_ADDR_MASK, x) + +#define LTC2983_THERMOCOUPLE_CFG_MASK GENMASK(21, 18) +#define LTC2983_THERMOCOUPLE_CFG(x) \ + FIELD_PREP(LTC2983_THERMOCOUPLE_CFG_MASK, x) +#define LTC2983_THERMOCOUPLE_HARD_FAULT_MASK GENMASK(31, 29) +#define LTC2983_THERMOCOUPLE_SOFT_FAULT_MASK GENMASK(28, 25) + +#define LTC2983_RTD_CFG_MASK GENMASK(21, 18) +#define LTC2983_RTD_CFG(x) FIELD_PREP(LTC2983_RTD_CFG_MASK, x) +#define LTC2983_RTD_EXC_CURRENT_MASK GENMASK(17, 14) +#define LTC2983_RTD_EXC_CURRENT(x) \ + FIELD_PREP(LTC2983_RTD_EXC_CURRENT_MASK, x) +#define LTC2983_RTD_CURVE_MASK GENMASK(13, 12) +#define LTC2983_RTD_CURVE(x) FIELD_PREP(LTC2983_RTD_CURVE_MASK, x) + +#define LTC2983_THERMISTOR_CFG_MASK GENMASK(21, 19) +#define LTC2983_THERMISTOR_CFG(x) \ + FIELD_PREP(LTC2983_THERMISTOR_CFG_MASK, x) +#define LTC2983_THERMISTOR_EXC_CURRENT_MASK GENMASK(18, 15) +#define LTC2983_THERMISTOR_EXC_CURRENT(x) \ + FIELD_PREP(LTC2983_THERMISTOR_EXC_CURRENT_MASK, x) + +#define LTC2983_DIODE_CFG_MASK GENMASK(26, 24) +#define LTC2983_DIODE_CFG(x) FIELD_PREP(LTC2983_DIODE_CFG_MASK, x) +#define LTC2983_DIODE_EXC_CURRENT_MASK GENMASK(23, 22) +#define LTC2983_DIODE_EXC_CURRENT(x) \ + FIELD_PREP(LTC2983_DIODE_EXC_CURRENT_MASK, x) +#define LTC2983_DIODE_IDEAL_FACTOR_MASK GENMASK(21, 0) +#define LTC2983_DIODE_IDEAL_FACTOR(x) \ + FIELD_PREP(LTC2983_DIODE_IDEAL_FACTOR_MASK, x) + +#define LTC2983_R_SENSE_VAL_MASK GENMASK(26, 0) +#define LTC2983_R_SENSE_VAL(x) FIELD_PREP(LTC2983_R_SENSE_VAL_MASK, x) + +#define LTC2983_ADC_SINGLE_ENDED_MASK BIT(26) +#define LTC2983_ADC_SINGLE_ENDED(x) \ + FIELD_PREP(LTC2983_ADC_SINGLE_ENDED_MASK, x) + +enum { + LTC2983_SENSOR_THERMOCOUPLE = 1, + LTC2983_SENSOR_THERMOCOUPLE_CUSTOM = 9, + LTC2983_SENSOR_RTD = 10, + LTC2983_SENSOR_RTD_CUSTOM = 18, + LTC2983_SENSOR_THERMISTOR = 19, + LTC2983_SENSOR_THERMISTOR_STEINHART = 26, + LTC2983_SENSOR_THERMISTOR_CUSTOM = 27, + LTC2983_SENSOR_DIODE = 28, + LTC2983_SENSOR_SENSE_RESISTOR = 29, + LTC2983_SENSOR_DIRECT_ADC = 30, +}; + +#define to_thermocouple(_sensor) \ + container_of(_sensor, struct ltc2983_thermocouple, sensor) + +#define to_rtd(_sensor) \ + container_of(_sensor, struct ltc2983_rtd, sensor) + +#define to_thermistor(_sensor) \ + container_of(_sensor, struct ltc2983_thermistor, sensor) + +#define to_diode(_sensor) \ + container_of(_sensor, struct ltc2983_diode, sensor) + +#define to_rsense(_sensor) \ + container_of(_sensor, struct ltc2983_rsense, sensor) + +#define to_adc(_sensor) \ + container_of(_sensor, struct ltc2983_adc, sensor) + +struct ltc2983_data { + struct regmap *regmap; + struct spi_device *spi; + struct mutex lock; + struct completion completion; + struct iio_chan_spec *iio_chan; + struct ltc2983_sensor **sensors; + u32 mux_delay_config; + u32 filter_notch_freq; + u16 custom_table_size; + u8 num_channels; + u8 iio_channels; + /* + * DMA (thus cache coherency maintenance) requires the + * transfer buffers to live in their own cache lines. + * Holds the converted temperature + */ + __be32 temp ____cacheline_aligned; +}; + +struct ltc2983_sensor { + int (*fault_handler)(const struct ltc2983_data *st, const u32 result); + int (*assign_chan)(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor); + /* specifies the sensor channel */ + u32 chan; + /* sensor type */ + u32 type; +}; + +struct ltc2983_custom_sensor { + /* raw table sensor data */ + u8 *table; + size_t size; + /* address offset */ + s8 offset; + bool is_steinhart; +}; + +struct ltc2983_thermocouple { + struct ltc2983_sensor sensor; + struct ltc2983_custom_sensor *custom; + u32 sensor_config; + u32 cold_junction_chan; +}; + +struct ltc2983_rtd { + struct ltc2983_sensor sensor; + struct ltc2983_custom_sensor *custom; + u32 sensor_config; + u32 r_sense_chan; + u32 excitation_current; + u32 rtd_curve; +}; + +struct ltc2983_thermistor { + struct ltc2983_sensor sensor; + struct ltc2983_custom_sensor *custom; + u32 sensor_config; + u32 r_sense_chan; + u32 excitation_current; +}; + +struct ltc2983_diode { + struct ltc2983_sensor sensor; + u32 sensor_config; + u32 excitation_current; + u32 ideal_factor_value; +}; + +struct ltc2983_rsense { + struct ltc2983_sensor sensor; + u32 r_sense_val; +}; + +struct ltc2983_adc { + struct ltc2983_sensor sensor; + bool single_ended; +}; + +/* + * Convert to Q format numbers. These number's are integers where + * the number of integer and fractional bits are specified. The resolution + * is given by 1/@resolution and tell us the number of fractional bits. For + * instance a resolution of 2^-10 means we have 10 fractional bits. + */ +static u32 __convert_to_raw(const u64 val, const u32 resolution) +{ + u64 __res = val * resolution; + + /* all values are multiplied by 1000000 to remove the fraction */ + do_div(__res, 1000000); + + return __res; +} + +static u32 __convert_to_raw_sign(const u64 val, const u32 resolution) +{ + s64 __res = -(s32)val; + + __res = __convert_to_raw(__res, resolution); + + return (u32)-__res; +} + +static int __ltc2983_fault_handler(const struct ltc2983_data *st, + const u32 result, const u32 hard_mask, + const u32 soft_mask) +{ + const struct device *dev = &st->spi->dev; + + if (result & hard_mask) { + dev_err(dev, "Invalid conversion: Sensor HARD fault\n"); + return -EIO; + } else if (result & soft_mask) { + /* just print a warning */ + dev_warn(dev, "Suspicious conversion: Sensor SOFT fault\n"); + } + + return 0; +} + +static int __ltc2983_chan_assign_common(const struct ltc2983_data *st, + const struct ltc2983_sensor *sensor, + u32 chan_val) +{ + u32 reg = LTC2983_CHAN_START_ADDR(sensor->chan); + __be32 __chan_val; + + chan_val |= LTC2983_CHAN_TYPE(sensor->type); + dev_dbg(&st->spi->dev, "Assign reg:0x%04X, val:0x%08X\n", reg, + chan_val); + __chan_val = cpu_to_be32(chan_val); + return regmap_bulk_write(st->regmap, reg, &__chan_val, + sizeof(__chan_val)); +} + +static int __ltc2983_chan_custom_sensor_assign(struct ltc2983_data *st, + struct ltc2983_custom_sensor *custom, + u32 *chan_val) +{ + u32 reg; + u8 mult = custom->is_steinhart ? LTC2983_CUSTOM_STEINHART_ENTRY_SZ : + LTC2983_CUSTOM_SENSOR_ENTRY_SZ; + const struct device *dev = &st->spi->dev; + /* + * custom->size holds the raw size of the table. However, when + * configuring the sensor channel, we must write the number of + * entries of the table minus 1. For steinhart sensors 0 is written + * since the size is constant! + */ + const u8 len = custom->is_steinhart ? 0 : + (custom->size / LTC2983_CUSTOM_SENSOR_ENTRY_SZ) - 1; + /* + * Check if the offset was assigned already. It should be for steinhart + * sensors. When coming from sleep, it should be assigned for all. + */ + if (custom->offset < 0) { + /* + * This needs to be done again here because, from the moment + * when this test was done (successfully) for this custom + * sensor, a steinhart sensor might have been added changing + * custom_table_size... + */ + if (st->custom_table_size + custom->size > + (LTC2983_CUST_SENS_TBL_END_REG - + LTC2983_CUST_SENS_TBL_START_REG) + 1) { + dev_err(dev, + "Not space left(%d) for new custom sensor(%zu)", + st->custom_table_size, + custom->size); + return -EINVAL; + } + + custom->offset = st->custom_table_size / + LTC2983_CUSTOM_SENSOR_ENTRY_SZ; + st->custom_table_size += custom->size; + } + + reg = (custom->offset * mult) + LTC2983_CUST_SENS_TBL_START_REG; + + *chan_val |= LTC2983_CUSTOM_LEN(len); + *chan_val |= LTC2983_CUSTOM_ADDR(custom->offset); + dev_dbg(dev, "Assign custom sensor, reg:0x%04X, off:%d, sz:%zu", + reg, custom->offset, + custom->size); + /* write custom sensor table */ + return regmap_bulk_write(st->regmap, reg, custom->table, custom->size); +} + +static struct ltc2983_custom_sensor *__ltc2983_custom_sensor_new( + struct ltc2983_data *st, + const struct device_node *np, + const char *propname, + const bool is_steinhart, + const u32 resolution, + const bool has_signed) +{ + struct ltc2983_custom_sensor *new_custom; + u8 index, n_entries, tbl = 0; + struct device *dev = &st->spi->dev; + /* + * For custom steinhart, the full u32 is taken. For all the others + * the MSB is discarded. + */ + const u8 n_size = (is_steinhart == true) ? 4 : 3; + const u8 e_size = (is_steinhart == true) ? sizeof(u32) : sizeof(u64); + + n_entries = of_property_count_elems_of_size(np, propname, e_size); + /* n_entries must be an even number */ + if (!n_entries || (n_entries % 2) != 0) { + dev_err(dev, "Number of entries either 0 or not even\n"); + return ERR_PTR(-EINVAL); + } + + new_custom = devm_kzalloc(dev, sizeof(*new_custom), GFP_KERNEL); + if (!new_custom) + return ERR_PTR(-ENOMEM); + + new_custom->size = n_entries * n_size; + /* check Steinhart size */ + if (is_steinhart && new_custom->size != LTC2983_CUSTOM_STEINHART_SIZE) { + dev_err(dev, "Steinhart sensors size(%zu) must be 24", + new_custom->size); + return ERR_PTR(-EINVAL); + } + /* Check space on the table. */ + if (st->custom_table_size + new_custom->size > + (LTC2983_CUST_SENS_TBL_END_REG - + LTC2983_CUST_SENS_TBL_START_REG) + 1) { + dev_err(dev, "No space left(%d) for new custom sensor(%zu)", + st->custom_table_size, new_custom->size); + return ERR_PTR(-EINVAL); + } + + /* allocate the table */ + new_custom->table = devm_kzalloc(dev, new_custom->size, GFP_KERNEL); + if (!new_custom->table) + return ERR_PTR(-ENOMEM); + + for (index = 0; index < n_entries; index++) { + u64 temp = 0, j; + /* + * Steinhart sensors are configured with raw values in the + * devicetree. For the other sensors we must convert the + * value to raw. The odd index's correspond to temperarures + * and always have 1/1024 of resolution. Temperatures also + * come in kelvin, so signed values is not possible + */ + if (!is_steinhart) { + of_property_read_u64_index(np, propname, index, &temp); + + if ((index % 2) != 0) + temp = __convert_to_raw(temp, 1024); + else if (has_signed && (s64)temp < 0) + temp = __convert_to_raw_sign(temp, resolution); + else + temp = __convert_to_raw(temp, resolution); + } else { + of_property_read_u32_index(np, propname, index, + (u32 *)&temp); + } + + for (j = 0; j < n_size; j++) + new_custom->table[tbl++] = + temp >> (8 * (n_size - j - 1)); + } + + new_custom->is_steinhart = is_steinhart; + /* + * This is done to first add all the steinhart sensors to the table, + * in order to maximize the table usage. If we mix adding steinhart + * with the other sensors, we might have to do some roundup to make + * sure that sensor_addr - 0x250(start address) is a multiple of 4 + * (for steinhart), and a multiple of 6 for all the other sensors. + * Since we have const 24 bytes for steinhart sensors and 24 is + * also a multiple of 6, we guarantee that the first non-steinhart + * sensor will sit in a correct address without the need of filling + * addresses. + */ + if (is_steinhart) { + new_custom->offset = st->custom_table_size / + LTC2983_CUSTOM_STEINHART_ENTRY_SZ; + st->custom_table_size += new_custom->size; + } else { + /* mark as unset. This is checked later on the assign phase */ + new_custom->offset = -1; + } + + return new_custom; +} + +static int ltc2983_thermocouple_fault_handler(const struct ltc2983_data *st, + const u32 result) +{ + return __ltc2983_fault_handler(st, result, + LTC2983_THERMOCOUPLE_HARD_FAULT_MASK, + LTC2983_THERMOCOUPLE_SOFT_FAULT_MASK); +} + +static int ltc2983_common_fault_handler(const struct ltc2983_data *st, + const u32 result) +{ + return __ltc2983_fault_handler(st, result, + LTC2983_COMMON_HARD_FAULT_MASK, + LTC2983_COMMON_SOFT_FAULT_MASK); +} + +static int ltc2983_thermocouple_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_thermocouple *thermo = to_thermocouple(sensor); + u32 chan_val; + + chan_val = LTC2983_CHAN_ASSIGN(thermo->cold_junction_chan); + chan_val |= LTC2983_THERMOCOUPLE_CFG(thermo->sensor_config); + + if (thermo->custom) { + int ret; + + ret = __ltc2983_chan_custom_sensor_assign(st, thermo->custom, + &chan_val); + if (ret) + return ret; + } + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static int ltc2983_rtd_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_rtd *rtd = to_rtd(sensor); + u32 chan_val; + + chan_val = LTC2983_CHAN_ASSIGN(rtd->r_sense_chan); + chan_val |= LTC2983_RTD_CFG(rtd->sensor_config); + chan_val |= LTC2983_RTD_EXC_CURRENT(rtd->excitation_current); + chan_val |= LTC2983_RTD_CURVE(rtd->rtd_curve); + + if (rtd->custom) { + int ret; + + ret = __ltc2983_chan_custom_sensor_assign(st, rtd->custom, + &chan_val); + if (ret) + return ret; + } + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static int ltc2983_thermistor_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_thermistor *thermistor = to_thermistor(sensor); + u32 chan_val; + + chan_val = LTC2983_CHAN_ASSIGN(thermistor->r_sense_chan); + chan_val |= LTC2983_THERMISTOR_CFG(thermistor->sensor_config); + chan_val |= + LTC2983_THERMISTOR_EXC_CURRENT(thermistor->excitation_current); + + if (thermistor->custom) { + int ret; + + ret = __ltc2983_chan_custom_sensor_assign(st, + thermistor->custom, + &chan_val); + if (ret) + return ret; + } + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static int ltc2983_diode_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_diode *diode = to_diode(sensor); + u32 chan_val; + + chan_val = LTC2983_DIODE_CFG(diode->sensor_config); + chan_val |= LTC2983_DIODE_EXC_CURRENT(diode->excitation_current); + chan_val |= LTC2983_DIODE_IDEAL_FACTOR(diode->ideal_factor_value); + + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static int ltc2983_r_sense_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_rsense *rsense = to_rsense(sensor); + u32 chan_val; + + chan_val = LTC2983_R_SENSE_VAL(rsense->r_sense_val); + + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static int ltc2983_adc_assign_chan(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_adc *adc = to_adc(sensor); + u32 chan_val; + + chan_val = LTC2983_ADC_SINGLE_ENDED(adc->single_ended); + + return __ltc2983_chan_assign_common(st, sensor, chan_val); +} + +static struct ltc2983_sensor *ltc2983_thermocouple_new( + const struct device_node *child, + struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_thermocouple *thermo; + struct device_node *phandle; + u32 oc_current; + int ret; + + thermo = devm_kzalloc(&st->spi->dev, sizeof(*thermo), GFP_KERNEL); + if (!thermo) + return ERR_PTR(-ENOMEM); + + if (of_property_read_bool(child, "adi,single-ended")) + thermo->sensor_config = LTC2983_THERMOCOUPLE_SGL(1); + + ret = of_property_read_u32(child, "adi,sensor-oc-current-microamp", + &oc_current); + if (!ret) { + switch (oc_current) { + case 10: + thermo->sensor_config |= + LTC2983_THERMOCOUPLE_OC_CURR(0); + break; + case 100: + thermo->sensor_config |= + LTC2983_THERMOCOUPLE_OC_CURR(1); + break; + case 500: + thermo->sensor_config |= + LTC2983_THERMOCOUPLE_OC_CURR(2); + break; + case 1000: + thermo->sensor_config |= + LTC2983_THERMOCOUPLE_OC_CURR(3); + break; + default: + dev_err(&st->spi->dev, + "Invalid open circuit current:%u", oc_current); + return ERR_PTR(-EINVAL); + } + + thermo->sensor_config |= LTC2983_THERMOCOUPLE_OC_CHECK(1); + } + /* validate channel index */ + if (!(thermo->sensor_config & LTC2983_THERMOCOUPLE_DIFF_MASK) && + sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, + "Invalid chann:%d for differential thermocouple", + sensor->chan); + return ERR_PTR(-EINVAL); + } + + phandle = of_parse_phandle(child, "adi,cold-junction-handle", 0); + if (phandle) { + int ret; + + ret = of_property_read_u32(phandle, "reg", + &thermo->cold_junction_chan); + if (ret) { + /* + * This would be catched later but we can just return + * the error right away. + */ + dev_err(&st->spi->dev, "Property reg must be given\n"); + of_node_put(phandle); + return ERR_PTR(-EINVAL); + } + } + + /* check custom sensor */ + if (sensor->type == LTC2983_SENSOR_THERMOCOUPLE_CUSTOM) { + const char *propname = "adi,custom-thermocouple"; + + thermo->custom = __ltc2983_custom_sensor_new(st, child, + propname, false, + 16384, true); + if (IS_ERR(thermo->custom)) { + of_node_put(phandle); + return ERR_CAST(thermo->custom); + } + } + + /* set common parameters */ + thermo->sensor.fault_handler = ltc2983_thermocouple_fault_handler; + thermo->sensor.assign_chan = ltc2983_thermocouple_assign_chan; + + of_node_put(phandle); + return &thermo->sensor; +} + +static struct ltc2983_sensor *ltc2983_rtd_new(const struct device_node *child, + struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_rtd *rtd; + int ret = 0; + struct device *dev = &st->spi->dev; + struct device_node *phandle; + u32 excitation_current = 0, n_wires = 0; + + rtd = devm_kzalloc(dev, sizeof(*rtd), GFP_KERNEL); + if (!rtd) + return ERR_PTR(-ENOMEM); + + phandle = of_parse_phandle(child, "adi,rsense-handle", 0); + if (!phandle) { + dev_err(dev, "Property adi,rsense-handle missing or invalid"); + return ERR_PTR(-EINVAL); + } + + ret = of_property_read_u32(phandle, "reg", &rtd->r_sense_chan); + if (ret) { + dev_err(dev, "Property reg must be given\n"); + goto fail; + } + + ret = of_property_read_u32(child, "adi,number-of-wires", &n_wires); + if (!ret) { + switch (n_wires) { + case 2: + rtd->sensor_config = LTC2983_RTD_N_WIRES(0); + break; + case 3: + rtd->sensor_config = LTC2983_RTD_N_WIRES(1); + break; + case 4: + rtd->sensor_config = LTC2983_RTD_N_WIRES(2); + break; + case 5: + /* 4 wires, Kelvin Rsense */ + rtd->sensor_config = LTC2983_RTD_N_WIRES(3); + break; + default: + dev_err(dev, "Invalid number of wires:%u\n", n_wires); + ret = -EINVAL; + goto fail; + } + } + + if (of_property_read_bool(child, "adi,rsense-share")) { + /* Current rotation is only available with rsense sharing */ + if (of_property_read_bool(child, "adi,current-rotate")) { + if (n_wires == 2 || n_wires == 3) { + dev_err(dev, + "Rotation not allowed for 2/3 Wire RTDs"); + ret = -EINVAL; + goto fail; + } + rtd->sensor_config |= LTC2983_RTD_C_ROTATE(1); + } else { + rtd->sensor_config |= LTC2983_RTD_R_SHARE(1); + } + } + /* + * rtd channel indexes are a bit more complicated to validate. + * For 4wire RTD with rotation, the channel selection cannot be + * >=19 since the chann + 1 is used in this configuration. + * For 4wire RTDs with kelvin rsense, the rsense channel cannot be + * <=1 since chanel - 1 and channel - 2 are used. + */ + if (rtd->sensor_config & LTC2983_RTD_4_WIRE_MASK) { + /* 4-wire */ + u8 min = LTC2983_DIFFERENTIAL_CHAN_MIN, + max = LTC2983_MAX_CHANNELS_NR; + + if (rtd->sensor_config & LTC2983_RTD_ROTATION_MASK) + max = LTC2983_MAX_CHANNELS_NR - 1; + + if (((rtd->sensor_config & LTC2983_RTD_KELVIN_R_SENSE_MASK) + == LTC2983_RTD_KELVIN_R_SENSE_MASK) && + (rtd->r_sense_chan <= min)) { + /* kelvin rsense*/ + dev_err(dev, + "Invalid rsense chann:%d to use in kelvin rsense", + rtd->r_sense_chan); + + ret = -EINVAL; + goto fail; + } + + if (sensor->chan < min || sensor->chan > max) { + dev_err(dev, "Invalid chann:%d for the rtd config", + sensor->chan); + + ret = -EINVAL; + goto fail; + } + } else { + /* same as differential case */ + if (sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, + "Invalid chann:%d for RTD", sensor->chan); + + ret = -EINVAL; + goto fail; + } + } + + /* check custom sensor */ + if (sensor->type == LTC2983_SENSOR_RTD_CUSTOM) { + rtd->custom = __ltc2983_custom_sensor_new(st, child, + "adi,custom-rtd", + false, 2048, false); + if (IS_ERR(rtd->custom)) { + of_node_put(phandle); + return ERR_CAST(rtd->custom); + } + } + + /* set common parameters */ + rtd->sensor.fault_handler = ltc2983_common_fault_handler; + rtd->sensor.assign_chan = ltc2983_rtd_assign_chan; + + ret = of_property_read_u32(child, "adi,excitation-current-microamp", + &excitation_current); + if (ret) { + /* default to 5uA */ + rtd->excitation_current = 1; + } else { + switch (excitation_current) { + case 5: + rtd->excitation_current = 0x01; + break; + case 10: + rtd->excitation_current = 0x02; + break; + case 25: + rtd->excitation_current = 0x03; + break; + case 50: + rtd->excitation_current = 0x04; + break; + case 100: + rtd->excitation_current = 0x05; + break; + case 250: + rtd->excitation_current = 0x06; + break; + case 500: + rtd->excitation_current = 0x07; + break; + case 1000: + rtd->excitation_current = 0x08; + break; + default: + dev_err(&st->spi->dev, + "Invalid value for excitation current(%u)", + excitation_current); + ret = -EINVAL; + goto fail; + } + } + + of_property_read_u32(child, "adi,rtd-curve", &rtd->rtd_curve); + + of_node_put(phandle); + return &rtd->sensor; +fail: + of_node_put(phandle); + return ERR_PTR(ret); +} + +static struct ltc2983_sensor *ltc2983_thermistor_new( + const struct device_node *child, + struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_thermistor *thermistor; + struct device *dev = &st->spi->dev; + struct device_node *phandle; + u32 excitation_current = 0; + int ret = 0; + + thermistor = devm_kzalloc(dev, sizeof(*thermistor), GFP_KERNEL); + if (!thermistor) + return ERR_PTR(-ENOMEM); + + phandle = of_parse_phandle(child, "adi,rsense-handle", 0); + if (!phandle) { + dev_err(dev, "Property adi,rsense-handle missing or invalid"); + return ERR_PTR(-EINVAL); + } + + ret = of_property_read_u32(phandle, "reg", &thermistor->r_sense_chan); + if (ret) { + dev_err(dev, "rsense channel must be configured...\n"); + goto fail; + } + + if (of_property_read_bool(child, "adi,single-ended")) { + thermistor->sensor_config = LTC2983_THERMISTOR_SGL(1); + } else if (of_property_read_bool(child, "adi,rsense-share")) { + /* rotation is only possible if sharing rsense */ + if (of_property_read_bool(child, "adi,current-rotate")) + thermistor->sensor_config = + LTC2983_THERMISTOR_C_ROTATE(1); + else + thermistor->sensor_config = + LTC2983_THERMISTOR_R_SHARE(1); + } + /* validate channel index */ + if (!(thermistor->sensor_config & LTC2983_THERMISTOR_DIFF_MASK) && + sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, + "Invalid chann:%d for differential thermistor", + sensor->chan); + ret = -EINVAL; + goto fail; + } + + /* check custom sensor */ + if (sensor->type >= LTC2983_SENSOR_THERMISTOR_STEINHART) { + bool steinhart = false; + const char *propname; + + if (sensor->type == LTC2983_SENSOR_THERMISTOR_STEINHART) { + steinhart = true; + propname = "adi,custom-steinhart"; + } else { + propname = "adi,custom-thermistor"; + } + + thermistor->custom = __ltc2983_custom_sensor_new(st, child, + propname, + steinhart, + 64, false); + if (IS_ERR(thermistor->custom)) { + of_node_put(phandle); + return ERR_CAST(thermistor->custom); + } + } + /* set common parameters */ + thermistor->sensor.fault_handler = ltc2983_common_fault_handler; + thermistor->sensor.assign_chan = ltc2983_thermistor_assign_chan; + + ret = of_property_read_u32(child, "adi,excitation-current-nanoamp", + &excitation_current); + if (ret) { + /* Auto range is not allowed for custom sensors */ + if (sensor->type >= LTC2983_SENSOR_THERMISTOR_STEINHART) + /* default to 1uA */ + thermistor->excitation_current = 0x03; + else + /* default to auto-range */ + thermistor->excitation_current = 0x0c; + } else { + switch (excitation_current) { + case 0: + /* auto range */ + if (sensor->type >= + LTC2983_SENSOR_THERMISTOR_STEINHART) { + dev_err(&st->spi->dev, + "Auto Range not allowed for custom sensors\n"); + ret = -EINVAL; + goto fail; + } + thermistor->excitation_current = 0x0c; + break; + case 250: + thermistor->excitation_current = 0x01; + break; + case 500: + thermistor->excitation_current = 0x02; + break; + case 1000: + thermistor->excitation_current = 0x03; + break; + case 5000: + thermistor->excitation_current = 0x04; + break; + case 10000: + thermistor->excitation_current = 0x05; + break; + case 25000: + thermistor->excitation_current = 0x06; + break; + case 50000: + thermistor->excitation_current = 0x07; + break; + case 100000: + thermistor->excitation_current = 0x08; + break; + case 250000: + thermistor->excitation_current = 0x09; + break; + case 500000: + thermistor->excitation_current = 0x0a; + break; + case 1000000: + thermistor->excitation_current = 0x0b; + break; + default: + dev_err(&st->spi->dev, + "Invalid value for excitation current(%u)", + excitation_current); + ret = -EINVAL; + goto fail; + } + } + + of_node_put(phandle); + return &thermistor->sensor; +fail: + of_node_put(phandle); + return ERR_PTR(ret); +} + +static struct ltc2983_sensor *ltc2983_diode_new( + const struct device_node *child, + const struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_diode *diode; + u32 temp = 0, excitation_current = 0; + int ret; + + diode = devm_kzalloc(&st->spi->dev, sizeof(*diode), GFP_KERNEL); + if (!diode) + return ERR_PTR(-ENOMEM); + + if (of_property_read_bool(child, "adi,single-ended")) + diode->sensor_config = LTC2983_DIODE_SGL(1); + + if (of_property_read_bool(child, "adi,three-conversion-cycles")) + diode->sensor_config |= LTC2983_DIODE_3_CONV_CYCLE(1); + + if (of_property_read_bool(child, "adi,average-on")) + diode->sensor_config |= LTC2983_DIODE_AVERAGE_ON(1); + + /* validate channel index */ + if (!(diode->sensor_config & LTC2983_DIODE_DIFF_MASK) && + sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, + "Invalid chann:%d for differential thermistor", + sensor->chan); + return ERR_PTR(-EINVAL); + } + /* set common parameters */ + diode->sensor.fault_handler = ltc2983_common_fault_handler; + diode->sensor.assign_chan = ltc2983_diode_assign_chan; + + ret = of_property_read_u32(child, "adi,excitation-current-microamp", + &excitation_current); + if (!ret) { + switch (excitation_current) { + case 10: + diode->excitation_current = 0x00; + break; + case 20: + diode->excitation_current = 0x01; + break; + case 40: + diode->excitation_current = 0x02; + break; + case 80: + diode->excitation_current = 0x03; + break; + default: + dev_err(&st->spi->dev, + "Invalid value for excitation current(%u)", + excitation_current); + return ERR_PTR(-EINVAL); + } + } + + of_property_read_u32(child, "adi,ideal-factor-value", &temp); + + /* 2^20 resolution */ + diode->ideal_factor_value = __convert_to_raw(temp, 1048576); + + return &diode->sensor; +} + +static struct ltc2983_sensor *ltc2983_r_sense_new(struct device_node *child, + struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_rsense *rsense; + int ret; + u32 temp; + + rsense = devm_kzalloc(&st->spi->dev, sizeof(*rsense), GFP_KERNEL); + if (!rsense) + return ERR_PTR(-ENOMEM); + + /* validate channel index */ + if (sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, "Invalid chann:%d for r_sense", + sensor->chan); + return ERR_PTR(-EINVAL); + } + + ret = of_property_read_u32(child, "adi,rsense-val-milli-ohms", &temp); + if (ret) { + dev_err(&st->spi->dev, "Property adi,rsense-val-milli-ohms missing\n"); + return ERR_PTR(-EINVAL); + } + /* + * Times 1000 because we have milli-ohms and __convert_to_raw + * expects scales of 1000000 which are used for all other + * properties. + * 2^10 resolution + */ + rsense->r_sense_val = __convert_to_raw((u64)temp * 1000, 1024); + + /* set common parameters */ + rsense->sensor.assign_chan = ltc2983_r_sense_assign_chan; + + return &rsense->sensor; +} + +static struct ltc2983_sensor *ltc2983_adc_new(struct device_node *child, + struct ltc2983_data *st, + const struct ltc2983_sensor *sensor) +{ + struct ltc2983_adc *adc; + + adc = devm_kzalloc(&st->spi->dev, sizeof(*adc), GFP_KERNEL); + if (!adc) + return ERR_PTR(-ENOMEM); + + if (of_property_read_bool(child, "adi,single-ended")) + adc->single_ended = true; + + if (!adc->single_ended && + sensor->chan < LTC2983_DIFFERENTIAL_CHAN_MIN) { + dev_err(&st->spi->dev, "Invalid chan:%d for differential adc\n", + sensor->chan); + return ERR_PTR(-EINVAL); + } + /* set common parameters */ + adc->sensor.assign_chan = ltc2983_adc_assign_chan; + adc->sensor.fault_handler = ltc2983_common_fault_handler; + + return &adc->sensor; +} + +static int ltc2983_chan_read(struct ltc2983_data *st, + const struct ltc2983_sensor *sensor, int *val) +{ + u32 start_conversion = 0; + int ret; + unsigned long time; + + start_conversion = LTC2983_STATUS_START(true); + start_conversion |= LTC2983_STATUS_CHAN_SEL(sensor->chan); + dev_dbg(&st->spi->dev, "Start conversion on chan:%d, status:%02X\n", + sensor->chan, start_conversion); + /* start conversion */ + ret = regmap_write(st->regmap, LTC2983_STATUS_REG, start_conversion); + if (ret) + return ret; + + reinit_completion(&st->completion); + /* + * wait for conversion to complete. + * 300 ms should be more than enough to complete the conversion. + * Depending on the sensor configuration, there are 2/3 conversions + * cycles of 82ms. + */ + time = wait_for_completion_timeout(&st->completion, + msecs_to_jiffies(300)); + if (!time) { + dev_warn(&st->spi->dev, "Conversion timed out\n"); + return -ETIMEDOUT; + } + + /* read the converted data */ + ret = regmap_bulk_read(st->regmap, LTC2983_CHAN_RES_ADDR(sensor->chan), + &st->temp, sizeof(st->temp)); + if (ret) + return ret; + + *val = __be32_to_cpu(st->temp); + + if (!(LTC2983_RES_VALID_MASK & *val)) { + dev_err(&st->spi->dev, "Invalid conversion detected\n"); + return -EIO; + } + + ret = sensor->fault_handler(st, *val); + if (ret) + return ret; + + *val = sign_extend32((*val) & LTC2983_DATA_MASK, LTC2983_DATA_SIGN_BIT); + return 0; +} + +static int ltc2983_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct ltc2983_data *st = iio_priv(indio_dev); + int ret; + + /* sanity check */ + if (chan->address >= st->num_channels) { + dev_err(&st->spi->dev, "Invalid chan address:%ld", + chan->address); + return -EINVAL; + } + + switch (mask) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&st->lock); + ret = ltc2983_chan_read(st, st->sensors[chan->address], val); + mutex_unlock(&st->lock); + return ret ?: IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_TEMP: + /* value in milli degrees */ + *val = 1000; + /* 2^10 */ + *val2 = 1024; + return IIO_VAL_FRACTIONAL; + case IIO_VOLTAGE: + /* value in millivolt */ + *val = 1000; + /* 2^21 */ + *val2 = 2097152; + return IIO_VAL_FRACTIONAL; + default: + return -EINVAL; + } + } + + return -EINVAL; +} + +static int ltc2983_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct ltc2983_data *st = iio_priv(indio_dev); + + if (readval) + return regmap_read(st->regmap, reg, readval); + else + return regmap_write(st->regmap, reg, writeval); +} + +static irqreturn_t ltc2983_irq_handler(int irq, void *data) +{ + struct ltc2983_data *st = data; + + complete(&st->completion); + return IRQ_HANDLED; +} + +#define LTC2983_CHAN(__type, index, __address) ({ \ + struct iio_chan_spec __chan = { \ + .type = __type, \ + .indexed = 1, \ + .channel = index, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .address = __address, \ + }; \ + __chan; \ +}) + +static int ltc2983_parse_dt(struct ltc2983_data *st) +{ + struct device_node *child; + struct device *dev = &st->spi->dev; + int ret = 0, chan = 0, channel_avail_mask = 0; + + of_property_read_u32(dev->of_node, "adi,mux-delay-config-us", + &st->mux_delay_config); + + of_property_read_u32(dev->of_node, "adi,filter-notch-freq", + &st->filter_notch_freq); + + st->num_channels = of_get_available_child_count(dev->of_node); + st->sensors = devm_kcalloc(dev, st->num_channels, sizeof(*st->sensors), + GFP_KERNEL); + if (!st->sensors) + return -ENOMEM; + + st->iio_channels = st->num_channels; + for_each_available_child_of_node(dev->of_node, child) { + struct ltc2983_sensor sensor; + + ret = of_property_read_u32(child, "reg", &sensor.chan); + if (ret) { + dev_err(dev, "reg property must given for child nodes\n"); + return ret; + } + + /* check if we have a valid channel */ + if (sensor.chan < LTC2983_MIN_CHANNELS_NR || + sensor.chan > LTC2983_MAX_CHANNELS_NR) { + dev_err(dev, + "chan:%d must be from 1 to 20\n", sensor.chan); + return -EINVAL; + } else if (channel_avail_mask & BIT(sensor.chan)) { + dev_err(dev, "chan:%d already in use\n", sensor.chan); + return -EINVAL; + } + + ret = of_property_read_u32(child, "adi,sensor-type", + &sensor.type); + if (ret) { + dev_err(dev, + "adi,sensor-type property must given for child nodes\n"); + return ret; + } + + dev_dbg(dev, "Create new sensor, type %u, chann %u", + sensor.type, + sensor.chan); + + if (sensor.type >= LTC2983_SENSOR_THERMOCOUPLE && + sensor.type <= LTC2983_SENSOR_THERMOCOUPLE_CUSTOM) { + st->sensors[chan] = ltc2983_thermocouple_new(child, st, + &sensor); + } else if (sensor.type >= LTC2983_SENSOR_RTD && + sensor.type <= LTC2983_SENSOR_RTD_CUSTOM) { + st->sensors[chan] = ltc2983_rtd_new(child, st, &sensor); + } else if (sensor.type >= LTC2983_SENSOR_THERMISTOR && + sensor.type <= LTC2983_SENSOR_THERMISTOR_CUSTOM) { + st->sensors[chan] = ltc2983_thermistor_new(child, st, + &sensor); + } else if (sensor.type == LTC2983_SENSOR_DIODE) { + st->sensors[chan] = ltc2983_diode_new(child, st, + &sensor); + } else if (sensor.type == LTC2983_SENSOR_SENSE_RESISTOR) { + st->sensors[chan] = ltc2983_r_sense_new(child, st, + &sensor); + /* don't add rsense to iio */ + st->iio_channels--; + } else if (sensor.type == LTC2983_SENSOR_DIRECT_ADC) { + st->sensors[chan] = ltc2983_adc_new(child, st, &sensor); + } else { + dev_err(dev, "Unknown sensor type %d\n", sensor.type); + return -EINVAL; + } + + if (IS_ERR(st->sensors[chan])) { + dev_err(dev, "Failed to create sensor %ld", + PTR_ERR(st->sensors[chan])); + return PTR_ERR(st->sensors[chan]); + } + /* set generic sensor parameters */ + st->sensors[chan]->chan = sensor.chan; + st->sensors[chan]->type = sensor.type; + + channel_avail_mask |= BIT(sensor.chan); + chan++; + } + + return 0; +} + +static int ltc2983_setup(struct ltc2983_data *st, bool assign_iio) +{ + u32 iio_chan_t = 0, iio_chan_v = 0, chan, iio_idx = 0; + int ret; + unsigned long time; + + /* make sure the device is up */ + time = wait_for_completion_timeout(&st->completion, + msecs_to_jiffies(250)); + + if (!time) { + dev_err(&st->spi->dev, "Device startup timed out\n"); + return -ETIMEDOUT; + } + + st->iio_chan = devm_kzalloc(&st->spi->dev, + st->iio_channels * sizeof(*st->iio_chan), + GFP_KERNEL); + + if (!st->iio_chan) + return -ENOMEM; + + ret = regmap_update_bits(st->regmap, LTC2983_GLOBAL_CONFIG_REG, + LTC2983_NOTCH_FREQ_MASK, + LTC2983_NOTCH_FREQ(st->filter_notch_freq)); + if (ret) + return ret; + + ret = regmap_write(st->regmap, LTC2983_MUX_CONFIG_REG, + st->mux_delay_config); + if (ret) + return ret; + + for (chan = 0; chan < st->num_channels; chan++) { + u32 chan_type = 0, *iio_chan; + + ret = st->sensors[chan]->assign_chan(st, st->sensors[chan]); + if (ret) + return ret; + /* + * The assign_iio flag is necessary for when the device is + * coming out of sleep. In that case, we just need to + * re-configure the device channels. + * We also don't assign iio channels for rsense. + */ + if (st->sensors[chan]->type == LTC2983_SENSOR_SENSE_RESISTOR || + !assign_iio) + continue; + + /* assign iio channel */ + if (st->sensors[chan]->type != LTC2983_SENSOR_DIRECT_ADC) { + chan_type = IIO_TEMP; + iio_chan = &iio_chan_t; + } else { + chan_type = IIO_VOLTAGE; + iio_chan = &iio_chan_v; + } + + /* + * add chan as the iio .address so that, we can directly + * reference the sensor given the iio_chan_spec + */ + st->iio_chan[iio_idx++] = LTC2983_CHAN(chan_type, (*iio_chan)++, + chan); + } + + return 0; +} + +static const struct regmap_range ltc2983_reg_ranges[] = { + regmap_reg_range(LTC2983_STATUS_REG, LTC2983_STATUS_REG), + regmap_reg_range(LTC2983_TEMP_RES_START_REG, LTC2983_TEMP_RES_END_REG), + regmap_reg_range(LTC2983_GLOBAL_CONFIG_REG, LTC2983_GLOBAL_CONFIG_REG), + regmap_reg_range(LTC2983_MULT_CHANNEL_START_REG, + LTC2983_MULT_CHANNEL_END_REG), + regmap_reg_range(LTC2983_MUX_CONFIG_REG, LTC2983_MUX_CONFIG_REG), + regmap_reg_range(LTC2983_CHAN_ASSIGN_START_REG, + LTC2983_CHAN_ASSIGN_END_REG), + regmap_reg_range(LTC2983_CUST_SENS_TBL_START_REG, + LTC2983_CUST_SENS_TBL_END_REG), +}; + +static const struct regmap_access_table ltc2983_reg_table = { + .yes_ranges = ltc2983_reg_ranges, + .n_yes_ranges = ARRAY_SIZE(ltc2983_reg_ranges), +}; + +/* + * The reg_bits are actually 12 but the device needs the first *complete* + * byte for the command (R/W). + */ +static const struct regmap_config ltc2983_regmap_config = { + .reg_bits = 24, + .val_bits = 8, + .wr_table = <c2983_reg_table, + .rd_table = <c2983_reg_table, + .read_flag_mask = GENMASK(1, 0), + .write_flag_mask = BIT(1), +}; + +static const struct iio_info ltc2983_iio_info = { + .read_raw = ltc2983_read_raw, + .debugfs_reg_access = ltc2983_reg_access, +}; + +static int ltc2983_probe(struct spi_device *spi) +{ + struct ltc2983_data *st; + struct iio_dev *indio_dev; + const char *name = spi_get_device_id(spi)->name; + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + + st->regmap = devm_regmap_init_spi(spi, <c2983_regmap_config); + if (IS_ERR(st->regmap)) { + dev_err(&spi->dev, "Failed to initialize regmap\n"); + return PTR_ERR(st->regmap); + } + + mutex_init(&st->lock); + init_completion(&st->completion); + st->spi = spi; + spi_set_drvdata(spi, st); + + ret = ltc2983_parse_dt(st); + if (ret) + return ret; + /* + * let's request the irq now so it is used to sync the device + * startup in ltc2983_setup() + */ + ret = devm_request_irq(&spi->dev, spi->irq, ltc2983_irq_handler, + IRQF_TRIGGER_RISING, name, st); + if (ret) { + dev_err(&spi->dev, "failed to request an irq, %d", ret); + return ret; + } + + ret = ltc2983_setup(st, true); + if (ret) + return ret; + + indio_dev->dev.parent = &spi->dev; + indio_dev->name = name; + indio_dev->num_channels = st->iio_channels; + indio_dev->channels = st->iio_chan; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = <c2983_iio_info; + + return devm_iio_device_register(&spi->dev, indio_dev); +} + +static int __maybe_unused ltc2983_resume(struct device *dev) +{ + struct ltc2983_data *st = spi_get_drvdata(to_spi_device(dev)); + int dummy; + + /* dummy read to bring the device out of sleep */ + regmap_read(st->regmap, LTC2983_STATUS_REG, &dummy); + /* we need to re-assign the channels */ + return ltc2983_setup(st, false); +} + +static int __maybe_unused ltc2983_suspend(struct device *dev) +{ + struct ltc2983_data *st = spi_get_drvdata(to_spi_device(dev)); + + return regmap_write(st->regmap, LTC2983_STATUS_REG, LTC2983_SLEEP); +} + +static SIMPLE_DEV_PM_OPS(ltc2983_pm_ops, ltc2983_suspend, ltc2983_resume); + +static const struct spi_device_id ltc2983_id_table[] = { + { "ltc2983" }, + {}, +}; +MODULE_DEVICE_TABLE(spi, ltc2983_id_table); + +static const struct of_device_id ltc2983_of_match[] = { + { .compatible = "adi,ltc2983" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ltc2983_of_match); + +static struct spi_driver ltc2983_driver = { + .driver = { + .name = "ltc2983", + .of_match_table = ltc2983_of_match, + .pm = <c2983_pm_ops, + }, + .probe = ltc2983_probe, + .id_table = ltc2983_id_table, +}; + +module_spi_driver(ltc2983_driver); + +MODULE_AUTHOR("Nuno Sa "); +MODULE_DESCRIPTION("Analog Devices LTC2983 SPI Temperature sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/temperature/max31856.c b/drivers/iio/temperature/max31856.c index f184ba5601d9..73ed550e3fc9 100644 --- a/drivers/iio/temperature/max31856.c +++ b/drivers/iio/temperature/max31856.c @@ -284,6 +284,8 @@ static int max31856_probe(struct spi_device *spi) spi_set_drvdata(spi, indio_dev); indio_dev->info = &max31856_info; + indio_dev->dev.parent = &spi->dev; + indio_dev->dev.of_node = spi->dev.of_node; indio_dev->name = id->name; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = max31856_channels; diff --git a/drivers/iio/temperature/maxim_thermocouple.c b/drivers/iio/temperature/maxim_thermocouple.c index 2ab68282d0b6..d1360605209c 100644 --- a/drivers/iio/temperature/maxim_thermocouple.c +++ b/drivers/iio/temperature/maxim_thermocouple.c @@ -194,7 +194,7 @@ static int maxim_thermocouple_read_raw(struct iio_dev *indio_dev, default: *val = 250; /* 1000 * 0.25 */ ret = IIO_VAL_INT; - }; + } break; } diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index e3a2518503ed..bd21655c37a6 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -508,15 +508,6 @@ config PWM_TIEHRPWM To compile this driver as a module, choose M here: the module will be called pwm-tiehrpwm. -config PWM_TIPWMSS - bool - default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM) - help - PWM Subsystem driver support for AM33xx SOC. - - PWM submodules require PWM config space access from submodule - drivers and require common parent driver support. - config PWM_TWL tristate "TWL4030/6030 PWM support" depends on TWL4030_CORE diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 26326adf71d7..9a475073dafc 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -50,7 +50,6 @@ obj-$(CONFIG_PWM_SUN4I) += pwm-sun4i.o obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o -obj-$(CONFIG_PWM_TIPWMSS) += pwm-tipwmss.o obj-$(CONFIG_PWM_TWL) += pwm-twl.o obj-$(CONFIG_PWM_TWL_LED) += pwm-twl-led.o obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 333308fe807e..eaf753b70ec5 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -127,4 +127,6 @@ source "drivers/staging/qlge/Kconfig" source "drivers/staging/hp/Kconfig" +source "drivers/staging/wfx/Kconfig" + endif # STAGING diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index e4943cd63e98..0a4396c9067b 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -54,3 +54,4 @@ obj-$(CONFIG_USB_WUSB) += wusbcore/ obj-$(CONFIG_EXFAT_FS) += exfat/ obj-$(CONFIG_QLGE) += qlge/ obj-$(CONFIG_NET_VENDOR_HP) += hp/ +obj-$(CONFIG_WFX) += wfx/ diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c index 805437fa249a..39e6c59df1e9 100644 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ b/drivers/staging/axis-fifo/axis-fifo.c @@ -125,7 +125,6 @@ MODULE_PARM_DESC(write_timeout, "ms to wait before blocking write() timing out; struct axis_fifo { int irq; /* interrupt */ - struct resource *mem; /* physical memory */ void __iomem *base_addr; /* kernel space memory */ unsigned int rx_fifo_depth; /* max words in the receive fifo */ @@ -701,6 +700,68 @@ static int get_dts_property(struct axis_fifo *fifo, return 0; } +static int axis_fifo_parse_dt(struct axis_fifo *fifo) +{ + int ret; + unsigned int value; + + ret = get_dts_property(fifo, "xlnx,axi-str-rxd-tdata-width", &value); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,axi-str-rxd-tdata-width property\n"); + goto end; + } else if (value != 32) { + dev_err(fifo->dt_device, "xlnx,axi-str-rxd-tdata-width only supports 32 bits\n"); + ret = -EIO; + goto end; + } + + ret = get_dts_property(fifo, "xlnx,axi-str-txd-tdata-width", &value); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,axi-str-txd-tdata-width property\n"); + goto end; + } else if (value != 32) { + dev_err(fifo->dt_device, "xlnx,axi-str-txd-tdata-width only supports 32 bits\n"); + ret = -EIO; + goto end; + } + + ret = get_dts_property(fifo, "xlnx,rx-fifo-depth", + &fifo->rx_fifo_depth); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,rx-fifo-depth property\n"); + ret = -EIO; + goto end; + } + + ret = get_dts_property(fifo, "xlnx,tx-fifo-depth", + &fifo->tx_fifo_depth); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,tx-fifo-depth property\n"); + ret = -EIO; + goto end; + } + + /* IP sets TDFV to fifo depth - 4 so we will do the same */ + fifo->tx_fifo_depth -= 4; + + ret = get_dts_property(fifo, "xlnx,use-rx-data", &fifo->has_rx_fifo); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,use-rx-data property\n"); + ret = -EIO; + goto end; + } + + ret = get_dts_property(fifo, "xlnx,use-tx-data", &fifo->has_tx_fifo); + if (ret) { + dev_err(fifo->dt_device, "missing xlnx,use-tx-data property\n"); + ret = -EIO; + goto end; + } + +end: + return ret; +} + static int axis_fifo_probe(struct platform_device *pdev) { struct resource *r_irq; /* interrupt resources */ @@ -712,34 +773,6 @@ static int axis_fifo_probe(struct platform_device *pdev) int rc = 0; /* error return value */ - /* IP properties from device tree */ - unsigned int rxd_tdata_width; - unsigned int txc_tdata_width; - unsigned int txd_tdata_width; - unsigned int tdest_width; - unsigned int tid_width; - unsigned int tuser_width; - unsigned int data_interface_type; - unsigned int has_tdest; - unsigned int has_tid; - unsigned int has_tkeep; - unsigned int has_tstrb; - unsigned int has_tuser; - unsigned int rx_fifo_depth; - unsigned int rx_programmable_empty_threshold; - unsigned int rx_programmable_full_threshold; - unsigned int axi_id_width; - unsigned int axi4_data_width; - unsigned int select_xpm; - unsigned int tx_fifo_depth; - unsigned int tx_programmable_empty_threshold; - unsigned int tx_programmable_full_threshold; - unsigned int use_rx_cut_through; - unsigned int use_rx_data; - unsigned int use_tx_control; - unsigned int use_tx_cut_through; - unsigned int use_tx_data; - /* ---------------------------- * init wrapper device * ---------------------------- @@ -772,32 +805,19 @@ static int axis_fifo_probe(struct platform_device *pdev) goto err_initial; } - fifo->mem = r_mem; - /* request physical memory */ - if (!request_mem_region(fifo->mem->start, resource_size(fifo->mem), - DRIVER_NAME)) { - dev_err(fifo->dt_device, - "couldn't lock memory region at 0x%pa\n", - &fifo->mem->start); - rc = -EBUSY; + fifo->base_addr = devm_ioremap_resource(fifo->dt_device, r_mem); + if (IS_ERR(fifo->base_addr)) { + rc = PTR_ERR(fifo->base_addr); + dev_err(fifo->dt_device, "can't remap IO resource (%d)\n", rc); goto err_initial; } - dev_dbg(fifo->dt_device, "got memory location [0x%pa - 0x%pa]\n", - &fifo->mem->start, &fifo->mem->end); - /* map physical memory to kernel virtual address space */ - fifo->base_addr = ioremap(fifo->mem->start, resource_size(fifo->mem)); - if (!fifo->base_addr) { - dev_err(fifo->dt_device, "couldn't map physical memory\n"); - rc = -ENOMEM; - goto err_mem; - } dev_dbg(fifo->dt_device, "remapped memory to 0x%p\n", fifo->base_addr); /* create unique device name */ snprintf(device_name, sizeof(device_name), "%s_%pa", - DRIVER_NAME, &fifo->mem->start); + DRIVER_NAME, &r_mem->start); dev_dbg(fifo->dt_device, "device name [%s]\n", device_name); @@ -806,164 +826,9 @@ static int axis_fifo_probe(struct platform_device *pdev) * ---------------------------- */ - /* retrieve device tree properties */ - rc = get_dts_property(fifo, "xlnx,axi-str-rxd-tdata-width", - &rxd_tdata_width); + rc = axis_fifo_parse_dt(fifo); if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,axi-str-txc-tdata-width", - &txc_tdata_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,axi-str-txd-tdata-width", - &txd_tdata_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,axis-tdest-width", &tdest_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,axis-tid-width", &tid_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,axis-tuser-width", &tuser_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,data-interface-type", - &data_interface_type); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,has-axis-tdest", &has_tdest); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,has-axis-tid", &has_tid); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,has-axis-tkeep", &has_tkeep); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,has-axis-tstrb", &has_tstrb); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,has-axis-tuser", &has_tuser); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,rx-fifo-depth", &rx_fifo_depth); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,rx-fifo-pe-threshold", - &rx_programmable_empty_threshold); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,rx-fifo-pf-threshold", - &rx_programmable_full_threshold); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,s-axi-id-width", &axi_id_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,s-axi4-data-width", &axi4_data_width); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,select-xpm", &select_xpm); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,tx-fifo-depth", &tx_fifo_depth); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,tx-fifo-pe-threshold", - &tx_programmable_empty_threshold); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,tx-fifo-pf-threshold", - &tx_programmable_full_threshold); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,use-rx-cut-through", - &use_rx_cut_through); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,use-rx-data", &use_rx_data); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,use-tx-ctrl", &use_tx_control); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,use-tx-cut-through", - &use_tx_cut_through); - if (rc) - goto err_unmap; - rc = get_dts_property(fifo, "xlnx,use-tx-data", &use_tx_data); - if (rc) - goto err_unmap; - - /* check validity of device tree properties */ - if (rxd_tdata_width != 32) { - dev_err(fifo->dt_device, - "rxd_tdata_width width [%u] unsupported\n", - rxd_tdata_width); - rc = -EIO; - goto err_unmap; - } - if (txd_tdata_width != 32) { - dev_err(fifo->dt_device, - "txd_tdata_width width [%u] unsupported\n", - txd_tdata_width); - rc = -EIO; - goto err_unmap; - } - if (has_tdest) { - dev_err(fifo->dt_device, "tdest not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (has_tid) { - dev_err(fifo->dt_device, "tid not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (has_tkeep) { - dev_err(fifo->dt_device, "tkeep not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (has_tstrb) { - dev_err(fifo->dt_device, "tstrb not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (has_tuser) { - dev_err(fifo->dt_device, "tuser not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (use_rx_cut_through) { - dev_err(fifo->dt_device, "rx cut-through not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (use_tx_cut_through) { - dev_err(fifo->dt_device, "tx cut-through not supported\n"); - rc = -EIO; - goto err_unmap; - } - if (use_tx_control) { - dev_err(fifo->dt_device, "tx control not supported\n"); - rc = -EIO; - goto err_unmap; - } - - /* TODO - * these exist in the device tree but it's unclear what they do - * - select-xpm - * - data-interface-type - */ - - /* set device wrapper properties based on IP config */ - fifo->rx_fifo_depth = rx_fifo_depth; - /* IP sets TDFV to fifo depth - 4 so we will do the same */ - fifo->tx_fifo_depth = tx_fifo_depth - 4; - fifo->has_rx_fifo = use_rx_data; - fifo->has_tx_fifo = use_tx_data; + goto err_initial; reset_ip_core(fifo); @@ -976,18 +841,19 @@ static int axis_fifo_probe(struct platform_device *pdev) r_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!r_irq) { dev_err(fifo->dt_device, "no IRQ found for 0x%pa\n", - &fifo->mem->start); + &r_mem->start); rc = -EIO; - goto err_unmap; + goto err_initial; } /* request IRQ */ fifo->irq = r_irq->start; - rc = request_irq(fifo->irq, &axis_fifo_irq, 0, DRIVER_NAME, fifo); + rc = devm_request_irq(fifo->dt_device, fifo->irq, &axis_fifo_irq, 0, + DRIVER_NAME, fifo); if (rc) { dev_err(fifo->dt_device, "couldn't allocate interrupt %i\n", fifo->irq); - goto err_unmap; + goto err_initial; } /* ---------------------------- @@ -998,7 +864,7 @@ static int axis_fifo_probe(struct platform_device *pdev) /* allocate device number */ rc = alloc_chrdev_region(&fifo->devt, 0, 1, DRIVER_NAME); if (rc < 0) - goto err_irq; + goto err_initial; dev_dbg(fifo->dt_device, "allocated device number major %i minor %i\n", MAJOR(fifo->devt), MINOR(fifo->devt)); @@ -1022,14 +888,14 @@ static int axis_fifo_probe(struct platform_device *pdev) } /* create sysfs entries */ - rc = sysfs_create_group(&fifo->device->kobj, &axis_fifo_attrs_group); + rc = devm_device_add_group(fifo->device, &axis_fifo_attrs_group); if (rc < 0) { dev_err(fifo->dt_device, "couldn't register sysfs group\n"); goto err_cdev; } dev_info(fifo->dt_device, "axis-fifo created at %pa mapped to 0x%pa, irq=%i, major=%i, minor=%i\n", - &fifo->mem->start, &fifo->base_addr, fifo->irq, + &r_mem->start, &fifo->base_addr, fifo->irq, MAJOR(fifo->devt), MINOR(fifo->devt)); return 0; @@ -1040,12 +906,6 @@ err_dev: device_destroy(axis_fifo_driver_class, fifo->devt); err_chrdev_region: unregister_chrdev_region(fifo->devt, 1); -err_irq: - free_irq(fifo->irq, fifo); -err_unmap: - iounmap(fifo->base_addr); -err_mem: - release_mem_region(fifo->mem->start, resource_size(fifo->mem)); err_initial: dev_set_drvdata(dev, NULL); return rc; @@ -1056,15 +916,12 @@ static int axis_fifo_remove(struct platform_device *pdev) struct device *dev = &pdev->dev; struct axis_fifo *fifo = dev_get_drvdata(dev); - sysfs_remove_group(&fifo->device->kobj, &axis_fifo_attrs_group); cdev_del(&fifo->char_device); dev_set_drvdata(fifo->device, NULL); device_destroy(axis_fifo_driver_class, fifo->devt); unregister_chrdev_region(fifo->devt, 1); - free_irq(fifo->irq, fifo); - iounmap(fifo->base_addr); - release_mem_region(fifo->mem->start, resource_size(fifo->mem)); dev_set_drvdata(dev, NULL); + return 0; } diff --git a/drivers/staging/axis-fifo/axis-fifo.txt b/drivers/staging/axis-fifo/axis-fifo.txt index 85d88c010e72..5828e1b8e822 100644 --- a/drivers/staging/axis-fifo/axis-fifo.txt +++ b/drivers/staging/axis-fifo/axis-fifo.txt @@ -25,10 +25,10 @@ Required properties: - xlnx,axi-str-txc-tdata-width: Should be <0x20> - xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA" - xlnx,axi-str-txd-tdata-width: Should be <0x20> -- xlnx,axis-tdest-width: AXI-Stream TDEST width -- xlnx,axis-tid-width: AXI-Stream TID width -- xlnx,axis-tuser-width: AXI-Stream TUSER width -- xlnx,data-interface-type: Should be <0x0> +- xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver) +- xlnx,axis-tid-width: AXI-Stream TID width (ignored by the driver) +- xlnx,axis-tuser-width: AXI-Stream TUSER width (ignored by the driver) +- xlnx,data-interface-type: Should be <0x0> (ignored by the driver) - xlnx,has-axis-tdest: Should be <0x0> (this feature isn't supported) - xlnx,has-axis-tid: Should be <0x0> (this feature isn't supported) - xlnx,has-axis-tkeep: Should be <0x0> (this feature isn't supported) @@ -36,13 +36,17 @@ Required properties: - xlnx,has-axis-tuser: Should be <0x0> (this feature isn't supported) - xlnx,rx-fifo-depth: Depth of RX FIFO in words - xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold + (ignored by the driver) - xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold -- xlnx,s-axi-id-width: Should be <0x4> -- xlnx,s-axi4-data-width: Should be <0x20> -- xlnx,select-xpm: Should be <0x0> + (ignored by the driver) +- xlnx,s-axi-id-width: Should be <0x4> (ignored by the driver) +- xlnx,s-axi4-data-width: Should be <0x20> (ignored by the driver) +- xlnx,select-xpm: Should be <0x0> (ignored by the driver) - xlnx,tx-fifo-depth: Depth of TX FIFO in words - xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold + (ignored by the driver) - xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold + (ignored by the driver) - xlnx,use-rx-cut-through: Should be <0x0> (this feature isn't supported) - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise - xlnx,use-tx-ctrl: Should be <0x0> (this feature isn't supported) diff --git a/drivers/staging/board/armadillo800eva.c b/drivers/staging/board/armadillo800eva.c index 962cc0c79988..0225234dd7aa 100644 --- a/drivers/staging/board/armadillo800eva.c +++ b/drivers/staging/board/armadillo800eva.c @@ -50,16 +50,8 @@ static struct sh_mobile_lcdc_info lcdc0_info = { }; static struct resource lcdc0_resources[] = { - [0] = { - .name = "LCD0", - .start = 0xfe940000, - .end = 0xfe943fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 177 + 32, - .flags = IORESOURCE_IRQ, - }, + DEFINE_RES_MEM_NAMED(0xfe940000, 0x4000, "LCD0"), + DEFINE_RES_IRQ(177 + 32), }; static struct platform_device lcdc0_device = { diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c index 15b7a82f4b1e..e52a64be93f3 100644 --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c +++ b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c @@ -135,7 +135,6 @@ static int clk_wzrd_probe(struct platform_device *pdev) unsigned long rate; const char *clk_name; struct clk_wzrd *clk_wzrd; - struct resource *mem; struct device_node *np = pdev->dev.of_node; clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL); @@ -143,8 +142,7 @@ static int clk_wzrd_probe(struct platform_device *pdev) return -ENOMEM; platform_set_drvdata(pdev, clk_wzrd); - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - clk_wzrd->base = devm_ioremap_resource(&pdev->dev, mem); + clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(clk_wzrd->base)) return PTR_ERR(clk_wzrd->base); diff --git a/drivers/staging/comedi/drivers/dt3000.c b/drivers/staging/comedi/drivers/dt3000.c index caf4d4df4bd3..f7c365b70106 100644 --- a/drivers/staging/comedi/drivers/dt3000.c +++ b/drivers/staging/comedi/drivers/dt3000.c @@ -508,12 +508,11 @@ static int dt3k_ai_insn_read(struct comedi_device *dev, unsigned int *data) { int i; - unsigned int chan, gain, aref; + unsigned int chan, gain; chan = CR_CHAN(insn->chanspec); gain = CR_RANGE(insn->chanspec); /* XXX docs don't explain how to select aref */ - aref = CR_AREF(insn->chanspec); for (i = 0; i < insn->n; i++) data[i] = dt3k_readsingle(dev, DPR_SUBSYS_AI, chan, gain); diff --git a/drivers/staging/comedi/drivers/ni_routes.c b/drivers/staging/comedi/drivers/ni_routes.c index eb61494dc2bd..673d732dcb8f 100644 --- a/drivers/staging/comedi/drivers/ni_routes.c +++ b/drivers/staging/comedi/drivers/ni_routes.c @@ -49,8 +49,6 @@ /* Helper for accessing data. */ #define RVi(table, src, dest) ((table)[(dest) * NI_NUM_NAMES + (src)]) -static const size_t route_table_size = NI_NUM_NAMES * NI_NUM_NAMES; - /* * Find the proper route_values and ni_device_routes tables for this particular * device. diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c index 04bc488385e6..4af012968cb6 100644 --- a/drivers/staging/comedi/drivers/usbduxfast.c +++ b/drivers/staging/comedi/drivers/usbduxfast.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2004-2014 Bernd Porr, mail@berndporr.me.uk + * Copyright (C) 2004-2019 Bernd Porr, mail@berndporr.me.uk */ /* @@ -8,7 +8,7 @@ * Description: University of Stirling USB DAQ & INCITE Technology Limited * Devices: [ITL] USB-DUX-FAST (usbduxfast) * Author: Bernd Porr - * Updated: 10 Oct 2014 + * Updated: 16 Nov 2019 * Status: stable */ @@ -22,6 +22,7 @@ * * * Revision history: + * 1.0: Fixed a rounding error in usbduxfast_ai_cmdtest * 0.9: Dropping the first data packet which seems to be from the last transfer. * Buffer overflows in the FX2 are handed over to comedi. * 0.92: Dropping now 4 packets. The quad buffer has to be emptied. @@ -350,6 +351,7 @@ static int usbduxfast_ai_cmdtest(struct comedi_device *dev, struct comedi_cmd *cmd) { int err = 0; + int err2 = 0; unsigned int steps; unsigned int arg; @@ -399,11 +401,16 @@ static int usbduxfast_ai_cmdtest(struct comedi_device *dev, */ steps = (cmd->convert_arg * 30) / 1000; if (cmd->chanlist_len != 1) - err |= comedi_check_trigger_arg_min(&steps, - MIN_SAMPLING_PERIOD); - err |= comedi_check_trigger_arg_max(&steps, MAX_SAMPLING_PERIOD); - arg = (steps * 1000) / 30; - err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg); + err2 |= comedi_check_trigger_arg_min(&steps, + MIN_SAMPLING_PERIOD); + else + err2 |= comedi_check_trigger_arg_min(&steps, 1); + err2 |= comedi_check_trigger_arg_max(&steps, MAX_SAMPLING_PERIOD); + if (err2) { + err |= err2; + arg = (steps * 1000) / 30; + err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg); + } if (cmd->stop_src == TRIG_COUNT) err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1); diff --git a/drivers/staging/emxx_udc/emxx_udc.c b/drivers/staging/emxx_udc/emxx_udc.c index 147481bf680c..03929b9d3a8b 100644 --- a/drivers/staging/emxx_udc/emxx_udc.c +++ b/drivers/staging/emxx_udc/emxx_udc.c @@ -1072,9 +1072,8 @@ static int _nbu2ss_epn_in_pio(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep, if (i_word_length > 0) { for (i = 0; i < i_word_length; i++) { _nbu2ss_writel( - &preg->EP_REGS[ep->epnum - 1].EP_WRITE - , p_buf_32->dw - ); + &preg->EP_REGS[ep->epnum - 1].EP_WRITE, + p_buf_32->dw); p_buf_32++; } @@ -2661,20 +2660,18 @@ static int nbu2ss_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) /* make sure it's actually queued on this endpoint */ list_for_each_entry(req, &ep->queue, queue) { - if (&req->req == _req) - break; + if (&req->req == _req) { + _nbu2ss_ep_done(ep, req, -ECONNRESET); + spin_unlock_irqrestore(&udc->lock, flags); + return 0; + } } - if (&req->req != _req) { - spin_unlock_irqrestore(&udc->lock, flags); - pr_debug("%s no queue(EINVAL)\n", __func__); - return -EINVAL; - } - - _nbu2ss_ep_done(ep, req, -ECONNRESET); spin_unlock_irqrestore(&udc->lock, flags); - return 0; + pr_debug("%s no queue(EINVAL)\n", __func__); + + return -EINVAL; } /*-------------------------------------------------------------------------*/ @@ -3078,7 +3075,6 @@ static int nbu2ss_drv_probe(struct platform_device *pdev) { int status = -ENODEV; struct nbu2ss_udc *udc; - struct resource *r; int irq; void __iomem *mmio_base; @@ -3088,8 +3084,7 @@ static int nbu2ss_drv_probe(struct platform_device *pdev) platform_set_drvdata(pdev, udc); /* require I/O memory and IRQ to be provided as resources */ - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mmio_base = devm_ioremap_resource(&pdev->dev, r); + mmio_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(mmio_base)) return PTR_ERR(mmio_base); diff --git a/drivers/staging/exfat/Kconfig b/drivers/staging/exfat/Kconfig index ce32dfe33bec..0130019cbec2 100644 --- a/drivers/staging/exfat/Kconfig +++ b/drivers/staging/exfat/Kconfig @@ -6,15 +6,6 @@ config EXFAT_FS help This adds support for the exFAT file system. -config EXFAT_DONT_MOUNT_VFAT - bool "Prohibit mounting of fat/vfat filesystems by exFAT" - depends on EXFAT_FS - default y - help - By default, the exFAT driver will only mount exFAT filesystems, and refuse - to mount fat/vfat filesystems. Set this to 'n' to allow the exFAT driver - to mount these filesystems. - config EXFAT_DISCARD bool "enable discard support" depends on EXFAT_FS diff --git a/drivers/staging/exfat/TODO b/drivers/staging/exfat/TODO index a3eb282f9efc..a283ce534cf4 100644 --- a/drivers/staging/exfat/TODO +++ b/drivers/staging/exfat/TODO @@ -1,8 +1,22 @@ +A laundry list of things that need looking at, most of which will +require more work than the average checkpatch cleanup... + +Note that some of these entries may not be bugs - they're things +that need to be looked at, and *possibly* fixed. + +Clean up the ffsCamelCase function names. + +Fix (thing)->flags to not use magic numbers - multiple offenders + +Sort out all the s32/u32/u8 nonsense - most of these should be plain int. + exfat_core.c - ffsReadFile - the goto err_out seem to leak a brelse(). same for ffsWriteFile. -exfat_core.c - fs_sync(sb,0) all over the place looks fishy as hell. -There's only one place that calls it with a non-zero argument. +All the calls to fs_sync() need to be looked at, particularly in the +context of EXFAT_DELAYED_SYNC. Currently, if that's defined, we only +flush to disk when sync() gets called. We should be doing at least +metadata flushes at appropriate times. ffsTruncateFile - if (old_size <= new_size) { That doesn't look right. How did it ever work? Are they relying on lazy @@ -10,3 +24,46 @@ block allocation when actual writes happen? If nothing else, it never does the 'fid->size = new_size' and do the inode update.... ffsSetAttr() is just dangling in the breeze, not wired up at all... + +Convert global mutexes to a per-superblock mutex. + +Right now, we load exactly one UTF-8 table. Check to see +if that plays nice with different codepage and iocharset values +for simultanous mounts of different devices + +exfat_rmdir() checks for -EBUSY but ffsRemoveDir() doesn't return it. +In fact, there's a complete lack of -EBUSY testing anywhere. + +There's probably a few missing checks for -EEXIST + +check return codes of sync_dirty_buffer() + +Why is remove_file doing a num_entries++?? + +Double check a lot of can't-happen parameter checks (for null pointers for +things that have only one call site and can't pass a null, etc). + +All the DEBUG stuff can probably be tossed, including the ioctl(). Either +that, or convert to a proper fault-injection system. + +exfat_remount does exactly one thing. Fix to actually deal with remount +options, particularly handling R/O correctly. For that matter, allow +R/O mounts in the first place. + +Figure out why the VFAT code used multi_sector_(read|write) but the +exfat code doesn't use it. The difference matters on SSDs with wear leveling. + +exfat_fat_sync(), exfat_buf_sync(), and sync_alloc_bitmap() +aren't called anyplace.... + +Create helper function for exfat_set_entry_time() and exfat_set_entry_type() +because it's sort of ugly to be calling the same functionn directly and +other code calling through the fs_func struc ponters... + +clean up the remaining vol_type checks, which are of two types: +some are ?: operators with magic numbers, and the rest are places +where we're doing stuff with '.' and '..'. + +Patches to: + Greg Kroah-Hartman + Valdis Kletnieks diff --git a/drivers/staging/exfat/exfat.h b/drivers/staging/exfat/exfat.h index 3abab33e932c..2aac1e000977 100644 --- a/drivers/staging/exfat/exfat.h +++ b/drivers/staging/exfat/exfat.h @@ -30,6 +30,8 @@ #undef DEBUG #endif +#define EFSCORRUPTED EUCLEAN /* Filesystem is corrupted */ + #define DENTRY_SIZE 32 /* dir entry size */ #define DENTRY_SIZE_BITS 5 @@ -206,28 +208,6 @@ static inline u16 get_row_index(u16 i) #define FM_REGULAR 0x00 #define FM_SYMLINK 0x40 -/* return values */ -#define FFS_SUCCESS 0 -#define FFS_MEDIAERR 1 -#define FFS_FORMATERR 2 -#define FFS_MOUNTED 3 -#define FFS_NOTMOUNTED 4 -#define FFS_ALIGNMENTERR 5 -#define FFS_SEMAPHOREERR 6 -#define FFS_INVALIDPATH 7 -#define FFS_INVALIDFID 8 -#define FFS_NOTFOUND 9 -#define FFS_FILEEXIST 10 -#define FFS_PERMISSIONERR 11 -#define FFS_NOTOPENED 12 -#define FFS_MAXOPENED 13 -#define FFS_FULL 14 -#define FFS_EOF 15 -#define FFS_DIRBUSY 16 -#define FFS_MEMORYERR 17 -#define FFS_NAMETOOLONG 18 -#define FFS_ERROR 19 - #define NUM_UPCASE 2918 #define DOS_CUR_DIR_NAME ". " @@ -618,7 +598,7 @@ struct fs_info_t { u32 dev_ejected; /* block device operation error flag */ struct fs_func *fs_func; - struct semaphore v_sem; + struct mutex v_mutex; /* FAT cache */ struct buf_cache_t FAT_cache_array[FAT_CACHE_SIZE]; @@ -749,14 +729,7 @@ static inline struct exfat_inode_info *EXFAT_I(struct inode *inode) /* NLS management function */ u16 nls_upper(struct super_block *sb, u16 a); -int nls_dosname_cmp(struct super_block *sb, u8 *a, u8 *b); int nls_uniname_cmp(struct super_block *sb, u16 *a, u16 *b); -void nls_uniname_to_dosname(struct super_block *sb, - struct dos_name_t *p_dosname, - struct uni_name_t *p_uniname, bool *p_lossy); -void nls_dosname_to_uniname(struct super_block *sb, - struct uni_name_t *p_uniname, - struct dos_name_t *p_dosname); void nls_uniname_to_cstring(struct super_block *sb, u8 *p_cstring, struct uni_name_t *p_uniname); void nls_cstring_to_uniname(struct super_block *sb, @@ -764,48 +737,33 @@ void nls_cstring_to_uniname(struct super_block *sb, bool *p_lossy); /* buffer cache management */ -void buf_init(struct super_block *sb); -void buf_shutdown(struct super_block *sb); -int FAT_read(struct super_block *sb, u32 loc, u32 *content); -s32 FAT_write(struct super_block *sb, u32 loc, u32 content); -u8 *FAT_getblk(struct super_block *sb, sector_t sec); -void FAT_modify(struct super_block *sb, sector_t sec); -void FAT_release_all(struct super_block *sb); -void FAT_sync(struct super_block *sb); -u8 *buf_getblk(struct super_block *sb, sector_t sec); -void buf_modify(struct super_block *sb, sector_t sec); -void buf_lock(struct super_block *sb, sector_t sec); -void buf_unlock(struct super_block *sb, sector_t sec); -void buf_release(struct super_block *sb, sector_t sec); -void buf_release_all(struct super_block *sb); -void buf_sync(struct super_block *sb); +void exfat_buf_init(struct super_block *sb); +void exfat_buf_shutdown(struct super_block *sb); +int exfat_fat_read(struct super_block *sb, u32 loc, u32 *content); +s32 exfat_fat_write(struct super_block *sb, u32 loc, u32 content); +u8 *exfat_fat_getblk(struct super_block *sb, sector_t sec); +void exfat_fat_modify(struct super_block *sb, sector_t sec); +void exfat_fat_release_all(struct super_block *sb); +void exfat_fat_sync(struct super_block *sb); +u8 *exfat_buf_getblk(struct super_block *sb, sector_t sec); +void exfat_buf_modify(struct super_block *sb, sector_t sec); +void exfat_buf_lock(struct super_block *sb, sector_t sec); +void exfat_buf_unlock(struct super_block *sb, sector_t sec); +void exfat_buf_release(struct super_block *sb, sector_t sec); +void exfat_buf_release_all(struct super_block *sb); +void exfat_buf_sync(struct super_block *sb); /* fs management functions */ void fs_set_vol_flags(struct super_block *sb, u32 new_flag); void fs_error(struct super_block *sb); /* cluster management functions */ -s32 clear_cluster(struct super_block *sb, u32 clu); -s32 fat_alloc_cluster(struct super_block *sb, s32 num_alloc, - struct chain_t *p_chain); -s32 exfat_alloc_cluster(struct super_block *sb, s32 num_alloc, - struct chain_t *p_chain); -void fat_free_cluster(struct super_block *sb, struct chain_t *p_chain, - s32 do_relse); -void exfat_free_cluster(struct super_block *sb, struct chain_t *p_chain, - s32 do_relse); -u32 find_last_cluster(struct super_block *sb, struct chain_t *p_chain); s32 count_num_clusters(struct super_block *sb, struct chain_t *dir); -s32 fat_count_used_clusters(struct super_block *sb); -s32 exfat_count_used_clusters(struct super_block *sb); void exfat_chain_cont_cluster(struct super_block *sb, u32 chain, s32 len); /* allocation bitmap management functions */ s32 load_alloc_bitmap(struct super_block *sb); void free_alloc_bitmap(struct super_block *sb); -s32 set_alloc_bitmap(struct super_block *sb, u32 clu); -s32 clr_alloc_bitmap(struct super_block *sb, u32 clu); -u32 test_alloc_bitmap(struct super_block *sb, u32 clu); void sync_alloc_bitmap(struct super_block *sb); /* upcase table management functions */ @@ -813,63 +771,8 @@ s32 load_upcase_table(struct super_block *sb); void free_upcase_table(struct super_block *sb); /* dir entry management functions */ -u32 fat_get_entry_type(struct dentry_t *p_entry); -u32 exfat_get_entry_type(struct dentry_t *p_entry); -void fat_set_entry_type(struct dentry_t *p_entry, u32 type); -void exfat_set_entry_type(struct dentry_t *p_entry, u32 type); -u32 fat_get_entry_attr(struct dentry_t *p_entry); -u32 exfat_get_entry_attr(struct dentry_t *p_entry); -void fat_set_entry_attr(struct dentry_t *p_entry, u32 attr); -void exfat_set_entry_attr(struct dentry_t *p_entry, u32 attr); -u8 fat_get_entry_flag(struct dentry_t *p_entry); -u8 exfat_get_entry_flag(struct dentry_t *p_entry); -void fat_set_entry_flag(struct dentry_t *p_entry, u8 flag); -void exfat_set_entry_flag(struct dentry_t *p_entry, u8 flag); -u32 fat_get_entry_clu0(struct dentry_t *p_entry); -u32 exfat_get_entry_clu0(struct dentry_t *p_entry); -void fat_set_entry_clu0(struct dentry_t *p_entry, u32 start_clu); -void exfat_set_entry_clu0(struct dentry_t *p_entry, u32 start_clu); -u64 fat_get_entry_size(struct dentry_t *p_entry); -u64 exfat_get_entry_size(struct dentry_t *p_entry); -void fat_set_entry_size(struct dentry_t *p_entry, u64 size); -void exfat_set_entry_size(struct dentry_t *p_entry, u64 size); struct timestamp_t *tm_current(struct timestamp_t *tm); -void fat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode); -void exfat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode); -void fat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode); -void exfat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode); -s32 fat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, s32 entry, - u32 type, u32 start_clu, u64 size); -s32 exfat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, u32 type, u32 start_clu, u64 size); -s32 fat_init_ext_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 num_entries, - struct uni_name_t *p_uniname, - struct dos_name_t *p_dosname); -s32 exfat_init_ext_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 num_entries, - struct uni_name_t *p_uniname, - struct dos_name_t *p_dosname); -void init_dos_entry(struct dos_dentry_t *ep, u32 type, u32 start_clu); -void init_ext_entry(struct ext_dentry_t *ep, s32 order, u8 chksum, - u16 *uniname); -void init_file_entry(struct file_dentry_t *ep, u32 type); -void init_strm_entry(struct strm_dentry_t *ep, u8 flags, u32 start_clu, - u64 size); -void init_name_entry(struct name_dentry_t *ep, u16 *uniname); -void fat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 order, s32 num_entries); -void exfat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 order, s32 num_entries); -s32 find_location(struct super_block *sb, struct chain_t *p_dir, s32 entry, - sector_t *sector, s32 *offset); -struct dentry_t *get_entry_with_sector(struct super_block *sb, sector_t sector, - s32 offset); struct dentry_t *get_entry_in_dir(struct super_block *sb, struct chain_t *p_dir, s32 entry, sector_t *sector); struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, @@ -877,24 +780,6 @@ struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, u32 type, struct dentry_t **file_ep); void release_entry_set(struct entry_set_cache_t *es); -s32 write_whole_entry_set(struct super_block *sb, struct entry_set_cache_t *es); -s32 write_partial_entries_in_entry_set(struct super_block *sb, - struct entry_set_cache_t *es, - struct dentry_t *ep, u32 count); -s32 search_deleted_or_unused_entry(struct super_block *sb, - struct chain_t *p_dir, s32 num_entries); -s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, - s32 num_entries); -s32 fat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, - struct uni_name_t *p_uniname, s32 num_entries, - struct dos_name_t *p_dosname, u32 type); -s32 exfat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, - struct uni_name_t *p_uniname, s32 num_entries, - struct dos_name_t *p_dosname, u32 type); -s32 fat_count_ext_entries(struct super_block *sb, struct chain_t *p_dir, - s32 entry, struct dentry_t *p_entry); -s32 exfat_count_ext_entries(struct super_block *sb, struct chain_t *p_dir, - s32 entry, struct dentry_t *p_entry); s32 count_dos_name_entries(struct super_block *sb, struct chain_t *p_dir, u32 type); void update_dir_checksum(struct super_block *sb, struct chain_t *p_dir, @@ -907,36 +792,13 @@ bool is_dir_empty(struct super_block *sb, struct chain_t *p_dir); s32 get_num_entries_and_dos_name(struct super_block *sb, struct chain_t *p_dir, struct uni_name_t *p_uniname, s32 *entries, struct dos_name_t *p_dosname); -void get_uni_name_from_dos_entry(struct super_block *sb, - struct dos_dentry_t *ep, - struct uni_name_t *p_uniname, u8 mode); -void fat_get_uni_name_from_ext_entry(struct super_block *sb, - struct chain_t *p_dir, s32 entry, - u16 *uniname); -void exfat_get_uni_name_from_ext_entry(struct super_block *sb, - struct chain_t *p_dir, s32 entry, - u16 *uniname); -s32 extract_uni_name_from_ext_entry(struct ext_dentry_t *ep, - u16 *uniname, s32 order); -s32 extract_uni_name_from_name_entry(struct name_dentry_t *ep, - u16 *uniname, s32 order); -s32 fat_generate_dos_name(struct super_block *sb, struct chain_t *p_dir, - struct dos_name_t *p_dosname); -void fat_attach_count_to_dos_name(u8 *dosname, s32 count); -s32 fat_calc_num_entries(struct uni_name_t *p_uniname); -s32 exfat_calc_num_entries(struct uni_name_t *p_uniname); -u8 calc_checksum_1byte(void *data, s32 len, u8 chksum); u16 calc_checksum_2byte(void *data, s32 len, u16 chksum, s32 type); -u32 calc_checksum_4byte(void *data, s32 len, u32 chksum, s32 type); /* name resolution functions */ s32 resolve_path(struct inode *inode, char *path, struct chain_t *p_dir, struct uni_name_t *p_uniname); -s32 resolve_name(u8 *name, u8 **arg); /* file operation functions */ -s32 fat16_mount(struct super_block *sb, struct pbr_sector_t *p_pbr); -s32 fat32_mount(struct super_block *sb, struct pbr_sector_t *p_pbr); s32 exfat_mount(struct super_block *sb, struct pbr_sector_t *p_pbr); s32 create_dir(struct inode *inode, struct chain_t *p_dir, struct uni_name_t *p_uniname, struct file_id_t *fid); @@ -959,13 +821,13 @@ int multi_sector_read(struct super_block *sb, sector_t sec, int multi_sector_write(struct super_block *sb, sector_t sec, struct buffer_head *bh, s32 num_secs, bool sync); -void bdev_open(struct super_block *sb); -void bdev_close(struct super_block *sb); -int bdev_read(struct super_block *sb, sector_t secno, +void exfat_bdev_open(struct super_block *sb); +void exfat_bdev_close(struct super_block *sb); +int exfat_bdev_read(struct super_block *sb, sector_t secno, struct buffer_head **bh, u32 num_secs, bool read); -int bdev_write(struct super_block *sb, sector_t secno, +int exfat_bdev_write(struct super_block *sb, sector_t secno, struct buffer_head *bh, u32 num_secs, bool sync); -int bdev_sync(struct super_block *sb); +int exfat_bdev_sync(struct super_block *sb); extern const u8 uni_upcase[]; #endif /* _EXFAT_H */ diff --git a/drivers/staging/exfat/exfat_blkdev.c b/drivers/staging/exfat/exfat_blkdev.c index 81d20e6241c6..7bcd98b13109 100644 --- a/drivers/staging/exfat/exfat_blkdev.c +++ b/drivers/staging/exfat/exfat_blkdev.c @@ -8,7 +8,7 @@ #include #include "exfat.h" -void bdev_open(struct super_block *sb) +void exfat_bdev_open(struct super_block *sb) { struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); @@ -23,14 +23,14 @@ void bdev_open(struct super_block *sb) p_bd->opened = true; } -void bdev_close(struct super_block *sb) +void exfat_bdev_close(struct super_block *sb) { struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); p_bd->opened = false; } -int bdev_read(struct super_block *sb, sector_t secno, struct buffer_head **bh, +int exfat_bdev_read(struct super_block *sb, sector_t secno, struct buffer_head **bh, u32 num_secs, bool read) { struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); @@ -40,11 +40,11 @@ int bdev_read(struct super_block *sb, sector_t secno, struct buffer_head **bh, long flags = sbi->debug_flags; if (flags & EXFAT_DEBUGFLAGS_ERROR_RW) - return FFS_MEDIAERR; + return -EIO; #endif /* CONFIG_EXFAT_KERNEL_DEBUG */ if (!p_bd->opened) - return FFS_MEDIAERR; + return -ENODEV; if (*bh) __brelse(*bh); @@ -62,10 +62,10 @@ int bdev_read(struct super_block *sb, sector_t secno, struct buffer_head **bh, WARN(!p_fs->dev_ejected, "[EXFAT] No bh, device seems wrong or to be ejected.\n"); - return FFS_MEDIAERR; + return -EIO; } -int bdev_write(struct super_block *sb, sector_t secno, struct buffer_head *bh, +int exfat_bdev_write(struct super_block *sb, sector_t secno, struct buffer_head *bh, u32 num_secs, bool sync) { s32 count; @@ -77,11 +77,11 @@ int bdev_write(struct super_block *sb, sector_t secno, struct buffer_head *bh, long flags = sbi->debug_flags; if (flags & EXFAT_DEBUGFLAGS_ERROR_RW) - return FFS_MEDIAERR; + return -EIO; #endif /* CONFIG_EXFAT_KERNEL_DEBUG */ if (!p_bd->opened) - return FFS_MEDIAERR; + return -ENODEV; if (secno == bh->b_blocknr) { lock_buffer(bh); @@ -89,7 +89,7 @@ int bdev_write(struct super_block *sb, sector_t secno, struct buffer_head *bh, mark_buffer_dirty(bh); unlock_buffer(bh); if (sync && (sync_dirty_buffer(bh) != 0)) - return FFS_MEDIAERR; + return -EIO; } else { count = num_secs << p_bd->sector_size_bits; @@ -115,10 +115,10 @@ no_bh: WARN(!p_fs->dev_ejected, "[EXFAT] No bh, device seems wrong or to be ejected.\n"); - return FFS_MEDIAERR; + return -EIO; } -int bdev_sync(struct super_block *sb) +int exfat_bdev_sync(struct super_block *sb) { struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); #ifdef CONFIG_EXFAT_KERNEL_DEBUG @@ -126,11 +126,11 @@ int bdev_sync(struct super_block *sb) long flags = sbi->debug_flags; if (flags & EXFAT_DEBUGFLAGS_ERROR_RW) - return FFS_MEDIAERR; + return -EIO; #endif /* CONFIG_EXFAT_KERNEL_DEBUG */ if (!p_bd->opened) - return FFS_MEDIAERR; + return -ENODEV; return sync_blockdev(sb->s_bdev); } diff --git a/drivers/staging/exfat/exfat_cache.c b/drivers/staging/exfat/exfat_cache.c index e1b001718709..3fd5604058a9 100644 --- a/drivers/staging/exfat/exfat_cache.c +++ b/drivers/staging/exfat/exfat_cache.c @@ -12,8 +12,8 @@ #define DIRTYBIT 0x02 /* Local variables */ -static DEFINE_SEMAPHORE(f_sem); -static DEFINE_SEMAPHORE(b_sem); +static DEFINE_MUTEX(f_mutex); +static DEFINE_MUTEX(b_mutex); static struct buf_cache_t *FAT_cache_find(struct super_block *sb, sector_t sec) { @@ -128,7 +128,7 @@ static void buf_cache_remove_hash(struct buf_cache_t *bp) (bp->hash_next)->hash_prev = bp->hash_prev; } -void buf_init(struct super_block *sb) +void exfat_buf_init(struct super_block *sb) { struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); @@ -189,11 +189,11 @@ void buf_init(struct super_block *sb) buf_cache_insert_hash(sb, &p_fs->buf_cache_array[i]); } -void buf_shutdown(struct super_block *sb) +void exfat_buf_shutdown(struct super_block *sb) { } -static int __FAT_read(struct super_block *sb, u32 loc, u32 *content) +static int __exfat_fat_read(struct super_block *sb, u32 loc, u32 *content) { s32 off; u32 _content; @@ -202,107 +202,22 @@ static int __FAT_read(struct super_block *sb, u32 loc, u32 *content) struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - if (p_fs->vol_type == FAT12) { - sec = p_fs->FAT1_start_sector + - ((loc + (loc >> 1)) >> p_bd->sector_size_bits); - off = (loc + (loc >> 1)) & p_bd->sector_size_mask; + sec = p_fs->FAT1_start_sector + + (loc >> (p_bd->sector_size_bits - 2)); + off = (loc << 2) & p_bd->sector_size_mask; - if (off == (p_bd->sector_size - 1)) { - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; + fat_sector = exfat_fat_getblk(sb, sec); + if (!fat_sector) + return -1; - _content = (u32)fat_sector[off]; + fat_entry = &fat_sector[off]; + _content = GET32_A(fat_entry); - fat_sector = FAT_getblk(sb, ++sec); - if (!fat_sector) - return -1; - - _content |= (u32)fat_sector[0] << 8; - } else { - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - _content = GET16(fat_entry); - } - - if (loc & 1) - _content >>= 4; - - _content &= 0x00000FFF; - - if (_content >= CLUSTER_16(0x0FF8)) { - *content = CLUSTER_32(~0); - return 0; - } - *content = CLUSTER_32(_content); - return 0; - } else if (p_fs->vol_type == FAT16) { - sec = p_fs->FAT1_start_sector + - (loc >> (p_bd->sector_size_bits - 1)); - off = (loc << 1) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - - _content = GET16_A(fat_entry); - - _content &= 0x0000FFFF; - - if (_content >= CLUSTER_16(0xFFF8)) { - *content = CLUSTER_32(~0); - return 0; - } - *content = CLUSTER_32(_content); - return 0; - } else if (p_fs->vol_type == FAT32) { - sec = p_fs->FAT1_start_sector + - (loc >> (p_bd->sector_size_bits - 2)); - off = (loc << 2) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - - _content = GET32_A(fat_entry); - - _content &= 0x0FFFFFFF; - - if (_content >= CLUSTER_32(0x0FFFFFF8)) { - *content = CLUSTER_32(~0); - return 0; - } - *content = CLUSTER_32(_content); - return 0; - } else if (p_fs->vol_type == EXFAT) { - sec = p_fs->FAT1_start_sector + - (loc >> (p_bd->sector_size_bits - 2)); - off = (loc << 2) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - _content = GET32_A(fat_entry); - - if (_content >= CLUSTER_32(0xFFFFFFF8)) { - *content = CLUSTER_32(~0); - return 0; - } - *content = CLUSTER_32(_content); + if (_content >= CLUSTER_32(0xFFFFFFF8)) { + *content = CLUSTER_32(~0); return 0; } - - /* Unknown volume type, throw in the towel and go home */ - *content = CLUSTER_32(~0); + *content = CLUSTER_32(_content); return 0; } @@ -311,18 +226,18 @@ static int __FAT_read(struct super_block *sb, u32 loc, u32 *content) * returns 0 on success * -1 on error */ -int FAT_read(struct super_block *sb, u32 loc, u32 *content) +int exfat_fat_read(struct super_block *sb, u32 loc, u32 *content) { s32 ret; - down(&f_sem); - ret = __FAT_read(sb, loc, content); - up(&f_sem); + mutex_lock(&f_mutex); + ret = __exfat_fat_read(sb, loc, content); + mutex_unlock(&f_mutex); return ret; } -static s32 __FAT_write(struct super_block *sb, u32 loc, u32 content) +static s32 __exfat_fat_write(struct super_block *sb, u32 loc, u32 content) { s32 off; sector_t sec; @@ -330,118 +245,34 @@ static s32 __FAT_write(struct super_block *sb, u32 loc, u32 content) struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - if (p_fs->vol_type == FAT12) { - content &= 0x00000FFF; + sec = p_fs->FAT1_start_sector + (loc >> + (p_bd->sector_size_bits - 2)); + off = (loc << 2) & p_bd->sector_size_mask; - sec = p_fs->FAT1_start_sector + - ((loc + (loc >> 1)) >> p_bd->sector_size_bits); - off = (loc + (loc >> 1)) & p_bd->sector_size_mask; + fat_sector = exfat_fat_getblk(sb, sec); + if (!fat_sector) + return -1; - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; + fat_entry = &fat_sector[off]; - if (loc & 1) { /* odd */ - content <<= 4; + SET32_A(fat_entry, content); - if (off == (p_bd->sector_size - 1)) { - fat_sector[off] = (u8)(content | - (fat_sector[off] & - 0x0F)); - FAT_modify(sb, sec); - - fat_sector = FAT_getblk(sb, ++sec); - if (!fat_sector) - return -1; - - fat_sector[0] = (u8)(content >> 8); - } else { - fat_entry = &fat_sector[off]; - content |= GET16(fat_entry) & 0x000F; - - SET16(fat_entry, content); - } - } else { /* even */ - fat_sector[off] = (u8)(content); - - if (off == (p_bd->sector_size - 1)) { - fat_sector[off] = (u8)(content); - FAT_modify(sb, sec); - - fat_sector = FAT_getblk(sb, ++sec); - if (!fat_sector) - return -1; - fat_sector[0] = (u8)((fat_sector[0] & 0xF0) | - (content >> 8)); - } else { - fat_entry = &fat_sector[off]; - content |= GET16(fat_entry) & 0xF000; - - SET16(fat_entry, content); - } - } - } - - else if (p_fs->vol_type == FAT16) { - content &= 0x0000FFFF; - - sec = p_fs->FAT1_start_sector + (loc >> - (p_bd->sector_size_bits - 1)); - off = (loc << 1) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - - SET16_A(fat_entry, content); - } else if (p_fs->vol_type == FAT32) { - content &= 0x0FFFFFFF; - - sec = p_fs->FAT1_start_sector + (loc >> - (p_bd->sector_size_bits - 2)); - off = (loc << 2) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - - content |= GET32_A(fat_entry) & 0xF0000000; - - SET32_A(fat_entry, content); - } else { /* p_fs->vol_type == EXFAT */ - sec = p_fs->FAT1_start_sector + (loc >> - (p_bd->sector_size_bits - 2)); - off = (loc << 2) & p_bd->sector_size_mask; - - fat_sector = FAT_getblk(sb, sec); - if (!fat_sector) - return -1; - - fat_entry = &fat_sector[off]; - - SET32_A(fat_entry, content); - } - - FAT_modify(sb, sec); + exfat_fat_modify(sb, sec); return 0; } -int FAT_write(struct super_block *sb, u32 loc, u32 content) +int exfat_fat_write(struct super_block *sb, u32 loc, u32 content) { s32 ret; - down(&f_sem); - ret = __FAT_write(sb, loc, content); - up(&f_sem); + mutex_lock(&f_mutex); + ret = __exfat_fat_write(sb, loc, content); + mutex_unlock(&f_mutex); return ret; } -u8 *FAT_getblk(struct super_block *sb, sector_t sec) +u8 *exfat_fat_getblk(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); @@ -462,7 +293,7 @@ u8 *FAT_getblk(struct super_block *sb, sector_t sec) FAT_cache_insert_hash(sb, bp); - if (sector_read(sb, sec, &bp->buf_bh, 1) != FFS_SUCCESS) { + if (sector_read(sb, sec, &bp->buf_bh, 1) != 0) { FAT_cache_remove_hash(bp); bp->drv = -1; bp->sec = ~0; @@ -476,7 +307,7 @@ u8 *FAT_getblk(struct super_block *sb, sector_t sec) return bp->buf_bh->b_data; } -void FAT_modify(struct super_block *sb, sector_t sec) +void exfat_fat_modify(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; @@ -485,12 +316,12 @@ void FAT_modify(struct super_block *sb, sector_t sec) sector_write(sb, sec, bp->buf_bh, 0); } -void FAT_release_all(struct super_block *sb) +void exfat_fat_release_all(struct super_block *sb) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - down(&f_sem); + mutex_lock(&f_mutex); bp = p_fs->FAT_cache_lru_list.next; while (bp != &p_fs->FAT_cache_lru_list) { @@ -507,15 +338,15 @@ void FAT_release_all(struct super_block *sb) bp = bp->next; } - up(&f_sem); + mutex_unlock(&f_mutex); } -void FAT_sync(struct super_block *sb) +void exfat_fat_sync(struct super_block *sb) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - down(&f_sem); + mutex_lock(&f_mutex); bp = p_fs->FAT_cache_lru_list.next; while (bp != &p_fs->FAT_cache_lru_list) { @@ -526,7 +357,7 @@ void FAT_sync(struct super_block *sb) bp = bp->next; } - up(&f_sem); + mutex_unlock(&f_mutex); } static struct buf_cache_t *buf_cache_find(struct super_block *sb, sector_t sec) @@ -561,7 +392,7 @@ static struct buf_cache_t *buf_cache_get(struct super_block *sb, sector_t sec) return bp; } -static u8 *__buf_getblk(struct super_block *sb, sector_t sec) +static u8 *__exfat_buf_getblk(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); @@ -582,7 +413,7 @@ static u8 *__buf_getblk(struct super_block *sb, sector_t sec) buf_cache_insert_hash(sb, bp); - if (sector_read(sb, sec, &bp->buf_bh, 1) != FFS_SUCCESS) { + if (sector_read(sb, sec, &bp->buf_bh, 1) != 0) { buf_cache_remove_hash(bp); bp->drv = -1; bp->sec = ~0; @@ -596,22 +427,22 @@ static u8 *__buf_getblk(struct super_block *sb, sector_t sec) return bp->buf_bh->b_data; } -u8 *buf_getblk(struct super_block *sb, sector_t sec) +u8 *exfat_buf_getblk(struct super_block *sb, sector_t sec) { u8 *buf; - down(&b_sem); - buf = __buf_getblk(sb, sec); - up(&b_sem); + mutex_lock(&b_mutex); + buf = __exfat_buf_getblk(sb, sec); + mutex_unlock(&b_mutex); return buf; } -void buf_modify(struct super_block *sb, sector_t sec) +void exfat_buf_modify(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; - down(&b_sem); + mutex_lock(&b_mutex); bp = buf_cache_find(sb, sec); if (likely(bp)) @@ -620,14 +451,14 @@ void buf_modify(struct super_block *sb, sector_t sec) WARN(!bp, "[EXFAT] failed to find buffer_cache(sector:%llu).\n", (unsigned long long)sec); - up(&b_sem); + mutex_unlock(&b_mutex); } -void buf_lock(struct super_block *sb, sector_t sec) +void exfat_buf_lock(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; - down(&b_sem); + mutex_lock(&b_mutex); bp = buf_cache_find(sb, sec); if (likely(bp)) @@ -636,14 +467,14 @@ void buf_lock(struct super_block *sb, sector_t sec) WARN(!bp, "[EXFAT] failed to find buffer_cache(sector:%llu).\n", (unsigned long long)sec); - up(&b_sem); + mutex_unlock(&b_mutex); } -void buf_unlock(struct super_block *sb, sector_t sec) +void exfat_buf_unlock(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; - down(&b_sem); + mutex_lock(&b_mutex); bp = buf_cache_find(sb, sec); if (likely(bp)) @@ -652,15 +483,15 @@ void buf_unlock(struct super_block *sb, sector_t sec) WARN(!bp, "[EXFAT] failed to find buffer_cache(sector:%llu).\n", (unsigned long long)sec); - up(&b_sem); + mutex_unlock(&b_mutex); } -void buf_release(struct super_block *sb, sector_t sec) +void exfat_buf_release(struct super_block *sb, sector_t sec) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - down(&b_sem); + mutex_lock(&b_mutex); bp = buf_cache_find(sb, sec); if (likely(bp)) { @@ -676,15 +507,15 @@ void buf_release(struct super_block *sb, sector_t sec) move_to_lru(bp, &p_fs->buf_cache_lru_list); } - up(&b_sem); + mutex_unlock(&b_mutex); } -void buf_release_all(struct super_block *sb) +void exfat_buf_release_all(struct super_block *sb) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - down(&b_sem); + mutex_lock(&b_mutex); bp = p_fs->buf_cache_lru_list.next; while (bp != &p_fs->buf_cache_lru_list) { @@ -701,15 +532,15 @@ void buf_release_all(struct super_block *sb) bp = bp->next; } - up(&b_sem); + mutex_unlock(&b_mutex); } -void buf_sync(struct super_block *sb) +void exfat_buf_sync(struct super_block *sb) { struct buf_cache_t *bp; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - down(&b_sem); + mutex_lock(&b_mutex); bp = p_fs->buf_cache_lru_list.next; while (bp != &p_fs->buf_cache_lru_list) { @@ -720,5 +551,5 @@ void buf_sync(struct super_block *sb) bp = bp->next; } - up(&b_sem); + mutex_unlock(&b_mutex); } diff --git a/drivers/staging/exfat/exfat_core.c b/drivers/staging/exfat/exfat_core.c index 79174e5c4145..d2d3447083c7 100644 --- a/drivers/staging/exfat/exfat_core.c +++ b/drivers/staging/exfat/exfat_core.c @@ -20,15 +20,6 @@ static void __set_sb_dirty(struct super_block *sb) static u8 name_buf[MAX_PATH_LENGTH * MAX_CHARSET_SIZE]; -static char *reserved_names[] = { - "AUX ", "CON ", "NUL ", "PRN ", - "COM1 ", "COM2 ", "COM3 ", "COM4 ", - "COM5 ", "COM6 ", "COM7 ", "COM8 ", "COM9 ", - "LPT1 ", "LPT2 ", "LPT3 ", "LPT4 ", - "LPT5 ", "LPT6 ", "LPT7 ", "LPT8 ", "LPT9 ", - NULL -}; - static u8 free_bit[] = { 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, /* 0 ~ 19 */ 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3, /* 20 ~ 39 */ @@ -99,25 +90,23 @@ void fs_set_vol_flags(struct super_block *sb, u32 new_flag) p_fs->vol_flag = new_flag; - if (p_fs->vol_type == EXFAT) { - if (!p_fs->pbr_bh) { - if (sector_read(sb, p_fs->PBR_sector, - &p_fs->pbr_bh, 1) != FFS_SUCCESS) - return; - } - - p_pbr = (struct pbr_sector_t *)p_fs->pbr_bh->b_data; - p_bpb = (struct bpbex_t *)p_pbr->bpb; - SET16(p_bpb->vol_flags, (u16)new_flag); - - /* XXX duyoung - * what can we do here? (cuz fs_set_vol_flags() is void) - */ - if ((new_flag == VOL_DIRTY) && (!buffer_dirty(p_fs->pbr_bh))) - sector_write(sb, p_fs->PBR_sector, p_fs->pbr_bh, 1); - else - sector_write(sb, p_fs->PBR_sector, p_fs->pbr_bh, 0); + if (!p_fs->pbr_bh) { + if (sector_read(sb, p_fs->PBR_sector, + &p_fs->pbr_bh, 1) != 0) + return; } + + p_pbr = (struct pbr_sector_t *)p_fs->pbr_bh->b_data; + p_bpb = (struct bpbex_t *)p_pbr->bpb; + SET16(p_bpb->vol_flags, (u16)new_flag); + + /* XXX duyoung + * what can we do here? (cuz fs_set_vol_flags() is void) + */ + if ((new_flag == VOL_DIRTY) && (!buffer_dirty(p_fs->pbr_bh))) + sector_write(sb, p_fs->PBR_sector, p_fs->pbr_bh, 1); + else + sector_write(sb, p_fs->PBR_sector, p_fs->pbr_bh, 0); } void fs_error(struct super_block *sb) @@ -136,10 +125,10 @@ void fs_error(struct super_block *sb) * Cluster Management Functions */ -s32 clear_cluster(struct super_block *sb, u32 clu) +static s32 clear_cluster(struct super_block *sb, u32 clu) { sector_t s, n; - s32 ret = FFS_SUCCESS; + s32 ret = 0; struct buffer_head *tmp_bh = NULL; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); @@ -154,12 +143,12 @@ s32 clear_cluster(struct super_block *sb, u32 clu) for (; s < n; s++) { ret = sector_read(sb, s, &tmp_bh, 0); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; memset((char *)tmp_bh->b_data, 0x0, p_bd->sector_size); ret = sector_write(sb, s, tmp_bh, 0); - if (ret != FFS_SUCCESS) + if (ret != 0) break; } @@ -167,429 +156,7 @@ s32 clear_cluster(struct super_block *sb, u32 clu) return ret; } -s32 fat_alloc_cluster(struct super_block *sb, s32 num_alloc, - struct chain_t *p_chain) -{ - int i, num_clusters = 0; - u32 new_clu, last_clu = CLUSTER_32(~0), read_clu; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - new_clu = p_chain->dir; - if (new_clu == CLUSTER_32(~0)) - new_clu = p_fs->clu_srch_ptr; - else if (new_clu >= p_fs->num_clusters) - new_clu = 2; - - __set_sb_dirty(sb); - - p_chain->dir = CLUSTER_32(~0); - - for (i = 2; i < p_fs->num_clusters; i++) { - if (FAT_read(sb, new_clu, &read_clu) != 0) - return -1; - - if (read_clu == CLUSTER_32(0)) { - if (FAT_write(sb, new_clu, CLUSTER_32(~0)) < 0) - return -1; - num_clusters++; - - if (p_chain->dir == CLUSTER_32(~0)) { - p_chain->dir = new_clu; - } else { - if (FAT_write(sb, last_clu, new_clu) < 0) - return -1; - } - - last_clu = new_clu; - - if ((--num_alloc) == 0) { - p_fs->clu_srch_ptr = new_clu; - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters += num_clusters; - - return num_clusters; - } - } - if ((++new_clu) >= p_fs->num_clusters) - new_clu = 2; - } - - p_fs->clu_srch_ptr = new_clu; - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters += num_clusters; - - return num_clusters; -} - -s32 exfat_alloc_cluster(struct super_block *sb, s32 num_alloc, - struct chain_t *p_chain) -{ - s32 num_clusters = 0; - u32 hint_clu, new_clu, last_clu = CLUSTER_32(~0); - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - hint_clu = p_chain->dir; - if (hint_clu == CLUSTER_32(~0)) { - hint_clu = test_alloc_bitmap(sb, p_fs->clu_srch_ptr - 2); - if (hint_clu == CLUSTER_32(~0)) - return 0; - } else if (hint_clu >= p_fs->num_clusters) { - hint_clu = 2; - p_chain->flags = 0x01; - } - - __set_sb_dirty(sb); - - p_chain->dir = CLUSTER_32(~0); - - while ((new_clu = test_alloc_bitmap(sb, hint_clu - 2)) != CLUSTER_32(~0)) { - if (new_clu != hint_clu) { - if (p_chain->flags == 0x03) { - exfat_chain_cont_cluster(sb, p_chain->dir, - num_clusters); - p_chain->flags = 0x01; - } - } - - if (set_alloc_bitmap(sb, new_clu - 2) != FFS_SUCCESS) - return -1; - - num_clusters++; - - if (p_chain->flags == 0x01) { - if (FAT_write(sb, new_clu, CLUSTER_32(~0)) < 0) - return -1; - } - - if (p_chain->dir == CLUSTER_32(~0)) { - p_chain->dir = new_clu; - } else { - if (p_chain->flags == 0x01) { - if (FAT_write(sb, last_clu, new_clu) < 0) - return -1; - } - } - last_clu = new_clu; - - if ((--num_alloc) == 0) { - p_fs->clu_srch_ptr = hint_clu; - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters += num_clusters; - - p_chain->size += num_clusters; - return num_clusters; - } - - hint_clu = new_clu + 1; - if (hint_clu >= p_fs->num_clusters) { - hint_clu = 2; - - if (p_chain->flags == 0x03) { - exfat_chain_cont_cluster(sb, p_chain->dir, - num_clusters); - p_chain->flags = 0x01; - } - } - } - - p_fs->clu_srch_ptr = hint_clu; - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters += num_clusters; - - p_chain->size += num_clusters; - return num_clusters; -} - -void fat_free_cluster(struct super_block *sb, struct chain_t *p_chain, - s32 do_relse) -{ - s32 num_clusters = 0; - u32 clu, prev; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - int i; - sector_t sector; - - if ((p_chain->dir == CLUSTER_32(0)) || (p_chain->dir == CLUSTER_32(~0))) - return; - __set_sb_dirty(sb); - clu = p_chain->dir; - - if (p_chain->size <= 0) - return; - - do { - if (p_fs->dev_ejected) - break; - - if (do_relse) { - sector = START_SECTOR(clu); - for (i = 0; i < p_fs->sectors_per_clu; i++) - buf_release(sb, sector + i); - } - - prev = clu; - if (FAT_read(sb, clu, &clu) == -1) - break; - - if (FAT_write(sb, prev, CLUSTER_32(0)) < 0) - break; - num_clusters++; - - } while (clu != CLUSTER_32(~0)); - - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters -= num_clusters; -} - -void exfat_free_cluster(struct super_block *sb, struct chain_t *p_chain, - s32 do_relse) -{ - s32 num_clusters = 0; - u32 clu; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - int i; - sector_t sector; - - if ((p_chain->dir == CLUSTER_32(0)) || (p_chain->dir == CLUSTER_32(~0))) - return; - - if (p_chain->size <= 0) { - pr_err("[EXFAT] free_cluster : skip free-req clu:%u, because of zero-size truncation\n", - p_chain->dir); - return; - } - - __set_sb_dirty(sb); - clu = p_chain->dir; - - if (p_chain->flags == 0x03) { - do { - if (do_relse) { - sector = START_SECTOR(clu); - for (i = 0; i < p_fs->sectors_per_clu; i++) - buf_release(sb, sector + i); - } - - if (clr_alloc_bitmap(sb, clu - 2) != FFS_SUCCESS) - break; - clu++; - - num_clusters++; - } while (num_clusters < p_chain->size); - } else { - do { - if (p_fs->dev_ejected) - break; - - if (do_relse) { - sector = START_SECTOR(clu); - for (i = 0; i < p_fs->sectors_per_clu; i++) - buf_release(sb, sector + i); - } - - if (clr_alloc_bitmap(sb, clu - 2) != FFS_SUCCESS) - break; - - if (FAT_read(sb, clu, &clu) == -1) - break; - num_clusters++; - } while ((clu != CLUSTER_32(0)) && (clu != CLUSTER_32(~0))); - } - - if (p_fs->used_clusters != UINT_MAX) - p_fs->used_clusters -= num_clusters; -} - -u32 find_last_cluster(struct super_block *sb, struct chain_t *p_chain) -{ - u32 clu, next; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - clu = p_chain->dir; - - if (p_chain->flags == 0x03) { - clu += p_chain->size - 1; - } else { - while ((FAT_read(sb, clu, &next) == 0) && - (next != CLUSTER_32(~0))) { - if (p_fs->dev_ejected) - break; - clu = next; - } - } - - return clu; -} - -s32 count_num_clusters(struct super_block *sb, struct chain_t *p_chain) -{ - int i, count = 0; - u32 clu; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - if ((p_chain->dir == CLUSTER_32(0)) || (p_chain->dir == CLUSTER_32(~0))) - return 0; - - clu = p_chain->dir; - - if (p_chain->flags == 0x03) { - count = p_chain->size; - } else { - for (i = 2; i < p_fs->num_clusters; i++) { - count++; - if (FAT_read(sb, clu, &clu) != 0) - return 0; - if (clu == CLUSTER_32(~0)) - break; - } - } - - return count; -} - -s32 fat_count_used_clusters(struct super_block *sb) -{ - int i, count = 0; - u32 clu; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - for (i = 2; i < p_fs->num_clusters; i++) { - if (FAT_read(sb, i, &clu) != 0) - break; - if (clu != CLUSTER_32(0)) - count++; - } - - return count; -} - -s32 exfat_count_used_clusters(struct super_block *sb) -{ - int i, map_i, map_b, count = 0; - u8 k; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - - map_i = map_b = 0; - - for (i = 2; i < p_fs->num_clusters; i += 8) { - k = *(((u8 *)p_fs->vol_amap[map_i]->b_data) + map_b); - count += used_bit[k]; - - if ((++map_b) >= p_bd->sector_size) { - map_i++; - map_b = 0; - } - } - - return count; -} - -void exfat_chain_cont_cluster(struct super_block *sb, u32 chain, s32 len) -{ - if (len == 0) - return; - - while (len > 1) { - if (FAT_write(sb, chain, chain + 1) < 0) - break; - chain++; - len--; - } - FAT_write(sb, chain, CLUSTER_32(~0)); -} - -/* - * Allocation Bitmap Management Functions - */ - -s32 load_alloc_bitmap(struct super_block *sb) -{ - int i, j, ret; - u32 map_size; - u32 type; - sector_t sector; - struct chain_t clu; - struct bmap_dentry_t *ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - - clu.dir = p_fs->root_dir; - clu.flags = 0x01; - - while (clu.dir != CLUSTER_32(~0)) { - if (p_fs->dev_ejected) - break; - - for (i = 0; i < p_fs->dentries_per_clu; i++) { - ep = (struct bmap_dentry_t *)get_entry_in_dir(sb, &clu, - i, NULL); - if (!ep) - return FFS_MEDIAERR; - - type = p_fs->fs_func->get_entry_type((struct dentry_t *)ep); - - if (type == TYPE_UNUSED) - break; - if (type != TYPE_BITMAP) - continue; - - if (ep->flags == 0x0) { - p_fs->map_clu = GET32_A(ep->start_clu); - map_size = (u32)GET64_A(ep->size); - - p_fs->map_sectors = ((map_size - 1) >> p_bd->sector_size_bits) + 1; - - p_fs->vol_amap = kmalloc_array(p_fs->map_sectors, - sizeof(struct buffer_head *), - GFP_KERNEL); - if (!p_fs->vol_amap) - return FFS_MEMORYERR; - - sector = START_SECTOR(p_fs->map_clu); - - for (j = 0; j < p_fs->map_sectors; j++) { - p_fs->vol_amap[j] = NULL; - ret = sector_read(sb, sector + j, &(p_fs->vol_amap[j]), 1); - if (ret != FFS_SUCCESS) { - /* release all buffers and free vol_amap */ - i = 0; - while (i < j) - brelse(p_fs->vol_amap[i++]); - - kfree(p_fs->vol_amap); - p_fs->vol_amap = NULL; - return ret; - } - } - - p_fs->pbr_bh = NULL; - return FFS_SUCCESS; - } - } - - if (FAT_read(sb, clu.dir, &clu.dir) != 0) - return FFS_MEDIAERR; - } - - return FFS_FORMATERR; -} - -void free_alloc_bitmap(struct super_block *sb) -{ - int i; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - brelse(p_fs->pbr_bh); - - for (i = 0; i < p_fs->map_sectors; i++) - __brelse(p_fs->vol_amap[i]); - - kfree(p_fs->vol_amap); - p_fs->vol_amap = NULL; -} - -s32 set_alloc_bitmap(struct super_block *sb, u32 clu) +static s32 set_alloc_bitmap(struct super_block *sb, u32 clu) { int i, b; sector_t sector; @@ -606,7 +173,7 @@ s32 set_alloc_bitmap(struct super_block *sb, u32 clu) return sector_write(sb, sector, p_fs->vol_amap[i], 0); } -s32 clr_alloc_bitmap(struct super_block *sb, u32 clu) +static s32 clr_alloc_bitmap(struct super_block *sb, u32 clu) { int i, b; sector_t sector; @@ -640,7 +207,7 @@ s32 clr_alloc_bitmap(struct super_block *sb, u32 clu) #endif /* CONFIG_EXFAT_DISCARD */ } -u32 test_alloc_bitmap(struct super_block *sb, u32 clu) +static u32 test_alloc_bitmap(struct super_block *sb, u32 clu) { int i, map_i, map_b; u32 clu_base, clu_free; @@ -680,6 +247,318 @@ u32 test_alloc_bitmap(struct super_block *sb, u32 clu) return CLUSTER_32(~0); } +static s32 exfat_alloc_cluster(struct super_block *sb, s32 num_alloc, + struct chain_t *p_chain) +{ + s32 num_clusters = 0; + u32 hint_clu, new_clu, last_clu = CLUSTER_32(~0); + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + + hint_clu = p_chain->dir; + if (hint_clu == CLUSTER_32(~0)) { + hint_clu = test_alloc_bitmap(sb, p_fs->clu_srch_ptr - 2); + if (hint_clu == CLUSTER_32(~0)) + return 0; + } else if (hint_clu >= p_fs->num_clusters) { + hint_clu = 2; + p_chain->flags = 0x01; + } + + __set_sb_dirty(sb); + + p_chain->dir = CLUSTER_32(~0); + + while ((new_clu = test_alloc_bitmap(sb, hint_clu - 2)) != CLUSTER_32(~0)) { + if (new_clu != hint_clu) { + if (p_chain->flags == 0x03) { + exfat_chain_cont_cluster(sb, p_chain->dir, + num_clusters); + p_chain->flags = 0x01; + } + } + + if (set_alloc_bitmap(sb, new_clu - 2) != 0) + return -EIO; + + num_clusters++; + + if (p_chain->flags == 0x01) { + if (exfat_fat_write(sb, new_clu, CLUSTER_32(~0)) < 0) + return -EIO; + } + + if (p_chain->dir == CLUSTER_32(~0)) { + p_chain->dir = new_clu; + } else { + if (p_chain->flags == 0x01) { + if (exfat_fat_write(sb, last_clu, new_clu) < 0) + return -EIO; + } + } + last_clu = new_clu; + + if ((--num_alloc) == 0) { + p_fs->clu_srch_ptr = hint_clu; + if (p_fs->used_clusters != UINT_MAX) + p_fs->used_clusters += num_clusters; + + p_chain->size += num_clusters; + return num_clusters; + } + + hint_clu = new_clu + 1; + if (hint_clu >= p_fs->num_clusters) { + hint_clu = 2; + + if (p_chain->flags == 0x03) { + exfat_chain_cont_cluster(sb, p_chain->dir, + num_clusters); + p_chain->flags = 0x01; + } + } + } + + p_fs->clu_srch_ptr = hint_clu; + if (p_fs->used_clusters != UINT_MAX) + p_fs->used_clusters += num_clusters; + + p_chain->size += num_clusters; + return num_clusters; +} + +static void exfat_free_cluster(struct super_block *sb, struct chain_t *p_chain, + s32 do_relse) +{ + s32 num_clusters = 0; + u32 clu; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + int i; + sector_t sector; + + if ((p_chain->dir == CLUSTER_32(0)) || (p_chain->dir == CLUSTER_32(~0))) + return; + + if (p_chain->size <= 0) { + pr_err("[EXFAT] free_cluster : skip free-req clu:%u, because of zero-size truncation\n", + p_chain->dir); + return; + } + + __set_sb_dirty(sb); + clu = p_chain->dir; + + if (p_chain->flags == 0x03) { + do { + if (do_relse) { + sector = START_SECTOR(clu); + for (i = 0; i < p_fs->sectors_per_clu; i++) + exfat_buf_release(sb, sector + i); + } + + if (clr_alloc_bitmap(sb, clu - 2) != 0) + break; + clu++; + + num_clusters++; + } while (num_clusters < p_chain->size); + } else { + do { + if (p_fs->dev_ejected) + break; + + if (do_relse) { + sector = START_SECTOR(clu); + for (i = 0; i < p_fs->sectors_per_clu; i++) + exfat_buf_release(sb, sector + i); + } + + if (clr_alloc_bitmap(sb, clu - 2) != 0) + break; + + if (exfat_fat_read(sb, clu, &clu) == -1) + break; + num_clusters++; + } while ((clu != CLUSTER_32(0)) && (clu != CLUSTER_32(~0))); + } + + if (p_fs->used_clusters != UINT_MAX) + p_fs->used_clusters -= num_clusters; +} + +static u32 find_last_cluster(struct super_block *sb, struct chain_t *p_chain) +{ + u32 clu, next; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + + clu = p_chain->dir; + + if (p_chain->flags == 0x03) { + clu += p_chain->size - 1; + } else { + while ((exfat_fat_read(sb, clu, &next) == 0) && + (next != CLUSTER_32(~0))) { + if (p_fs->dev_ejected) + break; + clu = next; + } + } + + return clu; +} + +s32 count_num_clusters(struct super_block *sb, struct chain_t *p_chain) +{ + int i, count = 0; + u32 clu; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + + if ((p_chain->dir == CLUSTER_32(0)) || (p_chain->dir == CLUSTER_32(~0))) + return 0; + + clu = p_chain->dir; + + if (p_chain->flags == 0x03) { + count = p_chain->size; + } else { + for (i = 2; i < p_fs->num_clusters; i++) { + count++; + if (exfat_fat_read(sb, clu, &clu) != 0) + return 0; + if (clu == CLUSTER_32(~0)) + break; + } + } + + return count; +} + +static s32 exfat_count_used_clusters(struct super_block *sb) +{ + int i, map_i, map_b, count = 0; + u8 k; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); + + map_i = 0; + map_b = 0; + + for (i = 2; i < p_fs->num_clusters; i += 8) { + k = *(((u8 *)p_fs->vol_amap[map_i]->b_data) + map_b); + count += used_bit[k]; + + if ((++map_b) >= p_bd->sector_size) { + map_i++; + map_b = 0; + } + } + + return count; +} + +void exfat_chain_cont_cluster(struct super_block *sb, u32 chain, s32 len) +{ + if (len == 0) + return; + + while (len > 1) { + if (exfat_fat_write(sb, chain, chain + 1) < 0) + break; + chain++; + len--; + } + exfat_fat_write(sb, chain, CLUSTER_32(~0)); +} + +/* + * Allocation Bitmap Management Functions + */ + +s32 load_alloc_bitmap(struct super_block *sb) +{ + int i, j, ret; + u32 map_size; + u32 type; + sector_t sector; + struct chain_t clu; + struct bmap_dentry_t *ep; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); + + clu.dir = p_fs->root_dir; + clu.flags = 0x01; + + while (clu.dir != CLUSTER_32(~0)) { + if (p_fs->dev_ejected) + break; + + for (i = 0; i < p_fs->dentries_per_clu; i++) { + ep = (struct bmap_dentry_t *)get_entry_in_dir(sb, &clu, + i, NULL); + if (!ep) + return -ENOENT; + + type = p_fs->fs_func->get_entry_type((struct dentry_t *)ep); + + if (type == TYPE_UNUSED) + break; + if (type != TYPE_BITMAP) + continue; + + if (ep->flags == 0x0) { + p_fs->map_clu = GET32_A(ep->start_clu); + map_size = (u32)GET64_A(ep->size); + + p_fs->map_sectors = ((map_size - 1) >> p_bd->sector_size_bits) + 1; + + p_fs->vol_amap = kmalloc_array(p_fs->map_sectors, + sizeof(struct buffer_head *), + GFP_KERNEL); + if (!p_fs->vol_amap) + return -ENOMEM; + + sector = START_SECTOR(p_fs->map_clu); + + for (j = 0; j < p_fs->map_sectors; j++) { + p_fs->vol_amap[j] = NULL; + ret = sector_read(sb, sector + j, &p_fs->vol_amap[j], 1); + if (ret != 0) { + /* release all buffers and free vol_amap */ + i = 0; + while (i < j) + brelse(p_fs->vol_amap[i++]); + + kfree(p_fs->vol_amap); + p_fs->vol_amap = NULL; + return ret; + } + } + + p_fs->pbr_bh = NULL; + return 0; + } + } + + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) + return -EIO; + } + + return -EFSCORRUPTED; +} + +void free_alloc_bitmap(struct super_block *sb) +{ + int i; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + + brelse(p_fs->pbr_bh); + + for (i = 0; i < p_fs->map_sectors; i++) + __brelse(p_fs->vol_amap[i]); + + kfree(p_fs->vol_amap); + p_fs->vol_amap = NULL; +} + void sync_alloc_bitmap(struct super_block *sb) { int i; @@ -698,7 +577,7 @@ void sync_alloc_bitmap(struct super_block *sb) static s32 __load_upcase_table(struct super_block *sb, sector_t sector, u32 num_sectors, u32 utbl_checksum) { - int i, ret = FFS_ERROR; + int i, ret = -EINVAL; u32 j; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); @@ -712,15 +591,15 @@ static s32 __load_upcase_table(struct super_block *sb, sector_t sector, u32 checksum = 0; - upcase_table = p_fs->vol_utbl = kmalloc(UTBL_COL_COUNT * sizeof(u16 *), - GFP_KERNEL); + upcase_table = kmalloc_array(UTBL_COL_COUNT, sizeof(u16 *), GFP_KERNEL); + p_fs->vol_utbl = upcase_table; if (!upcase_table) - return FFS_MEMORYERR; + return -ENOMEM; memset(upcase_table, 0, UTBL_COL_COUNT * sizeof(u16 *)); while (sector < end_sector) { ret = sector_read(sb, sector, &tmp_bh, 1); - if (ret != FFS_SUCCESS) { + if (ret != 0) { pr_debug("sector read (0x%llX)fail\n", (unsigned long long)sector); goto error; @@ -755,7 +634,7 @@ static s32 __load_upcase_table(struct super_block *sb, sector_t sector, upcase_table[col_index] = kmalloc_array(UTBL_ROW_COUNT, sizeof(u16), GFP_KERNEL); if (!upcase_table[col_index]) { - ret = FFS_MEMORYERR; + ret = -ENOMEM; goto error; } @@ -771,9 +650,9 @@ static s32 __load_upcase_table(struct super_block *sb, sector_t sector, if (index >= 0xFFFF && utbl_checksum == checksum) { if (tmp_bh) brelse(tmp_bh); - return FFS_SUCCESS; + return 0; } - ret = FFS_ERROR; + ret = -EINVAL; error: if (tmp_bh) brelse(tmp_bh); @@ -783,7 +662,7 @@ error: static s32 __load_default_upcase_table(struct super_block *sb) { - int i, ret = FFS_ERROR; + int i, ret = -EINVAL; u32 j; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); @@ -792,10 +671,10 @@ static s32 __load_default_upcase_table(struct super_block *sb) u16 uni = 0; u16 **upcase_table; - upcase_table = p_fs->vol_utbl = kmalloc(UTBL_COL_COUNT * sizeof(u16 *), - GFP_KERNEL); + upcase_table = kmalloc_array(UTBL_COL_COUNT, sizeof(u16 *), GFP_KERNEL); + p_fs->vol_utbl = upcase_table; if (!upcase_table) - return FFS_MEMORYERR; + return -ENOMEM; memset(upcase_table, 0, UTBL_COL_COUNT * sizeof(u16 *)); for (i = 0; index <= 0xFFFF && i < NUM_UPCASE * 2; i += 2) { @@ -818,7 +697,7 @@ static s32 __load_default_upcase_table(struct super_block *sb) sizeof(u16), GFP_KERNEL); if (!upcase_table[col_index]) { - ret = FFS_MEMORYERR; + ret = -ENOMEM; goto error; } @@ -832,7 +711,7 @@ static s32 __load_default_upcase_table(struct super_block *sb) } if (index >= 0xFFFF) - return FFS_SUCCESS; + return 0; error: /* FATAL error: default upcase table has error */ @@ -855,14 +734,14 @@ s32 load_upcase_table(struct super_block *sb) clu.flags = 0x01; if (p_fs->dev_ejected) - return FFS_MEDIAERR; + return -EIO; while (clu.dir != CLUSTER_32(~0)) { for (i = 0; i < p_fs->dentries_per_clu; i++) { ep = (struct case_dentry_t *)get_entry_in_dir(sb, &clu, i, NULL); if (!ep) - return FFS_MEDIAERR; + return -ENOENT; type = p_fs->fs_func->get_entry_type((struct dentry_t *)ep); @@ -877,12 +756,12 @@ s32 load_upcase_table(struct super_block *sb) sector = START_SECTOR(tbl_clu); num_sectors = ((tbl_size - 1) >> p_bd->sector_size_bits) + 1; if (__load_upcase_table(sb, sector, num_sectors, - GET32_A(ep->checksum)) != FFS_SUCCESS) + GET32_A(ep->checksum)) != 0) break; - return FFS_SUCCESS; + return 0; } - if (FAT_read(sb, clu.dir, &clu.dir) != 0) - return FFS_MEDIAERR; + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) + return -EIO; } /* load default upcase table */ return __load_default_upcase_table(sb); @@ -906,29 +785,7 @@ void free_upcase_table(struct super_block *sb) * Directory Entry Management Functions */ -u32 fat_get_entry_type(struct dentry_t *p_entry) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - if (*(ep->name) == 0x0) - return TYPE_UNUSED; - - else if (*(ep->name) == 0xE5) - return TYPE_DELETED; - - else if (ep->attr == ATTR_EXTEND) - return TYPE_EXTEND; - - else if ((ep->attr & (ATTR_SUBDIR | ATTR_VOLUME)) == ATTR_VOLUME) - return TYPE_VOLUME; - - else if ((ep->attr & (ATTR_SUBDIR | ATTR_VOLUME)) == ATTR_SUBDIR) - return TYPE_DIR; - - return TYPE_FILE; -} - -u32 exfat_get_entry_type(struct dentry_t *p_entry) +static u32 exfat_get_entry_type(struct dentry_t *p_entry) { struct file_dentry_t *ep = (struct file_dentry_t *)p_entry; @@ -973,30 +830,7 @@ u32 exfat_get_entry_type(struct dentry_t *p_entry) return TYPE_BENIGN_SEC; } -void fat_set_entry_type(struct dentry_t *p_entry, u32 type) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - if (type == TYPE_UNUSED) - *(ep->name) = 0x0; - - else if (type == TYPE_DELETED) - *(ep->name) = 0xE5; - - else if (type == TYPE_EXTEND) - ep->attr = ATTR_EXTEND; - - else if (type == TYPE_DIR) - ep->attr = ATTR_SUBDIR; - - else if (type == TYPE_FILE) - ep->attr = ATTR_ARCHIVE; - - else if (type == TYPE_SYMLINK) - ep->attr = ATTR_ARCHIVE | ATTR_SYMLINK; -} - -void exfat_set_entry_type(struct dentry_t *p_entry, u32 type) +static void exfat_set_entry_type(struct dentry_t *p_entry, u32 type) { struct file_dentry_t *ep = (struct file_dentry_t *)p_entry; @@ -1026,109 +860,56 @@ void exfat_set_entry_type(struct dentry_t *p_entry, u32 type) } } -u32 fat_get_entry_attr(struct dentry_t *p_entry) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - return (u32)ep->attr; -} - -u32 exfat_get_entry_attr(struct dentry_t *p_entry) +static u32 exfat_get_entry_attr(struct dentry_t *p_entry) { struct file_dentry_t *ep = (struct file_dentry_t *)p_entry; return (u32)GET16_A(ep->attr); } -void fat_set_entry_attr(struct dentry_t *p_entry, u32 attr) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - ep->attr = (u8)attr; -} - -void exfat_set_entry_attr(struct dentry_t *p_entry, u32 attr) +static void exfat_set_entry_attr(struct dentry_t *p_entry, u32 attr) { struct file_dentry_t *ep = (struct file_dentry_t *)p_entry; SET16_A(ep->attr, (u16)attr); } -u8 fat_get_entry_flag(struct dentry_t *p_entry) -{ - return 0x01; -} - -u8 exfat_get_entry_flag(struct dentry_t *p_entry) +static u8 exfat_get_entry_flag(struct dentry_t *p_entry) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; return ep->flags; } -void fat_set_entry_flag(struct dentry_t *p_entry, u8 flags) -{ -} - -void exfat_set_entry_flag(struct dentry_t *p_entry, u8 flags) +static void exfat_set_entry_flag(struct dentry_t *p_entry, u8 flags) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; ep->flags = flags; } -u32 fat_get_entry_clu0(struct dentry_t *p_entry) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - return ((u32)GET16_A(ep->start_clu_hi) << 16) | - GET16_A(ep->start_clu_lo); -} - -u32 exfat_get_entry_clu0(struct dentry_t *p_entry) +static u32 exfat_get_entry_clu0(struct dentry_t *p_entry) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; return GET32_A(ep->start_clu); } -void fat_set_entry_clu0(struct dentry_t *p_entry, u32 start_clu) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - SET16_A(ep->start_clu_lo, CLUSTER_16(start_clu)); - SET16_A(ep->start_clu_hi, CLUSTER_16(start_clu >> 16)); -} - -void exfat_set_entry_clu0(struct dentry_t *p_entry, u32 start_clu) +static void exfat_set_entry_clu0(struct dentry_t *p_entry, u32 start_clu) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; SET32_A(ep->start_clu, start_clu); } -u64 fat_get_entry_size(struct dentry_t *p_entry) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - return (u64)GET32_A(ep->size); -} - -u64 exfat_get_entry_size(struct dentry_t *p_entry) +static u64 exfat_get_entry_size(struct dentry_t *p_entry) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; return GET64_A(ep->valid_size); } -void fat_set_entry_size(struct dentry_t *p_entry, u64 size) -{ - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - SET32_A(ep->size, (u32)size); -} - -void exfat_set_entry_size(struct dentry_t *p_entry, u64 size) +static void exfat_set_entry_size(struct dentry_t *p_entry, u64 size) { struct strm_dentry_t *ep = (struct strm_dentry_t *)p_entry; @@ -1136,32 +917,7 @@ void exfat_set_entry_size(struct dentry_t *p_entry, u64 size) SET64_A(ep->size, size); } -void fat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode) -{ - u16 t = 0x00, d = 0x21; - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - switch (mode) { - case TM_CREATE: - t = GET16_A(ep->create_time); - d = GET16_A(ep->create_date); - break; - case TM_MODIFY: - t = GET16_A(ep->modify_time); - d = GET16_A(ep->modify_date); - break; - } - - tp->sec = (t & 0x001F) << 1; - tp->min = (t >> 5) & 0x003F; - tp->hour = (t >> 11); - tp->day = (d & 0x001F); - tp->mon = (d >> 5) & 0x000F; - tp->year = (d >> 9); -} - -void exfat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, +static void exfat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, u8 mode) { u16 t = 0x00, d = 0x21; @@ -1190,28 +946,7 @@ void exfat_get_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, tp->year = (d >> 9); } -void fat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, - u8 mode) -{ - u16 t, d; - struct dos_dentry_t *ep = (struct dos_dentry_t *)p_entry; - - t = (tp->hour << 11) | (tp->min << 5) | (tp->sec >> 1); - d = (tp->year << 9) | (tp->mon << 5) | tp->day; - - switch (mode) { - case TM_CREATE: - SET16_A(ep->create_time, t); - SET16_A(ep->create_date, d); - break; - case TM_MODIFY: - SET16_A(ep->modify_time, t); - SET16_A(ep->modify_date, d); - break; - } -} - -void exfat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, +static void exfat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, u8 mode) { u16 t, d; @@ -1236,24 +971,46 @@ void exfat_set_entry_time(struct dentry_t *p_entry, struct timestamp_t *tp, } } -s32 fat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, s32 entry, - u32 type, u32 start_clu, u64 size) +static void init_file_entry(struct file_dentry_t *ep, u32 type) { - sector_t sector; - struct dos_dentry_t *dos_ep; + struct timestamp_t tm, *tp; - dos_ep = (struct dos_dentry_t *)get_entry_in_dir(sb, p_dir, entry, - §or); - if (!dos_ep) - return FFS_MEDIAERR; + exfat_set_entry_type((struct dentry_t *)ep, type); - init_dos_entry(dos_ep, type, start_clu); - buf_modify(sb, sector); - - return FFS_SUCCESS; + tp = tm_current(&tm); + exfat_set_entry_time((struct dentry_t *)ep, tp, TM_CREATE); + exfat_set_entry_time((struct dentry_t *)ep, tp, TM_MODIFY); + exfat_set_entry_time((struct dentry_t *)ep, tp, TM_ACCESS); + ep->create_time_ms = 0; + ep->modify_time_ms = 0; + ep->access_time_ms = 0; } -s32 exfat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, +static void init_strm_entry(struct strm_dentry_t *ep, u8 flags, u32 start_clu, u64 size) +{ + exfat_set_entry_type((struct dentry_t *)ep, TYPE_STREAM); + ep->flags = flags; + SET32_A(ep->start_clu, start_clu); + SET64_A(ep->valid_size, size); + SET64_A(ep->size, size); +} + +static void init_name_entry(struct name_dentry_t *ep, u16 *uniname) +{ + int i; + + exfat_set_entry_type((struct dentry_t *)ep, TYPE_EXTEND); + ep->flags = 0x0; + + for (i = 0; i < 30; i++, i++) { + SET16_A(ep->unicode_0_14 + i, *uniname); + if (*uniname == 0x0) + break; + uniname++; + } +} + +static s32 exfat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, s32 entry, u32 type, u32 start_clu, u64 size) { sector_t sector; @@ -1267,71 +1024,20 @@ s32 exfat_init_dir_entry(struct super_block *sb, struct chain_t *p_dir, file_ep = (struct file_dentry_t *)get_entry_in_dir(sb, p_dir, entry, §or); if (!file_ep) - return FFS_MEDIAERR; + return -ENOENT; strm_ep = (struct strm_dentry_t *)get_entry_in_dir(sb, p_dir, entry + 1, §or); if (!strm_ep) - return FFS_MEDIAERR; + return -ENOENT; init_file_entry(file_ep, type); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); init_strm_entry(strm_ep, flags, start_clu, size); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); - return FFS_SUCCESS; -} - -static s32 fat_init_ext_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 num_entries, - struct uni_name_t *p_uniname, - struct dos_name_t *p_dosname) -{ - int i; - sector_t sector; - u8 chksum; - u16 *uniname = p_uniname->name; - struct dos_dentry_t *dos_ep; - struct ext_dentry_t *ext_ep; - - dos_ep = (struct dos_dentry_t *)get_entry_in_dir(sb, p_dir, entry, - §or); - if (!dos_ep) - return FFS_MEDIAERR; - - dos_ep->lcase = p_dosname->name_case; - memcpy(dos_ep->name, p_dosname->name, DOS_NAME_LENGTH); - buf_modify(sb, sector); - - if ((--num_entries) > 0) { - chksum = calc_checksum_1byte((void *)dos_ep->name, - DOS_NAME_LENGTH, 0); - - for (i = 1; i < num_entries; i++) { - ext_ep = (struct ext_dentry_t *)get_entry_in_dir(sb, - p_dir, - entry - i, - §or); - if (!ext_ep) - return FFS_MEDIAERR; - - init_ext_entry(ext_ep, i, chksum, uniname); - buf_modify(sb, sector); - uniname += 13; - } - - ext_ep = (struct ext_dentry_t *)get_entry_in_dir(sb, p_dir, - entry - i, - §or); - if (!ext_ep) - return FFS_MEDIAERR; - - init_ext_entry(ext_ep, i + 0x40, chksum, uniname); - buf_modify(sb, sector); - } - - return FFS_SUCCESS; + return 0; } static s32 exfat_init_ext_entry(struct super_block *sb, struct chain_t *p_dir, @@ -1349,160 +1055,39 @@ static s32 exfat_init_ext_entry(struct super_block *sb, struct chain_t *p_dir, file_ep = (struct file_dentry_t *)get_entry_in_dir(sb, p_dir, entry, §or); if (!file_ep) - return FFS_MEDIAERR; + return -ENOENT; file_ep->num_ext = (u8)(num_entries - 1); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); strm_ep = (struct strm_dentry_t *)get_entry_in_dir(sb, p_dir, entry + 1, §or); if (!strm_ep) - return FFS_MEDIAERR; + return -ENOENT; strm_ep->name_len = p_uniname->name_len; SET16_A(strm_ep->name_hash, p_uniname->name_hash); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); for (i = 2; i < num_entries; i++) { name_ep = (struct name_dentry_t *)get_entry_in_dir(sb, p_dir, entry + i, §or); if (!name_ep) - return FFS_MEDIAERR; + return -ENOENT; init_name_entry(name_ep, uniname); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); uniname += 15; } update_dir_checksum(sb, p_dir, entry); - return FFS_SUCCESS; + return 0; } -void init_dos_entry(struct dos_dentry_t *ep, u32 type, u32 start_clu) -{ - struct timestamp_t tm, *tp; - - fat_set_entry_type((struct dentry_t *)ep, type); - SET16_A(ep->start_clu_lo, CLUSTER_16(start_clu)); - SET16_A(ep->start_clu_hi, CLUSTER_16(start_clu >> 16)); - SET32_A(ep->size, 0); - - tp = tm_current(&tm); - fat_set_entry_time((struct dentry_t *)ep, tp, TM_CREATE); - fat_set_entry_time((struct dentry_t *)ep, tp, TM_MODIFY); - SET16_A(ep->access_date, 0); - ep->create_time_ms = 0; -} - -void init_ext_entry(struct ext_dentry_t *ep, s32 order, u8 chksum, u16 *uniname) -{ - int i; - bool end = false; - - fat_set_entry_type((struct dentry_t *)ep, TYPE_EXTEND); - ep->order = (u8)order; - ep->sysid = 0; - ep->checksum = chksum; - SET16_A(ep->start_clu, 0); - - for (i = 0; i < 10; i += 2) { - if (!end) { - SET16(ep->unicode_0_4 + i, *uniname); - if (*uniname == 0x0) - end = true; - else - uniname++; - } else { - SET16(ep->unicode_0_4 + i, 0xFFFF); - } - } - - for (i = 0; i < 12; i += 2) { - if (!end) { - SET16_A(ep->unicode_5_10 + i, *uniname); - if (*uniname == 0x0) - end = true; - else - uniname++; - } else { - SET16_A(ep->unicode_5_10 + i, 0xFFFF); - } - } - - for (i = 0; i < 4; i += 2) { - if (!end) { - SET16_A(ep->unicode_11_12 + i, *uniname); - if (*uniname == 0x0) - end = true; - else - uniname++; - } else { - SET16_A(ep->unicode_11_12 + i, 0xFFFF); - } - } -} - -void init_file_entry(struct file_dentry_t *ep, u32 type) -{ - struct timestamp_t tm, *tp; - - exfat_set_entry_type((struct dentry_t *)ep, type); - - tp = tm_current(&tm); - exfat_set_entry_time((struct dentry_t *)ep, tp, TM_CREATE); - exfat_set_entry_time((struct dentry_t *)ep, tp, TM_MODIFY); - exfat_set_entry_time((struct dentry_t *)ep, tp, TM_ACCESS); - ep->create_time_ms = 0; - ep->modify_time_ms = 0; - ep->access_time_ms = 0; -} - -void init_strm_entry(struct strm_dentry_t *ep, u8 flags, u32 start_clu, u64 size) -{ - exfat_set_entry_type((struct dentry_t *)ep, TYPE_STREAM); - ep->flags = flags; - SET32_A(ep->start_clu, start_clu); - SET64_A(ep->valid_size, size); - SET64_A(ep->size, size); -} - -void init_name_entry(struct name_dentry_t *ep, u16 *uniname) -{ - int i; - - exfat_set_entry_type((struct dentry_t *)ep, TYPE_EXTEND); - ep->flags = 0x0; - - for (i = 0; i < 30; i++, i++) { - SET16_A(ep->unicode_0_14 + i, *uniname); - if (*uniname == 0x0) - break; - uniname++; - } -} - -void fat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 order, s32 num_entries) -{ - int i; - sector_t sector; - struct dentry_t *ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - for (i = num_entries - 1; i >= order; i--) { - ep = get_entry_in_dir(sb, p_dir, entry - i, §or); - if (!ep) - return; - - p_fs->fs_func->set_entry_type(ep, TYPE_DELETED); - buf_modify(sb, sector); - } -} - -void exfat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, - s32 entry, s32 order, s32 num_entries) +static void exfat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, + s32 entry, s32 order, s32 num_entries) { int i; sector_t sector; @@ -1515,7 +1100,7 @@ void exfat_delete_dir_entry(struct super_block *sb, struct chain_t *p_dir, return; p_fs->fs_func->set_entry_type(ep, TYPE_DELETED); - buf_modify(sb, sector); + exfat_buf_modify(sb, sector); } } @@ -1533,7 +1118,7 @@ void update_dir_checksum(struct super_block *sb, struct chain_t *p_dir, if (!file_ep) return; - buf_lock(sb, sector); + exfat_buf_lock(sb, sector); num_entries = (s32)file_ep->num_ext + 1; chksum = calc_checksum_2byte((void *)file_ep, DENTRY_SIZE, 0, @@ -1542,7 +1127,7 @@ void update_dir_checksum(struct super_block *sb, struct chain_t *p_dir, for (i = 1; i < num_entries; i++) { ep = get_entry_in_dir(sb, p_dir, entry + i, NULL); if (!ep) { - buf_unlock(sb, sector); + exfat_buf_unlock(sb, sector); return; } @@ -1551,8 +1136,75 @@ void update_dir_checksum(struct super_block *sb, struct chain_t *p_dir, } SET16_A(file_ep->checksum, chksum); - buf_modify(sb, sector); - buf_unlock(sb, sector); + exfat_buf_modify(sb, sector); + exfat_buf_unlock(sb, sector); +} + +static s32 __write_partial_entries_in_entry_set(struct super_block *sb, + struct entry_set_cache_t *es, + sector_t sec, s32 off, u32 count) +{ + s32 num_entries, buf_off = (off - es->offset); + u32 remaining_byte_in_sector, copy_entries; + struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); + u32 clu; + u8 *buf, *esbuf = (u8 *)&es->__buf; + + pr_debug("%s entered es %p sec %llu off %d count %d\n", + __func__, es, (unsigned long long)sec, off, count); + num_entries = count; + + while (num_entries) { + /* white per sector base */ + remaining_byte_in_sector = (1 << p_bd->sector_size_bits) - off; + copy_entries = min_t(s32, + remaining_byte_in_sector >> DENTRY_SIZE_BITS, + num_entries); + buf = exfat_buf_getblk(sb, sec); + if (!buf) + goto err_out; + pr_debug("es->buf %p buf_off %u\n", esbuf, buf_off); + pr_debug("copying %d entries from %p to sector %llu\n", + copy_entries, (esbuf + buf_off), + (unsigned long long)sec); + memcpy(buf + off, esbuf + buf_off, + copy_entries << DENTRY_SIZE_BITS); + exfat_buf_modify(sb, sec); + num_entries -= copy_entries; + + if (num_entries) { + /* get next sector */ + if (IS_LAST_SECTOR_IN_CLUSTER(sec)) { + clu = GET_CLUSTER_FROM_SECTOR(sec); + if (es->alloc_flag == 0x03) { + clu++; + } else { + if (exfat_fat_read(sb, clu, &clu) == -1) + goto err_out; + } + sec = START_SECTOR(clu); + } else { + sec++; + } + off = 0; + buf_off += copy_entries << DENTRY_SIZE_BITS; + } + } + + pr_debug("%s exited successfully\n", __func__); + return 0; +err_out: + pr_debug("%s failed\n", __func__); + return -EINVAL; +} + +/* write back all entries in entry set */ +static s32 write_whole_entry_set(struct super_block *sb, struct entry_set_cache_t *es) +{ + return __write_partial_entries_in_entry_set(sb, es, es->sector, + es->offset, + es->num_entries); } void update_dir_checksum_with_entry_set(struct super_block *sb, @@ -1562,7 +1214,7 @@ void update_dir_checksum_with_entry_set(struct super_block *sb, u16 chksum = 0; s32 chksum_type = CS_DIR_ENTRY, i; - ep = (struct dentry_t *)&(es->__buf); + ep = (struct dentry_t *)&es->__buf; for (i = 0; i < es->num_entries; i++) { pr_debug("%s ep %p\n", __func__, ep); chksum = calc_checksum_2byte((void *)ep, DENTRY_SIZE, chksum, @@ -1571,7 +1223,7 @@ void update_dir_checksum_with_entry_set(struct super_block *sb, chksum_type = CS_DEFAULT; } - ep = (struct dentry_t *)&(es->__buf); + ep = (struct dentry_t *)&es->__buf; SET16_A(((struct file_dentry_t *)ep)->checksum, chksum); write_whole_entry_set(sb, es); } @@ -1590,18 +1242,18 @@ static s32 _walk_fat_chain(struct super_block *sb, struct chain_t *p_dir, cur_clu += clu_offset; } else { while (clu_offset > 0) { - if (FAT_read(sb, cur_clu, &cur_clu) == -1) - return FFS_MEDIAERR; + if (exfat_fat_read(sb, cur_clu, &cur_clu) == -1) + return -EIO; clu_offset--; } } if (clu) *clu = cur_clu; - return FFS_SUCCESS; + return 0; } -s32 find_location(struct super_block *sb, struct chain_t *p_dir, s32 entry, +static s32 find_location(struct super_block *sb, struct chain_t *p_dir, s32 entry, sector_t *sector, s32 *offset) { s32 off, ret; @@ -1617,7 +1269,7 @@ s32 find_location(struct super_block *sb, struct chain_t *p_dir, s32 entry, *sector += p_fs->root_start_sector; } else { ret = _walk_fat_chain(sb, p_dir, off, &clu); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; /* byte offset in cluster */ @@ -1630,20 +1282,7 @@ s32 find_location(struct super_block *sb, struct chain_t *p_dir, s32 entry, *sector = off >> p_bd->sector_size_bits; *sector += START_SECTOR(clu); } - return FFS_SUCCESS; -} - -struct dentry_t *get_entry_with_sector(struct super_block *sb, sector_t sector, - s32 offset) -{ - u8 *buf; - - buf = buf_getblk(sb, sector); - - if (!buf) - return NULL; - - return (struct dentry_t *)(buf + offset); + return 0; } struct dentry_t *get_entry_in_dir(struct super_block *sb, struct chain_t *p_dir, @@ -1653,10 +1292,10 @@ struct dentry_t *get_entry_in_dir(struct super_block *sb, struct chain_t *p_dir, sector_t sec; u8 *buf; - if (find_location(sb, p_dir, entry, &sec, &off) != FFS_SUCCESS) + if (find_location(sb, p_dir, entry, &sec, &off) != 0) return NULL; - buf = buf_getblk(sb, sec); + buf = exfat_buf_getblk(sb, sec); if (!buf) return NULL; @@ -1703,11 +1342,11 @@ struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, size_t bufsize; pr_debug("%s entered p_dir dir %u flags %x size %d\n", - __func__, p_dir->dir, p_dir->flags, p_dir->size); + __func__, p_dir->dir, p_dir->flags, p_dir->size); byte_offset = entry << DENTRY_SIZE_BITS; ret = _walk_fat_chain(sb, p_dir, byte_offset, &clu); - if (ret != FFS_SUCCESS) + if (ret != 0) return NULL; /* byte offset in cluster */ @@ -1720,15 +1359,14 @@ struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, sec = byte_offset >> p_bd->sector_size_bits; sec += START_SECTOR(clu); - buf = buf_getblk(sb, sec); + buf = exfat_buf_getblk(sb, sec); if (!buf) goto err_out; ep = (struct dentry_t *)(buf + off); entry_type = p_fs->fs_func->get_entry_type(ep); - if ((entry_type != TYPE_FILE) - && (entry_type != TYPE_DIR)) + if ((entry_type != TYPE_FILE) && (entry_type != TYPE_DIR)) goto err_out; if (type == ES_ALL_ENTRIES) @@ -1812,14 +1450,14 @@ struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, if (es->alloc_flag == 0x03) { clu++; } else { - if (FAT_read(sb, clu, &clu) == -1) + if (exfat_fat_read(sb, clu, &clu) == -1) goto err_out; } sec = START_SECTOR(clu); } else { sec++; } - buf = buf_getblk(sb, sec); + buf = exfat_buf_getblk(sb, sec); if (!buf) goto err_out; off = 0; @@ -1832,11 +1470,11 @@ struct entry_set_cache_t *get_entry_set_in_dir(struct super_block *sb, } if (file_ep) - *file_ep = (struct dentry_t *)&(es->__buf); + *file_ep = (struct dentry_t *)&es->__buf; pr_debug("%s exiting es %p sec %llu offset %d flags %d, num_entries %u buf ptr %p\n", - __func__, es, (unsigned long long)es->sector, es->offset, - es->alloc_flag, es->num_entries, &es->__buf); + __func__, es, (unsigned long long)es->sector, es->offset, + es->alloc_flag, es->num_entries, &es->__buf); return es; err_out: pr_debug("%s exited NULL (es %p)\n", __func__, es); @@ -1850,114 +1488,8 @@ void release_entry_set(struct entry_set_cache_t *es) kfree(es); } -static s32 __write_partial_entries_in_entry_set(struct super_block *sb, - struct entry_set_cache_t *es, - sector_t sec, s32 off, u32 count) -{ - s32 num_entries, buf_off = (off - es->offset); - u32 remaining_byte_in_sector, copy_entries; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - u32 clu; - u8 *buf, *esbuf = (u8 *)&(es->__buf); - - pr_debug("%s entered es %p sec %llu off %d count %d\n", - __func__, es, (unsigned long long)sec, off, count); - num_entries = count; - - while (num_entries) { - /* white per sector base */ - remaining_byte_in_sector = (1 << p_bd->sector_size_bits) - off; - copy_entries = min_t(s32, - remaining_byte_in_sector >> DENTRY_SIZE_BITS, - num_entries); - buf = buf_getblk(sb, sec); - if (!buf) - goto err_out; - pr_debug("es->buf %p buf_off %u\n", esbuf, buf_off); - pr_debug("copying %d entries from %p to sector %llu\n", - copy_entries, (esbuf + buf_off), - (unsigned long long)sec); - memcpy(buf + off, esbuf + buf_off, - copy_entries << DENTRY_SIZE_BITS); - buf_modify(sb, sec); - num_entries -= copy_entries; - - if (num_entries) { - /* get next sector */ - if (IS_LAST_SECTOR_IN_CLUSTER(sec)) { - clu = GET_CLUSTER_FROM_SECTOR(sec); - if (es->alloc_flag == 0x03) { - clu++; - } else { - if (FAT_read(sb, clu, &clu) == -1) - goto err_out; - } - sec = START_SECTOR(clu); - } else { - sec++; - } - off = 0; - buf_off += copy_entries << DENTRY_SIZE_BITS; - } - } - - pr_debug("%s exited successfully\n", __func__); - return FFS_SUCCESS; -err_out: - pr_debug("%s failed\n", __func__); - return FFS_ERROR; -} - -/* write back all entries in entry set */ -s32 write_whole_entry_set(struct super_block *sb, struct entry_set_cache_t *es) -{ - return __write_partial_entries_in_entry_set(sb, es, es->sector, - es->offset, - es->num_entries); -} - -/* write back some entries in entry set */ -s32 write_partial_entries_in_entry_set(struct super_block *sb, - struct entry_set_cache_t *es, struct dentry_t *ep, u32 count) -{ - s32 ret, byte_offset, off; - u32 clu = 0; - sector_t sec; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - struct chain_t dir; - - /* vaidity check */ - if (ep + count > ((struct dentry_t *)&(es->__buf)) + es->num_entries) - return FFS_ERROR; - - dir.dir = GET_CLUSTER_FROM_SECTOR(es->sector); - dir.flags = es->alloc_flag; - dir.size = 0xffffffff; /* XXX */ - - byte_offset = (es->sector - START_SECTOR(dir.dir)) << - p_bd->sector_size_bits; - byte_offset += ((void **)ep - &(es->__buf)) + es->offset; - - ret = _walk_fat_chain(sb, &dir, byte_offset, &clu); - if (ret != FFS_SUCCESS) - return ret; - - /* byte offset in cluster */ - byte_offset &= p_fs->cluster_size - 1; - - /* byte offset in sector */ - off = byte_offset & p_bd->sector_size_mask; - - /* sector offset in cluster */ - sec = byte_offset >> p_bd->sector_size_bits; - sec += START_SECTOR(clu); - return __write_partial_entries_in_entry_set(sb, es, sec, off, count); -} - /* search EMPTY CONTINUOUS "num_entries" entries */ -s32 search_deleted_or_unused_entry(struct super_block *sb, +static s32 search_deleted_or_unused_entry(struct super_block *sb, struct chain_t *p_dir, s32 num_entries) { int i, dentry, num_empty = 0; @@ -2043,7 +1575,7 @@ s32 search_deleted_or_unused_entry(struct super_block *sb, else clu.dir = CLUSTER_32(~0); } else { - if (FAT_read(sb, clu.dir, &clu.dir) != 0) + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) return -1; } } @@ -2051,7 +1583,7 @@ s32 search_deleted_or_unused_entry(struct super_block *sb, return -1; } -s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries) +static s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries) { s32 ret, dentry; u32 last_clu; @@ -2070,10 +1602,8 @@ s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries if (p_fs->dev_ejected) break; - if (p_fs->vol_type == EXFAT) { - if (p_dir->dir != p_fs->root_dir) - size = i_size_read(inode); - } + if (p_dir->dir != p_fs->root_dir) + size = i_size_read(inode); last_clu = find_last_cluster(sb, p_dir); clu.dir = last_clu + 1; @@ -2083,10 +1613,10 @@ s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries /* (1) allocate a cluster */ ret = p_fs->fs_func->alloc_cluster(sb, 1, &clu); if (ret < 1) - return -1; + return -EIO; - if (clear_cluster(sb, clu.dir) != FFS_SUCCESS) - return -1; + if (clear_cluster(sb, clu.dir) != 0) + return -EIO; /* (2) append to the FAT chain */ if (clu.flags != p_dir->flags) { @@ -2095,8 +1625,8 @@ s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries p_fs->hint_uentry.clu.flags = 0x01; } if (clu.flags == 0x01) - if (FAT_write(sb, last_clu, clu.dir) < 0) - return -1; + if (exfat_fat_write(sb, last_clu, clu.dir) < 0) + return -EIO; if (p_fs->hint_uentry.entry == -1) { p_fs->hint_uentry.dir = p_dir->dir; @@ -2110,21 +1640,19 @@ s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries p_dir->size++; /* (3) update the directory entry */ - if (p_fs->vol_type == EXFAT) { - if (p_dir->dir != p_fs->root_dir) { - size += p_fs->cluster_size; + if (p_dir->dir != p_fs->root_dir) { + size += p_fs->cluster_size; - ep = get_entry_in_dir(sb, &fid->dir, - fid->entry + 1, §or); - if (!ep) - return -1; - p_fs->fs_func->set_entry_size(ep, size); - p_fs->fs_func->set_entry_flag(ep, p_dir->flags); - buf_modify(sb, sector); + ep = get_entry_in_dir(sb, &fid->dir, + fid->entry + 1, §or); + if (!ep) + return -ENOENT; + p_fs->fs_func->set_entry_size(ep, size); + p_fs->fs_func->set_entry_flag(ep, p_dir->flags); + exfat_buf_modify(sb, sector); - update_dir_checksum(sb, &(fid->dir), - fid->entry); - } + update_dir_checksum(sb, &fid->dir, + fid->entry); } i_size_write(inode, i_size_read(inode) + p_fs->cluster_size); @@ -2137,102 +1665,21 @@ s32 find_empty_entry(struct inode *inode, struct chain_t *p_dir, s32 num_entries return dentry; } -/* return values of fat_find_dir_entry() - * >= 0 : return dir entiry position with the name in dir - * -1 : (root dir, ".") it is the root dir itself - * -2 : entry with the name does not exist - */ -s32 fat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, - struct uni_name_t *p_uniname, s32 num_entries, - struct dos_name_t *p_dosname, u32 type) +static s32 extract_uni_name_from_name_entry(struct name_dentry_t *ep, u16 *uniname, + s32 order) { - int i, dentry = 0, len; - s32 order = 0; - bool is_feasible_entry = true, has_ext_entry = false; - s32 dentries_per_clu; - u32 entry_type; - u16 entry_uniname[14], *uniname = NULL, unichar; - struct chain_t clu; - struct dentry_t *ep; - struct dos_dentry_t *dos_ep; - struct ext_dentry_t *ext_ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); + int i, len = 0; - if (p_dir->dir == p_fs->root_dir) { - if ((!nls_uniname_cmp(sb, p_uniname->name, - (u16 *)UNI_CUR_DIR_NAME)) || - (!nls_uniname_cmp(sb, p_uniname->name, - (u16 *)UNI_PAR_DIR_NAME))) - return -1; // special case, root directory itself + for (i = 0; i < 30; i += 2) { + *uniname = GET16_A(ep->unicode_0_14 + i); + if (*uniname == 0x0) + return len; + uniname++; + len++; } - if (p_dir->dir == CLUSTER_32(0)) /* FAT16 root_dir */ - dentries_per_clu = p_fs->dentries_in_root; - else - dentries_per_clu = p_fs->dentries_per_clu; - - clu.dir = p_dir->dir; - clu.flags = p_dir->flags; - - while (clu.dir != CLUSTER_32(~0)) { - if (p_fs->dev_ejected) - break; - - for (i = 0; i < dentries_per_clu; i++, dentry++) { - ep = get_entry_in_dir(sb, &clu, i, NULL); - if (!ep) - return -2; - - entry_type = p_fs->fs_func->get_entry_type(ep); - - if ((entry_type == TYPE_FILE) || (entry_type == TYPE_DIR)) { - if ((type == TYPE_ALL) || (type == entry_type)) { - if (is_feasible_entry && has_ext_entry) - return dentry; - - dos_ep = (struct dos_dentry_t *)ep; - if (!nls_dosname_cmp(sb, p_dosname->name, dos_ep->name)) - return dentry; - } - is_feasible_entry = true; - has_ext_entry = false; - } else if (entry_type == TYPE_EXTEND) { - if (is_feasible_entry) { - ext_ep = (struct ext_dentry_t *)ep; - if (ext_ep->order > 0x40) { - order = (s32)(ext_ep->order - 0x40); - uniname = p_uniname->name + 13 * (order - 1); - } else { - order = (s32)ext_ep->order; - uniname -= 13; - } - - len = extract_uni_name_from_ext_entry(ext_ep, entry_uniname, order); - - unichar = *(uniname + len); - *(uniname + len) = 0x0; - - if (nls_uniname_cmp(sb, uniname, entry_uniname)) - is_feasible_entry = false; - - *(uniname + len) = unichar; - } - has_ext_entry = true; - } else if (entry_type == TYPE_UNUSED) { - return -2; - } - is_feasible_entry = true; - has_ext_entry = false; - } - - if (p_dir->dir == CLUSTER_32(0)) - break; /* FAT16 root_dir */ - - if (FAT_read(sb, clu.dir, &clu.dir) != 0) - return -2; - } - - return -2; + *uniname = 0x0; + return len; } /* return values of exfat_find_dir_entry() @@ -2240,7 +1687,7 @@ s32 fat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, * -1 : (root dir, ".") it is the root dir itself * -2 : entry with the name does not exist */ -s32 exfat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, +static s32 exfat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, struct uni_name_t *p_uniname, s32 num_entries, struct dos_name_t *p_dosname, u32 type) { @@ -2375,7 +1822,7 @@ s32 exfat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, else clu.dir = CLUSTER_32(~0); } else { - if (FAT_read(sb, clu.dir, &clu.dir) != 0) + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) return -2; } } @@ -2383,37 +1830,7 @@ s32 exfat_find_dir_entry(struct super_block *sb, struct chain_t *p_dir, return -2; } -s32 fat_count_ext_entries(struct super_block *sb, struct chain_t *p_dir, - s32 entry, struct dentry_t *p_entry) -{ - s32 count = 0; - u8 chksum; - struct dos_dentry_t *dos_ep = (struct dos_dentry_t *)p_entry; - struct ext_dentry_t *ext_ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - chksum = calc_checksum_1byte((void *)dos_ep->name, DOS_NAME_LENGTH, 0); - - for (entry--; entry >= 0; entry--) { - ext_ep = (struct ext_dentry_t *)get_entry_in_dir(sb, p_dir, - entry, NULL); - if (!ext_ep) - return -1; - - if ((p_fs->fs_func->get_entry_type((struct dentry_t *)ext_ep) == - TYPE_EXTEND) && (ext_ep->checksum == chksum)) { - count++; - if (ext_ep->order > 0x40) - return count; - } else { - return count; - } - } - - return count; -} - -s32 exfat_count_ext_entries(struct super_block *sb, struct chain_t *p_dir, +static s32 exfat_count_ext_entries(struct super_block *sb, struct chain_t *p_dir, s32 entry, struct dentry_t *p_entry) { int i, count = 0; @@ -2463,7 +1880,7 @@ s32 count_dos_name_entries(struct super_block *sb, struct chain_t *p_dir, for (i = 0; i < dentries_per_clu; i++) { ep = get_entry_in_dir(sb, &clu, i, NULL); if (!ep) - return -1; + return -ENOENT; entry_type = p_fs->fs_func->get_entry_type(ep); @@ -2486,8 +1903,8 @@ s32 count_dos_name_entries(struct super_block *sb, struct chain_t *p_dir, else clu.dir = CLUSTER_32(~0); } else { - if (FAT_read(sb, clu.dir, &clu.dir) != 0) - return -1; + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) + return -EIO; } } @@ -2546,7 +1963,7 @@ bool is_dir_empty(struct super_block *sb, struct chain_t *p_dir) else clu.dir = CLUSTER_32(~0); } - if (FAT_read(sb, clu.dir, &clu.dir) != 0) + if (exfat_fat_read(sb, clu.dir, &clu.dir) != 0) break; } @@ -2564,84 +1981,19 @@ s32 get_num_entries_and_dos_name(struct super_block *sb, struct chain_t *p_dir, struct uni_name_t *p_uniname, s32 *entries, struct dos_name_t *p_dosname) { - s32 ret, num_entries; - bool lossy = false; - char **r; + s32 num_entries; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); num_entries = p_fs->fs_func->calc_num_entries(p_uniname); if (num_entries == 0) - return FFS_INVALIDPATH; - - if (p_fs->vol_type != EXFAT) { - nls_uniname_to_dosname(sb, p_dosname, p_uniname, &lossy); - - if (lossy) { - ret = fat_generate_dos_name(sb, p_dir, p_dosname); - if (ret) - return ret; - } else { - for (r = reserved_names; *r; r++) { - if (!strncmp((void *)p_dosname->name, *r, 8)) - return FFS_INVALIDPATH; - } - - if (p_dosname->name_case != 0xFF) - num_entries = 1; - } - - if (num_entries > 1) - p_dosname->name_case = 0x0; - } + return -EINVAL; *entries = num_entries; - return FFS_SUCCESS; + return 0; } -void get_uni_name_from_dos_entry(struct super_block *sb, - struct dos_dentry_t *ep, - struct uni_name_t *p_uniname, u8 mode) -{ - struct dos_name_t dos_name; - - if (mode == 0x0) - dos_name.name_case = 0x0; - else - dos_name.name_case = ep->lcase; - - memcpy(dos_name.name, ep->name, DOS_NAME_LENGTH); - nls_dosname_to_uniname(sb, p_uniname, &dos_name); -} - -void fat_get_uni_name_from_ext_entry(struct super_block *sb, - struct chain_t *p_dir, s32 entry, - u16 *uniname) -{ - int i; - struct ext_dentry_t *ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - for (entry--, i = 1; entry >= 0; entry--, i++) { - ep = (struct ext_dentry_t *)get_entry_in_dir(sb, p_dir, entry, - NULL); - if (!ep) - return; - - if (p_fs->fs_func->get_entry_type((struct dentry_t *)ep) == - TYPE_EXTEND) { - extract_uni_name_from_ext_entry(ep, uniname, i); - if (ep->order > 0x40) - return; - } else { - return; - } - - uniname += 13; - } -} - -void exfat_get_uni_name_from_ext_entry(struct super_block *sb, +static void exfat_get_uni_name_from_ext_entry(struct super_block *sb, struct chain_t *p_dir, s32 entry, u16 *uniname) { @@ -2678,203 +2030,7 @@ out: release_entry_set(es); } -s32 extract_uni_name_from_ext_entry(struct ext_dentry_t *ep, u16 *uniname, - s32 order) -{ - int i, len = 0; - - for (i = 0; i < 10; i += 2) { - *uniname = GET16(ep->unicode_0_4 + i); - if (*uniname == 0x0) - return len; - uniname++; - len++; - } - - if (order < 20) { - for (i = 0; i < 12; i += 2) { - *uniname = GET16_A(ep->unicode_5_10 + i); - if (*uniname == 0x0) - return len; - uniname++; - len++; - } - } else { - for (i = 0; i < 8; i += 2) { - *uniname = GET16_A(ep->unicode_5_10 + i); - if (*uniname == 0x0) - return len; - uniname++; - len++; - } - *uniname = 0x0; /* uniname[MAX_NAME_LENGTH-1] */ - return len; - } - - for (i = 0; i < 4; i += 2) { - *uniname = GET16_A(ep->unicode_11_12 + i); - if (*uniname == 0x0) - return len; - uniname++; - len++; - } - - *uniname = 0x0; - return len; -} - -s32 extract_uni_name_from_name_entry(struct name_dentry_t *ep, u16 *uniname, - s32 order) -{ - int i, len = 0; - - for (i = 0; i < 30; i += 2) { - *uniname = GET16_A(ep->unicode_0_14 + i); - if (*uniname == 0x0) - return len; - uniname++; - len++; - } - - *uniname = 0x0; - return len; -} - -s32 fat_generate_dos_name(struct super_block *sb, struct chain_t *p_dir, - struct dos_name_t *p_dosname) -{ - int i, j, count = 0; - bool count_begin = false; - s32 dentries_per_clu; - u32 type; - u8 bmap[128/* 1 ~ 1023 */]; - struct chain_t clu; - struct dos_dentry_t *ep; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - - memset(bmap, 0, sizeof(bmap)); - exfat_bitmap_set(bmap, 0); - - if (p_dir->dir == CLUSTER_32(0)) /* FAT16 root_dir */ - dentries_per_clu = p_fs->dentries_in_root; - else - dentries_per_clu = p_fs->dentries_per_clu; - - clu.dir = p_dir->dir; - clu.flags = p_dir->flags; - - while (clu.dir != CLUSTER_32(~0)) { - if (p_fs->dev_ejected) - break; - - for (i = 0; i < dentries_per_clu; i++) { - ep = (struct dos_dentry_t *)get_entry_in_dir(sb, &clu, - i, NULL); - if (!ep) - return FFS_MEDIAERR; - - type = p_fs->fs_func->get_entry_type((struct dentry_t *) - ep); - - if (type == TYPE_UNUSED) - break; - if ((type != TYPE_FILE) && (type != TYPE_DIR)) - continue; - - count = 0; - count_begin = false; - - for (j = 0; j < 8; j++) { - if (ep->name[j] == ' ') - break; - - if (ep->name[j] == '~') { - count_begin = true; - } else if (count_begin) { - if ((ep->name[j] >= '0') && - (ep->name[j] <= '9')) { - count = count * 10 + - (ep->name[j] - '0'); - } else { - count = 0; - count_begin = false; - } - } - } - - if ((count > 0) && (count < 1024)) - exfat_bitmap_set(bmap, count); - } - - if (p_dir->dir == CLUSTER_32(0)) - break; /* FAT16 root_dir */ - - if (FAT_read(sb, clu.dir, &clu.dir) != 0) - return FFS_MEDIAERR; - } - - count = 0; - for (i = 0; i < 128; i++) { - if (bmap[i] != 0xFF) { - for (j = 0; j < 8; j++) { - if (exfat_bitmap_test(&bmap[i], j) == 0) { - count = (i << 3) + j; - break; - } - } - if (count != 0) - break; - } - } - - if ((count == 0) || (count >= 1024)) - return FFS_FILEEXIST; - fat_attach_count_to_dos_name(p_dosname->name, count); - - /* Now dos_name has DOS~????.EXT */ - return FFS_SUCCESS; -} - -void fat_attach_count_to_dos_name(u8 *dosname, s32 count) -{ - int i, j, length; - char str_count[6]; - - snprintf(str_count, sizeof(str_count), "~%d", count); - length = strlen(str_count); - - i = 0; - j = 0; - while (j <= (8 - length)) { - i = j; - if (dosname[j] == ' ') - break; - if (dosname[j] & 0x80) - j += 2; - else - j++; - } - - for (j = 0; j < length; i++, j++) - dosname[i] = (u8)str_count[j]; - - if (i == 7) - dosname[7] = ' '; -} - -s32 fat_calc_num_entries(struct uni_name_t *p_uniname) -{ - s32 len; - - len = p_uniname->name_len; - if (len == 0) - return 0; - - /* 1 dos name entry + extended entries */ - return (len - 1) / 13 + 2; -} - -s32 exfat_calc_num_entries(struct uni_name_t *p_uniname) +static s32 exfat_calc_num_entries(struct uni_name_t *p_uniname) { s32 len; @@ -2886,17 +2042,6 @@ s32 exfat_calc_num_entries(struct uni_name_t *p_uniname) return (len - 1) / 15 + 3; } -u8 calc_checksum_1byte(void *data, s32 len, u8 chksum) -{ - int i; - u8 *c = (u8 *)data; - - for (i = 0; i < len; i++, c++) - chksum = (((chksum & 1) << 7) | ((chksum & 0xFE) >> 1)) + *c; - - return chksum; -} - u16 calc_checksum_2byte(void *data, s32 len, u16 chksum, s32 type) { int i; @@ -2921,30 +2066,6 @@ u16 calc_checksum_2byte(void *data, s32 len, u16 chksum, s32 type) return chksum; } -u32 calc_checksum_4byte(void *data, s32 len, u32 chksum, s32 type) -{ - int i; - u8 *c = (u8 *)data; - - switch (type) { - case CS_PBR_SECTOR: - for (i = 0; i < len; i++, c++) { - if ((i == 106) || (i == 107) || (i == 112)) - continue; - chksum = (((chksum & 1) << 31) | - ((chksum & 0xFFFFFFFE) >> 1)) + (u32)*c; - } - break; - default - : - for (i = 0; i < len; i++, c++) - chksum = (((chksum & 1) << 31) | - ((chksum & 0xFFFFFFFE) >> 1)) + (u32)*c; - } - - return chksum; -} - /* * Name Resolution Functions */ @@ -2962,11 +2083,11 @@ s32 resolve_path(struct inode *inode, char *path, struct chain_t *p_dir, struct file_id_t *fid = &(EXFAT_I(inode)->fid); if (strscpy(name_buf, path, sizeof(name_buf)) < 0) - return FFS_INVALIDPATH; + return -EINVAL; nls_cstring_to_uniname(sb, p_uniname, name_buf, &lossy); if (lossy) - return FFS_INVALIDPATH; + return -EINVAL; fid->size = i_size_read(inode); @@ -2974,154 +2095,12 @@ s32 resolve_path(struct inode *inode, char *path, struct chain_t *p_dir, p_dir->size = (s32)(fid->size >> p_fs->cluster_size_bits); p_dir->flags = fid->flags; - return FFS_SUCCESS; + return 0; } /* * File Operation Functions */ -static struct fs_func fat_fs_func = { - .alloc_cluster = fat_alloc_cluster, - .free_cluster = fat_free_cluster, - .count_used_clusters = fat_count_used_clusters, - - .init_dir_entry = fat_init_dir_entry, - .init_ext_entry = fat_init_ext_entry, - .find_dir_entry = fat_find_dir_entry, - .delete_dir_entry = fat_delete_dir_entry, - .get_uni_name_from_ext_entry = fat_get_uni_name_from_ext_entry, - .count_ext_entries = fat_count_ext_entries, - .calc_num_entries = fat_calc_num_entries, - - .get_entry_type = fat_get_entry_type, - .set_entry_type = fat_set_entry_type, - .get_entry_attr = fat_get_entry_attr, - .set_entry_attr = fat_set_entry_attr, - .get_entry_flag = fat_get_entry_flag, - .set_entry_flag = fat_set_entry_flag, - .get_entry_clu0 = fat_get_entry_clu0, - .set_entry_clu0 = fat_set_entry_clu0, - .get_entry_size = fat_get_entry_size, - .set_entry_size = fat_set_entry_size, - .get_entry_time = fat_get_entry_time, - .set_entry_time = fat_set_entry_time, -}; - -s32 fat16_mount(struct super_block *sb, struct pbr_sector_t *p_pbr) -{ - s32 num_reserved, num_root_sectors; - struct bpb16_t *p_bpb = (struct bpb16_t *)p_pbr->bpb; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - - if (p_bpb->num_fats == 0) - return FFS_FORMATERR; - - num_root_sectors = GET16(p_bpb->num_root_entries) << DENTRY_SIZE_BITS; - num_root_sectors = ((num_root_sectors - 1) >> - p_bd->sector_size_bits) + 1; - - p_fs->sectors_per_clu = p_bpb->sectors_per_clu; - p_fs->sectors_per_clu_bits = ilog2(p_bpb->sectors_per_clu); - p_fs->cluster_size_bits = p_fs->sectors_per_clu_bits + - p_bd->sector_size_bits; - p_fs->cluster_size = 1 << p_fs->cluster_size_bits; - - p_fs->num_FAT_sectors = GET16(p_bpb->num_fat_sectors); - - p_fs->FAT1_start_sector = p_fs->PBR_sector + GET16(p_bpb->num_reserved); - if (p_bpb->num_fats == 1) - p_fs->FAT2_start_sector = p_fs->FAT1_start_sector; - else - p_fs->FAT2_start_sector = p_fs->FAT1_start_sector + - p_fs->num_FAT_sectors; - - p_fs->root_start_sector = p_fs->FAT2_start_sector + - p_fs->num_FAT_sectors; - p_fs->data_start_sector = p_fs->root_start_sector + num_root_sectors; - - p_fs->num_sectors = GET16(p_bpb->num_sectors); - if (p_fs->num_sectors == 0) - p_fs->num_sectors = GET32(p_bpb->num_huge_sectors); - - num_reserved = p_fs->data_start_sector - p_fs->PBR_sector; - p_fs->num_clusters = ((p_fs->num_sectors - num_reserved) >> - p_fs->sectors_per_clu_bits) + 2; - /* because the cluster index starts with 2 */ - - if (p_fs->num_clusters < FAT12_THRESHOLD) - p_fs->vol_type = FAT12; - else - p_fs->vol_type = FAT16; - p_fs->vol_id = GET32(p_bpb->vol_serial); - - p_fs->root_dir = 0; - p_fs->dentries_in_root = GET16(p_bpb->num_root_entries); - p_fs->dentries_per_clu = 1 << (p_fs->cluster_size_bits - - DENTRY_SIZE_BITS); - - p_fs->vol_flag = VOL_CLEAN; - p_fs->clu_srch_ptr = 2; - p_fs->used_clusters = UINT_MAX; - - p_fs->fs_func = &fat_fs_func; - - return FFS_SUCCESS; -} - -s32 fat32_mount(struct super_block *sb, struct pbr_sector_t *p_pbr) -{ - s32 num_reserved; - struct bpb32_t *p_bpb = (struct bpb32_t *)p_pbr->bpb; - struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); - - if (p_bpb->num_fats == 0) - return FFS_FORMATERR; - - p_fs->sectors_per_clu = p_bpb->sectors_per_clu; - p_fs->sectors_per_clu_bits = ilog2(p_bpb->sectors_per_clu); - p_fs->cluster_size_bits = p_fs->sectors_per_clu_bits + - p_bd->sector_size_bits; - p_fs->cluster_size = 1 << p_fs->cluster_size_bits; - - p_fs->num_FAT_sectors = GET32(p_bpb->num_fat32_sectors); - - p_fs->FAT1_start_sector = p_fs->PBR_sector + GET16(p_bpb->num_reserved); - if (p_bpb->num_fats == 1) - p_fs->FAT2_start_sector = p_fs->FAT1_start_sector; - else - p_fs->FAT2_start_sector = p_fs->FAT1_start_sector + - p_fs->num_FAT_sectors; - - p_fs->root_start_sector = p_fs->FAT2_start_sector + - p_fs->num_FAT_sectors; - p_fs->data_start_sector = p_fs->root_start_sector; - - p_fs->num_sectors = GET32(p_bpb->num_huge_sectors); - num_reserved = p_fs->data_start_sector - p_fs->PBR_sector; - - p_fs->num_clusters = ((p_fs->num_sectors - num_reserved) >> - p_fs->sectors_per_clu_bits) + 2; - /* because the cluster index starts with 2 */ - - p_fs->vol_type = FAT32; - p_fs->vol_id = GET32(p_bpb->vol_serial); - - p_fs->root_dir = GET32(p_bpb->root_cluster); - p_fs->dentries_in_root = 0; - p_fs->dentries_per_clu = 1 << (p_fs->cluster_size_bits - - DENTRY_SIZE_BITS); - - p_fs->vol_flag = VOL_CLEAN; - p_fs->clu_srch_ptr = 2; - p_fs->used_clusters = UINT_MAX; - - p_fs->fs_func = &fat_fs_func; - - return FFS_SUCCESS; -} - static struct fs_func exfat_fs_func = { .alloc_cluster = exfat_alloc_cluster, .free_cluster = exfat_free_cluster, @@ -3156,7 +2135,7 @@ s32 exfat_mount(struct super_block *sb, struct pbr_sector_t *p_pbr) struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); if (p_bpb->num_fats == 0) - return FFS_FORMATERR; + return -EFSCORRUPTED; p_fs->sectors_per_clu = 1 << p_bpb->sectors_per_clu_bits; p_fs->sectors_per_clu_bits = p_bpb->sectors_per_clu_bits; @@ -3194,7 +2173,7 @@ s32 exfat_mount(struct super_block *sb, struct pbr_sector_t *p_pbr) p_fs->fs_func = &exfat_fs_func; - return FFS_SUCCESS; + return 0; } s32 create_dir(struct inode *inode, struct chain_t *p_dir, @@ -3203,7 +2182,7 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir, s32 ret, dentry, num_entries; u64 size; struct chain_t clu; - struct dos_name_t dos_name, dot_name; + struct dos_name_t dos_name; struct super_block *sb = inode->i_sb; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); struct fs_func *fs_func = p_fs->fs_func; @@ -3216,7 +2195,7 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir, /* find_empty_entry must be called before alloc_cluster */ dentry = find_empty_entry(inode, p_dir, num_entries); if (dentry < 0) - return FFS_FULL; + return -ENOSPC; clu.dir = CLUSTER_32(~0); clu.size = 0; @@ -3225,64 +2204,26 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir, /* (1) allocate a cluster */ ret = fs_func->alloc_cluster(sb, 1, &clu); if (ret < 0) - return FFS_MEDIAERR; + return ret; else if (ret == 0) - return FFS_FULL; + return -ENOSPC; ret = clear_cluster(sb, clu.dir); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; - if (p_fs->vol_type == EXFAT) { - size = p_fs->cluster_size; - } else { - size = 0; - - /* initialize the . and .. entry - * Information for . points to itself - * Information for .. points to parent dir - */ - - dot_name.name_case = 0x0; - memcpy(dot_name.name, DOS_CUR_DIR_NAME, DOS_NAME_LENGTH); - - ret = fs_func->init_dir_entry(sb, &clu, 0, TYPE_DIR, clu.dir, - 0); - if (ret != FFS_SUCCESS) - return ret; - - ret = fs_func->init_ext_entry(sb, &clu, 0, 1, NULL, &dot_name); - if (ret != FFS_SUCCESS) - return ret; - - memcpy(dot_name.name, DOS_PAR_DIR_NAME, DOS_NAME_LENGTH); - - if (p_dir->dir == p_fs->root_dir) - ret = fs_func->init_dir_entry(sb, &clu, 1, TYPE_DIR, - CLUSTER_32(0), 0); - else - ret = fs_func->init_dir_entry(sb, &clu, 1, TYPE_DIR, - p_dir->dir, 0); - - if (ret != FFS_SUCCESS) - return ret; - - ret = p_fs->fs_func->init_ext_entry(sb, &clu, 1, 1, NULL, - &dot_name); - if (ret != FFS_SUCCESS) - return ret; - } + size = p_fs->cluster_size; /* (2) update the directory entry */ /* make sub-dir entry in parent directory */ ret = fs_func->init_dir_entry(sb, p_dir, dentry, TYPE_DIR, clu.dir, size); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; ret = fs_func->init_ext_entry(sb, p_dir, dentry, num_entries, p_uniname, &dos_name); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; fid->dir.dir = p_dir->dir; @@ -3299,7 +2240,7 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir, fid->rwoffset = 0; fid->hint_last_off = -1; - return FFS_SUCCESS; + return 0; } s32 create_file(struct inode *inode, struct chain_t *p_dir, @@ -3319,7 +2260,7 @@ s32 create_file(struct inode *inode, struct chain_t *p_dir, /* find_empty_entry must be called before alloc_cluster() */ dentry = find_empty_entry(inode, p_dir, num_entries); if (dentry < 0) - return FFS_FULL; + return -ENOSPC; /* (1) update the directory entry */ /* fill the dos name directory entry information of the created file. @@ -3327,12 +2268,12 @@ s32 create_file(struct inode *inode, struct chain_t *p_dir, */ ret = fs_func->init_dir_entry(sb, p_dir, dentry, TYPE_FILE | mode, CLUSTER_32(0), 0); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; ret = fs_func->init_ext_entry(sb, p_dir, dentry, num_entries, p_uniname, &dos_name); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; fid->dir.dir = p_dir->dir; @@ -3349,7 +2290,7 @@ s32 create_file(struct inode *inode, struct chain_t *p_dir, fid->rwoffset = 0; fid->hint_last_off = -1; - return FFS_SUCCESS; + return 0; } void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry) @@ -3365,17 +2306,17 @@ void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry) if (!ep) return; - buf_lock(sb, sector); + exfat_buf_lock(sb, sector); - /* buf_lock() before call count_ext_entries() */ + /* exfat_buf_lock() before call count_ext_entries() */ num_entries = fs_func->count_ext_entries(sb, p_dir, entry, ep); if (num_entries < 0) { - buf_unlock(sb, sector); + exfat_buf_unlock(sb, sector); return; } num_entries++; - buf_unlock(sb, sector); + exfat_buf_unlock(sb, sector); /* (1) update the directory entry */ fs_func->delete_dir_entry(sb, p_dir, entry, 0, num_entries); @@ -3394,37 +2335,37 @@ s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, epold = get_entry_in_dir(sb, p_dir, oldentry, §or_old); if (!epold) - return FFS_MEDIAERR; + return -ENOENT; - buf_lock(sb, sector_old); + exfat_buf_lock(sb, sector_old); - /* buf_lock() before call count_ext_entries() */ + /* exfat_buf_lock() before call count_ext_entries() */ num_old_entries = fs_func->count_ext_entries(sb, p_dir, oldentry, epold); if (num_old_entries < 0) { - buf_unlock(sb, sector_old); - return FFS_MEDIAERR; + exfat_buf_unlock(sb, sector_old); + return -ENOENT; } num_old_entries++; ret = get_num_entries_and_dos_name(sb, p_dir, p_uniname, &num_new_entries, &dos_name); if (ret) { - buf_unlock(sb, sector_old); + exfat_buf_unlock(sb, sector_old); return ret; } if (num_old_entries < num_new_entries) { newentry = find_empty_entry(inode, p_dir, num_new_entries); if (newentry < 0) { - buf_unlock(sb, sector_old); - return FFS_FULL; + exfat_buf_unlock(sb, sector_old); + return -ENOSPC; } epnew = get_entry_in_dir(sb, p_dir, newentry, §or_new); if (!epnew) { - buf_unlock(sb, sector_old); - return FFS_MEDIAERR; + exfat_buf_unlock(sb, sector_old); + return -ENOENT; } memcpy((void *)epnew, (void *)epold, DENTRY_SIZE); @@ -3434,30 +2375,28 @@ s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, ATTR_ARCHIVE); fid->attr |= ATTR_ARCHIVE; } - buf_modify(sb, sector_new); - buf_unlock(sb, sector_old); + exfat_buf_modify(sb, sector_new); + exfat_buf_unlock(sb, sector_old); - if (p_fs->vol_type == EXFAT) { - epold = get_entry_in_dir(sb, p_dir, oldentry + 1, - §or_old); - buf_lock(sb, sector_old); - epnew = get_entry_in_dir(sb, p_dir, newentry + 1, - §or_new); + epold = get_entry_in_dir(sb, p_dir, oldentry + 1, + §or_old); + exfat_buf_lock(sb, sector_old); + epnew = get_entry_in_dir(sb, p_dir, newentry + 1, + §or_new); - if (!epold || !epnew) { - buf_unlock(sb, sector_old); - return FFS_MEDIAERR; - } - - memcpy((void *)epnew, (void *)epold, DENTRY_SIZE); - buf_modify(sb, sector_new); - buf_unlock(sb, sector_old); + if (!epold || !epnew) { + exfat_buf_unlock(sb, sector_old); + return -ENOENT; } + memcpy((void *)epnew, (void *)epold, DENTRY_SIZE); + exfat_buf_modify(sb, sector_new); + exfat_buf_unlock(sb, sector_old); + ret = fs_func->init_ext_entry(sb, p_dir, newentry, num_new_entries, p_uniname, &dos_name); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; fs_func->delete_dir_entry(sb, p_dir, oldentry, 0, @@ -3470,20 +2409,20 @@ s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, ATTR_ARCHIVE); fid->attr |= ATTR_ARCHIVE; } - buf_modify(sb, sector_old); - buf_unlock(sb, sector_old); + exfat_buf_modify(sb, sector_old); + exfat_buf_unlock(sb, sector_old); ret = fs_func->init_ext_entry(sb, p_dir, oldentry, num_new_entries, p_uniname, &dos_name); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; fs_func->delete_dir_entry(sb, p_dir, oldentry, num_new_entries, num_old_entries); } - return FFS_SUCCESS; + return 0; } s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, @@ -3492,7 +2431,6 @@ s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, { s32 ret, newentry, num_new_entries, num_old_entries; sector_t sector_mov, sector_new; - struct chain_t clu; struct dos_name_t dos_name; struct dentry_t *epmov, *epnew; struct super_block *sb = inode->i_sb; @@ -3501,41 +2439,41 @@ s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, epmov = get_entry_in_dir(sb, p_olddir, oldentry, §or_mov); if (!epmov) - return FFS_MEDIAERR; + return -ENOENT; /* check if the source and target directory is the same */ if (fs_func->get_entry_type(epmov) == TYPE_DIR && fs_func->get_entry_clu0(epmov) == p_newdir->dir) - return FFS_INVALIDPATH; + return -EINVAL; - buf_lock(sb, sector_mov); + exfat_buf_lock(sb, sector_mov); - /* buf_lock() before call count_ext_entries() */ + /* exfat_buf_lock() before call count_ext_entries() */ num_old_entries = fs_func->count_ext_entries(sb, p_olddir, oldentry, epmov); if (num_old_entries < 0) { - buf_unlock(sb, sector_mov); - return FFS_MEDIAERR; + exfat_buf_unlock(sb, sector_mov); + return -ENOENT; } num_old_entries++; ret = get_num_entries_and_dos_name(sb, p_newdir, p_uniname, &num_new_entries, &dos_name); if (ret) { - buf_unlock(sb, sector_mov); + exfat_buf_unlock(sb, sector_mov); return ret; } newentry = find_empty_entry(inode, p_newdir, num_new_entries); if (newentry < 0) { - buf_unlock(sb, sector_mov); - return FFS_FULL; + exfat_buf_unlock(sb, sector_mov); + return -ENOSPC; } epnew = get_entry_in_dir(sb, p_newdir, newentry, §or_new); if (!epnew) { - buf_unlock(sb, sector_mov); - return FFS_MEDIAERR; + exfat_buf_unlock(sb, sector_mov); + return -ENOENT; } memcpy((void *)epnew, (void *)epmov, DENTRY_SIZE); @@ -3544,42 +2482,26 @@ s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, ATTR_ARCHIVE); fid->attr |= ATTR_ARCHIVE; } - buf_modify(sb, sector_new); - buf_unlock(sb, sector_mov); + exfat_buf_modify(sb, sector_new); + exfat_buf_unlock(sb, sector_mov); - if (p_fs->vol_type == EXFAT) { - epmov = get_entry_in_dir(sb, p_olddir, oldentry + 1, - §or_mov); - buf_lock(sb, sector_mov); - epnew = get_entry_in_dir(sb, p_newdir, newentry + 1, - §or_new); - if (!epmov || !epnew) { - buf_unlock(sb, sector_mov); - return FFS_MEDIAERR; - } - - memcpy((void *)epnew, (void *)epmov, DENTRY_SIZE); - buf_modify(sb, sector_new); - buf_unlock(sb, sector_mov); - } else if (fs_func->get_entry_type(epnew) == TYPE_DIR) { - /* change ".." pointer to new parent dir */ - clu.dir = fs_func->get_entry_clu0(epnew); - clu.flags = 0x01; - - epnew = get_entry_in_dir(sb, &clu, 1, §or_new); - if (!epnew) - return FFS_MEDIAERR; - - if (p_newdir->dir == p_fs->root_dir) - fs_func->set_entry_clu0(epnew, CLUSTER_32(0)); - else - fs_func->set_entry_clu0(epnew, p_newdir->dir); - buf_modify(sb, sector_new); + epmov = get_entry_in_dir(sb, p_olddir, oldentry + 1, + §or_mov); + exfat_buf_lock(sb, sector_mov); + epnew = get_entry_in_dir(sb, p_newdir, newentry + 1, + §or_new); + if (!epmov || !epnew) { + exfat_buf_unlock(sb, sector_mov); + return -ENOENT; } + memcpy((void *)epnew, (void *)epmov, DENTRY_SIZE); + exfat_buf_modify(sb, sector_new); + exfat_buf_unlock(sb, sector_mov); + ret = fs_func->init_ext_entry(sb, p_newdir, newentry, num_new_entries, p_uniname, &dos_name); - if (ret != FFS_SUCCESS) + if (ret != 0) return ret; fs_func->delete_dir_entry(sb, p_olddir, oldentry, 0, num_old_entries); @@ -3590,7 +2512,7 @@ s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, fid->entry = newentry; - return FFS_SUCCESS; + return 0; } /* @@ -3600,7 +2522,7 @@ s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, int sector_read(struct super_block *sb, sector_t sec, struct buffer_head **bh, bool read) { - s32 ret = FFS_MEDIAERR; + s32 ret = -EIO; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); if ((sec >= (p_fs->PBR_sector + p_fs->num_sectors)) && @@ -3612,8 +2534,8 @@ int sector_read(struct super_block *sb, sector_t sec, struct buffer_head **bh, } if (!p_fs->dev_ejected) { - ret = bdev_read(sb, sec, bh, 1, read); - if (ret != FFS_SUCCESS) + ret = exfat_bdev_read(sb, sec, bh, 1, read); + if (ret != 0) p_fs->dev_ejected = 1; } @@ -3623,7 +2545,7 @@ int sector_read(struct super_block *sb, sector_t sec, struct buffer_head **bh, int sector_write(struct super_block *sb, sector_t sec, struct buffer_head *bh, bool sync) { - s32 ret = FFS_MEDIAERR; + s32 ret = -EIO; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); if (sec >= (p_fs->PBR_sector + p_fs->num_sectors) && @@ -3641,8 +2563,8 @@ int sector_write(struct super_block *sb, sector_t sec, struct buffer_head *bh, } if (!p_fs->dev_ejected) { - ret = bdev_write(sb, sec, bh, 1, sync); - if (ret != FFS_SUCCESS) + ret = exfat_bdev_write(sb, sec, bh, 1, sync); + if (ret != 0) p_fs->dev_ejected = 1; } @@ -3652,7 +2574,7 @@ int sector_write(struct super_block *sb, sector_t sec, struct buffer_head *bh, int multi_sector_read(struct super_block *sb, sector_t sec, struct buffer_head **bh, s32 num_secs, bool read) { - s32 ret = FFS_MEDIAERR; + s32 ret = -EIO; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); if (((sec + num_secs) > (p_fs->PBR_sector + p_fs->num_sectors)) && @@ -3664,8 +2586,8 @@ int multi_sector_read(struct super_block *sb, sector_t sec, } if (!p_fs->dev_ejected) { - ret = bdev_read(sb, sec, bh, num_secs, read); - if (ret != FFS_SUCCESS) + ret = exfat_bdev_read(sb, sec, bh, num_secs, read); + if (ret != 0) p_fs->dev_ejected = 1; } @@ -3675,7 +2597,7 @@ int multi_sector_read(struct super_block *sb, sector_t sec, int multi_sector_write(struct super_block *sb, sector_t sec, struct buffer_head *bh, s32 num_secs, bool sync) { - s32 ret = FFS_MEDIAERR; + s32 ret = -EIO; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); if ((sec + num_secs) > (p_fs->PBR_sector + p_fs->num_sectors) && @@ -3692,8 +2614,8 @@ int multi_sector_write(struct super_block *sb, sector_t sec, } if (!p_fs->dev_ejected) { - ret = bdev_write(sb, sec, bh, num_secs, sync); - if (ret != FFS_SUCCESS) + ret = exfat_bdev_write(sb, sec, bh, num_secs, sync); + if (ret != 0) p_fs->dev_ejected = 1; } diff --git a/drivers/staging/exfat/exfat_nls.c b/drivers/staging/exfat/exfat_nls.c index a5c4b68925fb..91e8b0c4dce7 100644 --- a/drivers/staging/exfat/exfat_nls.c +++ b/drivers/staging/exfat/exfat_nls.c @@ -7,13 +7,6 @@ #include #include "exfat.h" -static u16 bad_dos_chars[] = { - /* + , ; = [ ] */ - 0x002B, 0x002C, 0x003B, 0x003D, 0x005B, 0x005D, - 0xFF0B, 0xFF0C, 0xFF1B, 0xFF1D, 0xFF3B, 0xFF3D, - 0 -}; - static u16 bad_uni_chars[] = { /* " * / : < > ? \ | */ 0x0022, 0x002A, 0x002F, 0x003A, @@ -96,11 +89,6 @@ static u16 *nls_wstrchr(u16 *str, u16 wchar) return NULL; } -int nls_dosname_cmp(struct super_block *sb, u8 *a, u8 *b) -{ - return strncmp(a, b, DOS_NAME_LENGTH); -} - int nls_uniname_cmp(struct super_block *sb, u16 *a, u16 *b) { int i; @@ -114,186 +102,6 @@ int nls_uniname_cmp(struct super_block *sb, u16 *a, u16 *b) return 0; } -void nls_uniname_to_dosname(struct super_block *sb, - struct dos_name_t *p_dosname, - struct uni_name_t *p_uniname, bool *p_lossy) -{ - int i, j, len; - bool lossy = false; - u8 buf[MAX_CHARSET_SIZE]; - u8 lower = 0, upper = 0; - u8 *dosname = p_dosname->name; - u16 *uniname = p_uniname->name; - u16 *p, *last_period; - struct nls_table *nls = EXFAT_SB(sb)->nls_disk; - - for (i = 0; i < DOS_NAME_LENGTH; i++) - *(dosname + i) = ' '; - - if (!nls_uniname_cmp(sb, uniname, (u16 *)UNI_CUR_DIR_NAME)) { - *(dosname) = '.'; - p_dosname->name_case = 0x0; - if (p_lossy) - *p_lossy = false; - return; - } - - if (!nls_uniname_cmp(sb, uniname, (u16 *)UNI_PAR_DIR_NAME)) { - *(dosname) = '.'; - *(dosname + 1) = '.'; - p_dosname->name_case = 0x0; - if (p_lossy) - *p_lossy = false; - return; - } - - /* search for the last embedded period */ - last_period = NULL; - for (p = uniname; *p; p++) { - if (*p == (u16)'.') - last_period = p; - } - - i = 0; - while (i < DOS_NAME_LENGTH) { - if (i == 8) { - if (!last_period) - break; - - if (uniname <= last_period) { - if (uniname < last_period) - lossy = true; - uniname = last_period + 1; - } - } - - if (*uniname == (u16)'\0') { - break; - } else if (*uniname == (u16)' ') { - lossy = true; - } else if (*uniname == (u16)'.') { - if (uniname < last_period) - lossy = true; - else - i = 8; - } else if (nls_wstrchr(bad_dos_chars, *uniname)) { - lossy = true; - *(dosname + i) = '_'; - i++; - } else { - len = convert_uni_to_ch(nls, buf, *uniname, &lossy); - - if (len > 1) { - if ((i >= 8) && ((i + len) > DOS_NAME_LENGTH)) - break; - - if ((i < 8) && ((i + len) > 8)) { - i = 8; - continue; - } - - lower = 0xFF; - - for (j = 0; j < len; j++, i++) - *(dosname + i) = *(buf + j); - } else { /* len == 1 */ - if ((*buf >= 'a') && (*buf <= 'z')) { - *(dosname + i) = *buf - ('a' - 'A'); - - if (i < 8) - lower |= 0x08; - else - lower |= 0x10; - } else if ((*buf >= 'A') && (*buf <= 'Z')) { - *(dosname + i) = *buf; - - if (i < 8) - upper |= 0x08; - else - upper |= 0x10; - } else { - *(dosname + i) = *buf; - } - i++; - } - } - - uniname++; - } - - if (*dosname == 0xE5) - *dosname = 0x05; - - if (*uniname != 0x0) - lossy = true; - - if (upper & lower) - p_dosname->name_case = 0xFF; - else - p_dosname->name_case = lower; - - if (p_lossy) - *p_lossy = lossy; -} - -void nls_dosname_to_uniname(struct super_block *sb, - struct uni_name_t *p_uniname, - struct dos_name_t *p_dosname) -{ - int i = 0, j, n = 0; - u8 buf[DOS_NAME_LENGTH + 2]; - u8 *dosname = p_dosname->name; - u16 *uniname = p_uniname->name; - struct nls_table *nls = EXFAT_SB(sb)->nls_disk; - - if (*dosname == 0x05) { - *buf = 0xE5; - i++; - n++; - } - - for (; i < 8; i++, n++) { - if (*(dosname + i) == ' ') - break; - - if ((*(dosname + i) >= 'A') && (*(dosname + i) <= 'Z') && - (p_dosname->name_case & 0x08)) - *(buf + n) = *(dosname + i) + ('a' - 'A'); - else - *(buf + n) = *(dosname + i); - } - if (*(dosname + 8) != ' ') { - *(buf + n) = '.'; - n++; - } - - for (i = 8; i < DOS_NAME_LENGTH; i++, n++) { - if (*(dosname + i) == ' ') - break; - - if ((*(dosname + i) >= 'A') && (*(dosname + i) <= 'Z') && - (p_dosname->name_case & 0x10)) - *(buf + n) = *(dosname + i) + ('a' - 'A'); - else - *(buf + n) = *(dosname + i); - } - *(buf + n) = '\0'; - - i = 0; - j = 0; - while (j < (MAX_NAME_LENGTH - 1)) { - if (*(buf + i) == '\0') - break; - - i += convert_ch_to_uni(nls, uniname, (buf + i), NULL); - - uniname++; - j++; - } - - *uniname = (u16)'\0'; -} - void nls_uniname_to_cstring(struct super_block *sb, u8 *p_cstring, struct uni_name_t *p_uniname) { diff --git a/drivers/staging/exfat/exfat_super.c b/drivers/staging/exfat/exfat_super.c index 3b2b0ceb7297..6e481908c59f 100644 --- a/drivers/staging/exfat/exfat_super.c +++ b/drivers/staging/exfat/exfat_super.c @@ -26,7 +26,7 @@ #include #include #include - +#include #include #include #include @@ -284,12 +284,12 @@ static const struct dentry_operations exfat_dentry_ops = { .d_compare = exfat_cmp, }; -static DEFINE_SEMAPHORE(z_sem); +static DEFINE_MUTEX(z_mutex); static inline void fs_sync(struct super_block *sb, bool do_sync) { if (do_sync) - bdev_sync(sb); + exfat_bdev_sync(sb); } /* @@ -353,26 +353,28 @@ static int ffsMountVol(struct super_block *sb) pr_info("[EXFAT] trying to mount...\n"); - down(&z_sem); + mutex_lock(&z_mutex); - buf_init(sb); + exfat_buf_init(sb); - sema_init(&p_fs->v_sem, 1); + mutex_init(&p_fs->v_mutex); p_fs->dev_ejected = 0; /* open the block device */ - bdev_open(sb); + exfat_bdev_open(sb); if (p_bd->sector_size < sb->s_blocksize) { - ret = FFS_MEDIAERR; + printk(KERN_INFO "EXFAT: mount failed - sector size %d less than blocksize %ld\n", + p_bd->sector_size, sb->s_blocksize); + ret = -EINVAL; goto out; } if (p_bd->sector_size > sb->s_blocksize) sb_set_blocksize(sb, p_bd->sector_size); /* read Sector 0 */ - if (sector_read(sb, 0, &tmp_bh, 1) != FFS_SUCCESS) { - ret = FFS_MEDIAERR; + if (sector_read(sb, 0, &tmp_bh, 1) != 0) { + ret = -EIO; goto out; } @@ -383,8 +385,8 @@ static int ffsMountVol(struct super_block *sb) /* check the validity of PBR */ if (GET16_A(p_pbr->signature) != PBR_SIGNATURE) { brelse(tmp_bh); - bdev_close(sb); - ret = FFS_FORMATERR; + exfat_bdev_close(sb); + ret = -EFSCORRUPTED; goto out; } @@ -394,16 +396,10 @@ static int ffsMountVol(struct super_block *sb) break; if (i < 53) { -#ifdef CONFIG_EXFAT_DONT_MOUNT_VFAT + /* Not sure how we'd get here, but complain if it does */ ret = -EINVAL; - printk(KERN_INFO "EXFAT: Attempted to mount VFAT filesystem\n"); + pr_info("EXFAT: Attempted to mount VFAT filesystem\n"); goto out; -#else - if (GET16(p_pbr->bpb + 11)) /* num_fat_sectors */ - ret = fat16_mount(sb, p_pbr); - else - ret = fat32_mount(sb, p_pbr); -#endif } else { ret = exfat_mount(sb, p_pbr); } @@ -411,38 +407,34 @@ static int ffsMountVol(struct super_block *sb) brelse(tmp_bh); if (ret) { - bdev_close(sb); + exfat_bdev_close(sb); goto out; } - if (p_fs->vol_type == EXFAT) { - ret = load_alloc_bitmap(sb); - if (ret) { - bdev_close(sb); - goto out; - } - ret = load_upcase_table(sb); - if (ret) { - free_alloc_bitmap(sb); - bdev_close(sb); - goto out; - } + ret = load_alloc_bitmap(sb); + if (ret) { + exfat_bdev_close(sb); + goto out; + } + ret = load_upcase_table(sb); + if (ret) { + free_alloc_bitmap(sb); + exfat_bdev_close(sb); + goto out; } if (p_fs->dev_ejected) { - if (p_fs->vol_type == EXFAT) { - free_upcase_table(sb); - free_alloc_bitmap(sb); - } - bdev_close(sb); - ret = FFS_MEDIAERR; + free_upcase_table(sb); + free_alloc_bitmap(sb); + exfat_bdev_close(sb); + ret = -EIO; goto out; } pr_info("[EXFAT] mounted successfully\n"); out: - up(&z_sem); + mutex_unlock(&z_mutex); return ret; } @@ -450,39 +442,37 @@ out: static int ffsUmountVol(struct super_block *sb) { struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - int err = FFS_SUCCESS; + int err = 0; pr_info("[EXFAT] trying to unmount...\n"); - down(&z_sem); + mutex_lock(&z_mutex); /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); - fs_sync(sb, false); + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); - if (p_fs->vol_type == EXFAT) { - free_upcase_table(sb); - free_alloc_bitmap(sb); - } + free_upcase_table(sb); + free_alloc_bitmap(sb); - FAT_release_all(sb); - buf_release_all(sb); + exfat_fat_release_all(sb); + exfat_buf_release_all(sb); /* close the block device */ - bdev_close(sb); + exfat_bdev_close(sb); if (p_fs->dev_ejected) { pr_info("[EXFAT] unmounted with media errors. Device is already ejected.\n"); - err = FFS_MEDIAERR; + err = -EIO; } - buf_shutdown(sb); + exfat_buf_shutdown(sb); /* release the lock for file system critical section */ - up(&p_fs->v_sem); - up(&z_sem); + mutex_unlock(&p_fs->v_mutex); + mutex_unlock(&z_mutex); pr_info("[EXFAT] unmounted successfully\n"); @@ -491,15 +481,15 @@ static int ffsUmountVol(struct super_block *sb) static int ffsGetVolInfo(struct super_block *sb, struct vol_info_t *info) { - int err = FFS_SUCCESS; + int err = 0; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); /* check the validity of pointer parameters */ if (!info) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); if (p_fs->used_clusters == UINT_MAX) p_fs->used_clusters = p_fs->fs_func->count_used_clusters(sb); @@ -511,31 +501,31 @@ static int ffsGetVolInfo(struct super_block *sb, struct vol_info_t *info) info->FreeClusters = info->NumClusters - info->UsedClusters; if (p_fs->dev_ejected) - err = FFS_MEDIAERR; + err = -EIO; /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return err; } static int ffsSyncVol(struct super_block *sb, bool do_sync) { - int err = FFS_SUCCESS; + int err = 0; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* synchronize the file system */ fs_sync(sb, do_sync); fs_set_vol_flags(sb, VOL_CLEAN); if (p_fs->dev_ejected) - err = FFS_MEDIAERR; + err = -EIO; /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return err; } @@ -559,10 +549,10 @@ static int ffsLookupFile(struct inode *inode, char *path, struct file_id_t *fid) /* check the validity of pointer parameters */ if (!fid || !path || (*path == '\0')) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check the validity of directory name in the given pathname */ ret = resolve_path(inode, path, &dir, &uni_name); @@ -578,7 +568,7 @@ static int ffsLookupFile(struct inode *inode, char *path, struct file_id_t *fid) dentry = p_fs->fs_func->find_dir_entry(sb, &dir, &uni_name, num_entries, &dos_name, TYPE_ALL); if (dentry < -1) { - ret = FFS_NOTFOUND; + ret = -ENOENT; goto out; } @@ -597,22 +587,13 @@ static int ffsLookupFile(struct inode *inode, char *path, struct file_id_t *fid) fid->size = 0; fid->start_clu = p_fs->root_dir; } else { - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &dir, dentry, - ES_2_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep + 1; - } else { - ep = get_entry_in_dir(sb, &dir, dentry, NULL); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep; + es = get_entry_set_in_dir(sb, &dir, dentry, + ES_2_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } + ep2 = ep + 1; fid->type = p_fs->fs_func->get_entry_type(ep); fid->rwoffset = 0; @@ -628,15 +609,14 @@ static int ffsLookupFile(struct inode *inode, char *path, struct file_id_t *fid) fid->start_clu = p_fs->fs_func->get_entry_clu0(ep2); } - if (p_fs->vol_type == EXFAT) - release_entry_set(es); + release_entry_set(es); } if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -648,14 +628,14 @@ static int ffsCreateFile(struct inode *inode, char *path, u8 mode, struct uni_name_t uni_name; struct super_block *sb = inode->i_sb; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); - int ret; + int ret = 0; /* check the validity of pointer parameters */ if (!fid || !path || (*path == '\0')) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check the validity of directory name in the given pathname */ ret = resolve_path(inode, path, &dir, &uni_name); @@ -667,17 +647,17 @@ static int ffsCreateFile(struct inode *inode, char *path, u8 mode, /* create a new file */ ret = create_file(inode, &dir, &uni_name, mode, fid); -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -697,18 +677,18 @@ static int ffsReadFile(struct inode *inode, struct file_id_t *fid, void *buffer, /* check the validity of the given file id */ if (!fid) - return FFS_INVALIDFID; + return -EINVAL; /* check the validity of pointer parameters */ if (!buffer) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check if the given file ID is opened */ if (fid->type != TYPE_FILE) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out; } @@ -721,7 +701,7 @@ static int ffsReadFile(struct inode *inode, struct file_id_t *fid, void *buffer, if (count == 0) { if (rcount) *rcount = 0; - ret = FFS_EOF; + ret = 0; goto out; } @@ -742,9 +722,11 @@ static int ffsReadFile(struct inode *inode, struct file_id_t *fid, void *buffer, } while (clu_offset > 0) { - /* clu = FAT_read(sb, clu); */ - if (FAT_read(sb, clu, &clu) == -1) - return FFS_MEDIAERR; + /* clu = exfat_fat_read(sb, clu); */ + if (exfat_fat_read(sb, clu, &clu) == -1) { + ret = -EIO; + goto out; + } clu_offset--; } @@ -772,13 +754,13 @@ static int ffsReadFile(struct inode *inode, struct file_id_t *fid, void *buffer, if ((offset == 0) && (oneblkread == p_bd->sector_size)) { if (sector_read(sb, LogSector, &tmp_bh, 1) != - FFS_SUCCESS) + 0) goto err_out; memcpy((char *)buffer + read_bytes, (char *)tmp_bh->b_data, (s32)oneblkread); } else { if (sector_read(sb, LogSector, &tmp_bh, 1) != - FFS_SUCCESS) + 0) goto err_out; memcpy((char *)buffer + read_bytes, (char *)tmp_bh->b_data + offset, @@ -797,11 +779,11 @@ err_out: *rcount = read_bytes; if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -814,7 +796,7 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, s32 num_clusters, num_alloc, num_alloced = (s32)~0; int ret = 0; u32 clu, last_clu; - sector_t LogSector, sector = 0; + sector_t LogSector; u64 oneblkwrite, write_bytes; struct chain_t new_clu; struct timestamp_t tm; @@ -827,18 +809,18 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, /* check the validity of the given file id */ if (!fid) - return FFS_INVALIDFID; + return -EINVAL; /* check the validity of pointer parameters */ if (!buffer) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check if the given file ID is opened */ if (fid->type != TYPE_FILE) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out; } @@ -848,7 +830,7 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, if (count == 0) { if (wcount) *wcount = 0; - ret = FFS_SUCCESS; + ret = 0; goto out; } @@ -864,7 +846,8 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, while (count > 0) { clu_offset = (s32)(fid->rwoffset >> p_fs->cluster_size_bits); - clu = last_clu = fid->start_clu; + clu = fid->start_clu; + last_clu = fid->start_clu; if (fid->flags == 0x03) { if ((clu_offset > 0) && (clu != CLUSTER_32(~0))) { @@ -885,9 +868,9 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, while ((clu_offset > 0) && (clu != CLUSTER_32(~0))) { last_clu = clu; - /* clu = FAT_read(sb, clu); */ - if (FAT_read(sb, clu, &clu) == -1) { - ret = FFS_MEDIAERR; + /* clu = exfat_fat_read(sb, clu); */ + if (exfat_fat_read(sb, clu, &clu) == -1) { + ret = -EIO; goto out; } clu_offset--; @@ -909,7 +892,7 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, if (num_alloced == 0) break; if (num_alloced < 0) { - ret = FFS_MEDIAERR; + ret = num_alloced; goto out; } @@ -928,7 +911,7 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, modified = true; } if (new_clu.flags == 0x01) - FAT_write(sb, last_clu, new_clu.dir); + exfat_fat_write(sb, last_clu, new_clu.dir); } num_clusters += num_alloced; @@ -957,12 +940,12 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, if ((offset == 0) && (oneblkwrite == p_bd->sector_size)) { if (sector_read(sb, LogSector, &tmp_bh, 0) != - FFS_SUCCESS) + 0) goto err_out; memcpy((char *)tmp_bh->b_data, (char *)buffer + write_bytes, (s32)oneblkwrite); if (sector_write(sb, LogSector, tmp_bh, 0) != - FFS_SUCCESS) { + 0) { brelse(tmp_bh); goto err_out; } @@ -970,18 +953,18 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, if ((offset > 0) || ((fid->rwoffset + oneblkwrite) < fid->size)) { if (sector_read(sb, LogSector, &tmp_bh, 1) != - FFS_SUCCESS) + 0) goto err_out; } else { if (sector_read(sb, LogSector, &tmp_bh, 0) != - FFS_SUCCESS) + 0) goto err_out; } memcpy((char *)tmp_bh->b_data + offset, (char *)buffer + write_bytes, (s32)oneblkwrite); if (sector_write(sb, LogSector, tmp_bh, 0) != - FFS_SUCCESS) { + 0) { brelse(tmp_bh); goto err_out; } @@ -1002,25 +985,15 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, brelse(tmp_bh); /* (3) update the direcoty entry */ - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &(fid->dir), fid->entry, - ES_ALL_ENTRIES, &ep); - if (!es) - goto err_out; - ep2 = ep + 1; - } else { - ep = get_entry_in_dir(sb, &(fid->dir), fid->entry, §or); - if (!ep) - goto err_out; - ep2 = ep; - } + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_ALL_ENTRIES, &ep); + if (!es) + goto err_out; + ep2 = ep + 1; p_fs->fs_func->set_entry_time(ep, tm_current(&tm), TM_MODIFY); p_fs->fs_func->set_entry_attr(ep, fid->attr); - if (p_fs->vol_type != EXFAT) - buf_modify(sb, sector); - if (modified) { if (p_fs->fs_func->get_entry_flag(ep2) != fid->flags) p_fs->fs_func->set_entry_flag(ep2, fid->flags); @@ -1030,18 +1003,13 @@ static int ffsWriteFile(struct inode *inode, struct file_id_t *fid, if (p_fs->fs_func->get_entry_clu0(ep2) != fid->start_clu) p_fs->fs_func->set_entry_clu0(ep2, fid->start_clu); - - if (p_fs->vol_type != EXFAT) - buf_modify(sb, sector); } - if (p_fs->vol_type == EXFAT) { - update_dir_checksum_with_entry_set(sb, es); - release_entry_set(es); - } + update_dir_checksum_with_entry_set(sb, es); + release_entry_set(es); -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif @@ -1051,14 +1019,14 @@ err_out: *wcount = write_bytes; if (num_alloced == 0) - ret = FFS_FULL; + ret = -ENOSPC; else if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1068,7 +1036,6 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) s32 num_clusters; u32 last_clu = CLUSTER_32(0); int ret = 0; - sector_t sector = 0; struct chain_t clu; struct timestamp_t tm; struct dentry_t *ep, *ep2; @@ -1081,11 +1048,11 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) new_size); /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check if the given file ID is opened */ if (fid->type != TYPE_FILE) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out; } @@ -1095,7 +1062,7 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) } if (old_size <= new_size) { - ret = FFS_SUCCESS; + ret = 0; goto out; } @@ -1114,8 +1081,8 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) } else { while (num_clusters > 0) { last_clu = clu.dir; - if (FAT_read(sb, clu.dir, &clu.dir) == -1) { - ret = FFS_MEDIAERR; + if (exfat_fat_read(sb, clu.dir, &clu.dir) == -1) { + ret = -EIO; goto out; } num_clusters--; @@ -1133,22 +1100,13 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) } /* (1) update the directory entry */ - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, - ES_ALL_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep + 1; - } else { - ep = get_entry_in_dir(sb, &(fid->dir), fid->entry, §or); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_ALL_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } - ep2 = ep; - } + ep2 = ep + 1; p_fs->fs_func->set_entry_time(ep, tm_current(&tm), TM_MODIFY); p_fs->fs_func->set_entry_attr(ep, fid->attr); @@ -1159,17 +1117,13 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) p_fs->fs_func->set_entry_clu0(ep2, CLUSTER_32(0)); } - if (p_fs->vol_type != EXFAT) { - buf_modify(sb, sector); - } else { - update_dir_checksum_with_entry_set(sb, es); - release_entry_set(es); - } + update_dir_checksum_with_entry_set(sb, es); + release_entry_set(es); /* (2) cut off from the FAT chain */ if (last_clu != CLUSTER_32(0)) { if (fid->flags == 0x01) - FAT_write(sb, last_clu, CLUSTER_32(~0)); + exfat_fat_write(sb, last_clu, CLUSTER_32(~0)); } /* (3) free the clusters */ @@ -1180,18 +1134,18 @@ static int ffsTruncateFile(struct inode *inode, u64 old_size, u64 new_size) if (fid->rwoffset > fid->size) fid->rwoffset = fid->size; -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: pr_debug("%s exited (%d)\n", __func__, ret); /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1232,14 +1186,14 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, /* check the validity of the given file id */ if (!fid) - return FFS_INVALIDFID; + return -EINVAL; /* check the validity of pointer parameters */ if (!new_path || (*new_path == '\0')) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); update_parent_info(fid, old_parent_inode); @@ -1252,19 +1206,19 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, /* check if the old file is "." or ".." */ if (p_fs->vol_type != EXFAT) { if ((olddir.dir != p_fs->root_dir) && (dentry < 2)) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out2; } } ep = get_entry_in_dir(sb, &olddir, dentry, NULL); if (!ep) { - ret = FFS_MEDIAERR; + ret = -ENOENT; goto out2; } if (p_fs->fs_func->get_entry_attr(ep) & ATTR_READONLY) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out2; } @@ -1272,12 +1226,12 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, if (new_inode) { u32 entry_type; - ret = FFS_MEDIAERR; + ret = -ENOENT; new_fid = &EXFAT_I(new_inode)->fid; update_parent_info(new_fid, new_parent_inode); - p_dir = &(new_fid->dir); + p_dir = &new_fid->dir; new_entry = new_fid->entry; ep = get_entry_in_dir(sb, p_dir, new_entry, NULL); if (!ep) @@ -1294,7 +1248,7 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, new_clu.flags = new_fid->flags; if (!is_dir_empty(sb, &new_clu)) { - ret = FFS_FILEEXIST; + ret = -EEXIST; goto out; } } @@ -1314,7 +1268,7 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, ret = move_file(new_parent_inode, &olddir, dentry, &newdir, &uni_name, fid); - if ((ret == FFS_SUCCESS) && new_inode) { + if ((ret == 0) && new_inode) { /* delete entries of new_dir */ ep = get_entry_in_dir(sb, p_dir, new_entry, NULL); if (!ep) @@ -1328,16 +1282,16 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, num_entries + 1); } out: -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out2: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1345,7 +1299,7 @@ out2: static int ffsRemoveFile(struct inode *inode, struct file_id_t *fid) { s32 dentry; - int ret = FFS_SUCCESS; + int ret = 0; struct chain_t dir, clu_to_free; struct dentry_t *ep; struct super_block *sb = inode->i_sb; @@ -1353,10 +1307,10 @@ static int ffsRemoveFile(struct inode *inode, struct file_id_t *fid) /* check the validity of the given file id */ if (!fid) - return FFS_INVALIDFID; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); dir.dir = fid->dir.dir; dir.size = fid->dir.size; @@ -1366,12 +1320,12 @@ static int ffsRemoveFile(struct inode *inode, struct file_id_t *fid) ep = get_entry_in_dir(sb, &dir, dentry, NULL); if (!ep) { - ret = FFS_MEDIAERR; + ret = -ENOENT; goto out; } if (p_fs->fs_func->get_entry_attr(ep) & ATTR_READONLY) { - ret = FFS_PERMISSIONERR; + ret = -EPERM; goto out; } fs_set_vol_flags(sb, VOL_DIRTY); @@ -1390,16 +1344,16 @@ static int ffsRemoveFile(struct inode *inode, struct file_id_t *fid) fid->start_clu = CLUSTER_32(~0); fid->flags = (p_fs->vol_type == EXFAT) ? 0x03 : 0x01; -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1409,7 +1363,7 @@ out: static int ffsSetAttr(struct inode *inode, u32 attr) { u32 type; - int ret = FFS_SUCCESS; + int ret = 0; sector_t sector = 0; struct dentry_t *ep; struct super_block *sb = inode->i_sb; @@ -1420,36 +1374,28 @@ static int ffsSetAttr(struct inode *inode, u32 attr) if (fid->attr == attr) { if (p_fs->dev_ejected) - return FFS_MEDIAERR; - return FFS_SUCCESS; + return -EIO; + return 0; } if (is_dir) { if ((fid->dir.dir == p_fs->root_dir) && (fid->entry == -1)) { if (p_fs->dev_ejected) - return FFS_MEDIAERR; - return FFS_SUCCESS; + return -EIO; + return 0; } } /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* get the directory entry of given file */ - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &(fid->dir), fid->entry, - ES_ALL_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - } else { - ep = get_entry_in_dir(sb, &(fid->dir), fid->entry, §or); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_ALL_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } type = p_fs->fs_func->get_entry_type(ep); @@ -1457,12 +1403,11 @@ static int ffsSetAttr(struct inode *inode, u32 attr) if (((type == TYPE_FILE) && (attr & ATTR_SUBDIR)) || ((type == TYPE_DIR) && (!(attr & ATTR_SUBDIR)))) { if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; else - ret = FFS_ERROR; + ret = -EINVAL; - if (p_fs->vol_type == EXFAT) - release_entry_set(es); + release_entry_set(es); goto out; } @@ -1472,23 +1417,19 @@ static int ffsSetAttr(struct inode *inode, u32 attr) fid->attr = attr; p_fs->fs_func->set_entry_attr(ep, attr); - if (p_fs->vol_type != EXFAT) { - buf_modify(sb, sector); - } else { - update_dir_checksum_with_entry_set(sb, es); - release_entry_set(es); - } + update_dir_checksum_with_entry_set(sb, es); + release_entry_set(es); -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1496,9 +1437,8 @@ out: static int ffsReadStat(struct inode *inode, struct dir_entry_t *info) { - sector_t sector = 0; s32 count; - int ret = FFS_SUCCESS; + int ret = 0; struct chain_t dir; struct uni_name_t uni_name; struct timestamp_t tm; @@ -1512,7 +1452,7 @@ static int ffsReadStat(struct inode *inode, struct dir_entry_t *info) pr_debug("%s entered\n", __func__); /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); if (is_dir) { if ((fid->dir.dir == p_fs->root_dir) && @@ -1541,35 +1481,25 @@ static int ffsReadStat(struct inode *inode, struct dir_entry_t *info) count = count_dos_name_entries(sb, &dir, TYPE_DIR); if (count < 0) { - ret = FFS_MEDIAERR; + ret = count; /* propogate error upward */ goto out; } info->NumSubdirs = count; if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; goto out; } } /* get the directory entry of given file or directory */ - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &(fid->dir), fid->entry, - ES_2_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep + 1; - } else { - ep = get_entry_in_dir(sb, &(fid->dir), fid->entry, §or); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep; - buf_lock(sb, sector); + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_2_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } + ep2 = ep + 1; /* set FILE_INFO structure using the acquired struct dentry_t */ info->Attr = p_fs->fs_func->get_entry_attr(ep); @@ -1594,31 +1524,19 @@ static int ffsReadStat(struct inode *inode, struct dir_entry_t *info) memset((char *)&info->AccessTimestamp, 0, sizeof(struct date_time_t)); - *(uni_name.name) = 0x0; + *uni_name.name = 0x0; /* XXX this is very bad for exfat cuz name is already included in es. * API should be revised */ - p_fs->fs_func->get_uni_name_from_ext_entry(sb, &(fid->dir), fid->entry, + p_fs->fs_func->get_uni_name_from_ext_entry(sb, &fid->dir, fid->entry, uni_name.name); - if (*uni_name.name == 0x0 && p_fs->vol_type != EXFAT) - get_uni_name_from_dos_entry(sb, (struct dos_dentry_t *)ep, - &uni_name, 0x1); nls_uniname_to_cstring(sb, info->Name, &uni_name); - if (p_fs->vol_type == EXFAT) { - info->NumSubdirs = 2; - } else { - buf_unlock(sb, sector); - get_uni_name_from_dos_entry(sb, (struct dos_dentry_t *)ep, - &uni_name, 0x0); - nls_uniname_to_cstring(sb, info->ShortName, &uni_name); - info->NumSubdirs = 0; - } + info->NumSubdirs = 2; info->Size = p_fs->fs_func->get_entry_size(ep2); - if (p_fs->vol_type == EXFAT) - release_entry_set(es); + release_entry_set(es); if (is_dir) { dir.dir = fid->start_clu; @@ -1630,18 +1548,18 @@ static int ffsReadStat(struct inode *inode, struct dir_entry_t *info) count = count_dos_name_entries(sb, &dir, TYPE_DIR); if (count < 0) { - ret = FFS_MEDIAERR; + ret = count; /* propogate error upward */ goto out; } info->NumSubdirs += count; } if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); pr_debug("%s exited successfully\n", __func__); return ret; @@ -1649,8 +1567,7 @@ out: static int ffsWriteStat(struct inode *inode, struct dir_entry_t *info) { - sector_t sector = 0; - int ret = FFS_SUCCESS; + int ret = 0; struct timestamp_t tm; struct dentry_t *ep, *ep2; struct entry_set_cache_t *es = NULL; @@ -1662,14 +1579,14 @@ static int ffsWriteStat(struct inode *inode, struct dir_entry_t *info) pr_debug("%s entered (inode %p info %p\n", __func__, inode, info); /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); if (is_dir) { if ((fid->dir.dir == p_fs->root_dir) && (fid->entry == -1)) { if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; - ret = FFS_SUCCESS; + ret = -EIO; + ret = 0; goto out; } } @@ -1677,23 +1594,13 @@ static int ffsWriteStat(struct inode *inode, struct dir_entry_t *info) fs_set_vol_flags(sb, VOL_DIRTY); /* get the directory entry of given file or directory */ - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &(fid->dir), fid->entry, - ES_ALL_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep + 1; - } else { - /* for other than exfat */ - ep = get_entry_in_dir(sb, &(fid->dir), fid->entry, §or); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } - ep2 = ep; + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_ALL_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } + ep2 = ep + 1; p_fs->fs_func->set_entry_attr(ep, info->Attr); @@ -1716,19 +1623,15 @@ static int ffsWriteStat(struct inode *inode, struct dir_entry_t *info) p_fs->fs_func->set_entry_size(ep2, info->Size); - if (p_fs->vol_type != EXFAT) { - buf_modify(sb, sector); - } else { - update_dir_checksum_with_entry_set(sb, es); - release_entry_set(es); - } + update_dir_checksum_with_entry_set(sb, es); + release_entry_set(es); if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); pr_debug("%s exited (%d)\n", __func__, ret); @@ -1740,8 +1643,7 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) s32 num_clusters, num_alloced; bool modified = false; u32 last_clu; - int ret = FFS_SUCCESS; - sector_t sector = 0; + int ret = 0; struct chain_t new_clu; struct dentry_t *ep; struct entry_set_cache_t *es = NULL; @@ -1751,10 +1653,10 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) /* check the validity of pointer parameters */ if (!clu) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); fid->rwoffset = (s64)(clu_offset) << p_fs->cluster_size_bits; @@ -1785,8 +1687,8 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) while ((clu_offset > 0) && (*clu != CLUSTER_32(~0))) { last_clu = *clu; - if (FAT_read(sb, *clu, clu) == -1) { - ret = FFS_MEDIAERR; + if (exfat_fat_read(sb, *clu, clu) == -1) { + ret = -EIO; goto out; } clu_offset--; @@ -1804,10 +1706,10 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) /* (1) allocate a cluster */ num_alloced = p_fs->fs_func->alloc_cluster(sb, 1, &new_clu); if (num_alloced < 0) { - ret = FFS_MEDIAERR; + ret = -EIO; goto out; } else if (num_alloced == 0) { - ret = FFS_FULL; + ret = -ENOSPC; goto out; } @@ -1825,34 +1727,23 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) modified = true; } if (new_clu.flags == 0x01) - FAT_write(sb, last_clu, new_clu.dir); + exfat_fat_write(sb, last_clu, new_clu.dir); } num_clusters += num_alloced; *clu = new_clu.dir; - if (p_fs->vol_type == EXFAT) { - es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, - ES_ALL_ENTRIES, &ep); - if (!es) { - ret = FFS_MEDIAERR; - goto out; - } - /* get stream entry */ - ep++; + es = get_entry_set_in_dir(sb, &fid->dir, fid->entry, + ES_ALL_ENTRIES, &ep); + if (!es) { + ret = -ENOENT; + goto out; } + /* get stream entry */ + ep++; /* (3) update directory entry */ if (modified) { - if (p_fs->vol_type != EXFAT) { - ep = get_entry_in_dir(sb, &(fid->dir), - fid->entry, §or); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } - } - if (p_fs->fs_func->get_entry_flag(ep) != fid->flags) p_fs->fs_func->set_entry_flag(ep, fid->flags); @@ -1860,14 +1751,10 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) p_fs->fs_func->set_entry_clu0(ep, fid->start_clu); - if (p_fs->vol_type != EXFAT) - buf_modify(sb, sector); } - if (p_fs->vol_type == EXFAT) { - update_dir_checksum_with_entry_set(sb, es); - release_entry_set(es); - } + update_dir_checksum_with_entry_set(sb, es); + release_entry_set(es); /* add number of new blocks to inode */ inode->i_blocks += num_alloced << (p_fs->cluster_size_bits - 9); @@ -1878,11 +1765,11 @@ static int ffsMapCluster(struct inode *inode, s32 clu_offset, u32 *clu) fid->hint_last_clu = *clu; if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1893,7 +1780,7 @@ out: static int ffsCreateDir(struct inode *inode, char *path, struct file_id_t *fid) { - int ret = FFS_SUCCESS; + int ret = 0; struct chain_t dir; struct uni_name_t uni_name; struct super_block *sb = inode->i_sb; @@ -1903,10 +1790,10 @@ static int ffsCreateDir(struct inode *inode, char *path, struct file_id_t *fid) /* check the validity of pointer parameters */ if (!fid || !path || (*path == '\0')) - return FFS_ERROR; + return -EINVAL; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); /* check the validity of directory name in the given old pathname */ ret = resolve_path(inode, path, &dir, &uni_name); @@ -1917,16 +1804,16 @@ static int ffsCreateDir(struct inode *inode, char *path, struct file_id_t *fid) ret = create_dir(inode, &dir, &uni_name, fid); -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -1934,7 +1821,7 @@ out: static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) { int i, dentry, clu_offset; - int ret = FFS_SUCCESS; + int ret = 0; s32 dentries_per_clu, dentries_per_clu_bits = 0; u32 type; sector_t sector; @@ -1949,14 +1836,14 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) /* check the validity of pointer parameters */ if (!dir_entry) - return FFS_ERROR; + return -EINVAL; /* check if the given file ID is opened */ if (fid->type != TYPE_DIR) - return FFS_PERMISSIONERR; + return -ENOTDIR; /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); if (fid->entry == -1) { dir.dir = p_fs->root_dir; @@ -2001,9 +1888,9 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) } while (clu_offset > 0) { - /* clu.dir = FAT_read(sb, clu.dir); */ - if (FAT_read(sb, clu.dir, &clu.dir) == -1) { - ret = FFS_MEDIAERR; + /* clu.dir = exfat_fat_read(sb, clu.dir); */ + if (exfat_fat_read(sb, clu.dir, &clu.dir) == -1) { + ret = -EIO; goto out; } clu_offset--; @@ -2023,7 +1910,7 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) for ( ; i < dentries_per_clu; i++, dentry++) { ep = get_entry_in_dir(sb, &clu, i, §or); if (!ep) { - ret = FFS_MEDIAERR; + ret = -ENOENT; goto out; } type = fs_func->get_entry_type(ep); @@ -2034,7 +1921,7 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) if ((type != TYPE_FILE) && (type != TYPE_DIR)) continue; - buf_lock(sb, sector); + exfat_buf_lock(sb, sector); dir_entry->Attr = fs_func->get_entry_attr(ep); fs_func->get_entry_time(ep, &tm, TM_CREATE); @@ -2058,28 +1945,16 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) memset((char *)&dir_entry->AccessTimestamp, 0, sizeof(struct date_time_t)); - *(uni_name.name) = 0x0; + *uni_name.name = 0x0; fs_func->get_uni_name_from_ext_entry(sb, &dir, dentry, uni_name.name); - if (*uni_name.name == 0x0 && p_fs->vol_type != EXFAT) - get_uni_name_from_dos_entry(sb, - (struct dos_dentry_t *)ep, - &uni_name, 0x1); nls_uniname_to_cstring(sb, dir_entry->Name, &uni_name); - buf_unlock(sb, sector); + exfat_buf_unlock(sb, sector); - if (p_fs->vol_type == EXFAT) { - ep = get_entry_in_dir(sb, &clu, i + 1, NULL); - if (!ep) { - ret = FFS_MEDIAERR; - goto out; - } - } else { - get_uni_name_from_dos_entry(sb, - (struct dos_dentry_t *)ep, - &uni_name, 0x0); - nls_uniname_to_cstring(sb, dir_entry->ShortName, - &uni_name); + ep = get_entry_in_dir(sb, &clu, i + 1, NULL); + if (!ep) { + ret = -ENOENT; + goto out; } dir_entry->Size = fs_func->get_entry_size(ep); @@ -2095,7 +1970,7 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) fid->rwoffset = (s64)(++dentry); if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; goto out; } @@ -2108,24 +1983,24 @@ static int ffsReadDir(struct inode *inode, struct dir_entry_t *dir_entry) else clu.dir = CLUSTER_32(~0); } else { - /* clu.dir = FAT_read(sb, clu.dir); */ - if (FAT_read(sb, clu.dir, &clu.dir) == -1) { - ret = FFS_MEDIAERR; + /* clu.dir = exfat_fat_read(sb, clu.dir); */ + if (exfat_fat_read(sb, clu.dir, &clu.dir) == -1) { + ret = -EIO; goto out; } } } - *(dir_entry->Name) = '\0'; + *dir_entry->Name = '\0'; fid->rwoffset = (s64)(++dentry); if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -2133,14 +2008,14 @@ out: static int ffsRemoveDir(struct inode *inode, struct file_id_t *fid) { s32 dentry; - int ret = FFS_SUCCESS; + int ret = 0; struct chain_t dir, clu_to_free; struct super_block *sb = inode->i_sb; struct fs_info_t *p_fs = &(EXFAT_SB(sb)->fs_info); /* check the validity of the given file id */ if (!fid) - return FFS_INVALIDFID; + return -EINVAL; dir.dir = fid->dir.dir; dir.size = fid->dir.size; @@ -2151,18 +2026,18 @@ static int ffsRemoveDir(struct inode *inode, struct file_id_t *fid) /* check if the file is "." or ".." */ if (p_fs->vol_type != EXFAT) { if ((dir.dir != p_fs->root_dir) && (dentry < 2)) - return FFS_PERMISSIONERR; + return -EPERM; } /* acquire the lock for file system critical section */ - down(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); clu_to_free.dir = fid->start_clu; clu_to_free.size = (s32)((fid->size - 1) >> p_fs->cluster_size_bits) + 1; clu_to_free.flags = fid->flags; if (!is_dir_empty(sb, &clu_to_free)) { - ret = FFS_FILEEXIST; + ret = -ENOTEMPTY; goto out; } @@ -2178,17 +2053,17 @@ static int ffsRemoveDir(struct inode *inode, struct file_id_t *fid) fid->start_clu = CLUSTER_32(~0); fid->flags = (p_fs->vol_type == EXFAT) ? 0x03 : 0x01; -#ifdef CONFIG_EXFAT_DELAYED_SYNC - fs_sync(sb, false); +#ifndef CONFIG_EXFAT_DELAYED_SYNC + fs_sync(sb, true); fs_set_vol_flags(sb, VOL_CLEAN); #endif if (p_fs->dev_ejected) - ret = FFS_MEDIAERR; + ret = -EIO; out: /* release the lock for file system critical section */ - up(&p_fs->v_sem); + mutex_unlock(&p_fs->v_mutex); return ret; } @@ -2202,7 +2077,7 @@ static int exfat_readdir(struct file *filp, struct dir_context *ctx) struct inode *inode = file_inode(filp); struct super_block *sb = inode->i_sb; struct exfat_sb_info *sbi = EXFAT_SB(sb); - struct fs_info_t *p_fs = &(sbi->fs_info); + struct fs_info_t *p_fs = &sbi->fs_info; struct bd_info_t *p_bd = &(EXFAT_SB(sb)->bd_info); struct dir_entry_t de; unsigned long inum; @@ -2244,12 +2119,11 @@ get_new: /* at least we tried to read a sector * move cpos to next sector position (should be aligned) */ - if (err == FFS_MEDIAERR) { + if (err == -EIO) { cpos += 1 << p_bd->sector_size_bits; cpos &= ~((1 << p_bd->sector_size_bits) - 1); } - err = -EIO; goto end_of_dir; } @@ -2293,7 +2167,7 @@ static int exfat_ioctl_volume_id(struct inode *dir) { struct super_block *sb = dir->i_sb; struct exfat_sb_info *sbi = EXFAT_SB(sb); - struct fs_info_t *p_fs = &(sbi->fs_info); + struct fs_info_t *p_fs = &sbi->fs_info; return p_fs->vol_id; } @@ -2301,7 +2175,7 @@ static int exfat_ioctl_volume_id(struct inode *dir) static long exfat_generic_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) { -struct inode *inode = filp->f_path.dentry->d_inode; + struct inode *inode = filp->f_path.dentry->d_inode; #ifdef CONFIG_EXFAT_KERNEL_DEBUG unsigned int flags; #endif /* CONFIG_EXFAT_KERNEL_DEBUG */ @@ -2351,6 +2225,7 @@ static int exfat_create(struct inode *dir, struct dentry *dentry, umode_t mode, bool excl) { struct super_block *sb = dir->i_sb; + struct timespec64 curtime; struct inode *inode; struct file_id_t fid; loff_t i_pos; @@ -2361,21 +2236,14 @@ static int exfat_create(struct inode *dir, struct dentry *dentry, umode_t mode, pr_debug("%s entered\n", __func__); err = ffsCreateFile(dir, (u8 *)dentry->d_name.name, FM_REGULAR, &fid); - if (err) { - if (err == FFS_INVALIDPATH) - err = -EINVAL; - else if (err == FFS_FILEEXIST) - err = -EEXIST; - else if (err == FFS_FULL) - err = -ENOSPC; - else if (err == FFS_NAMETOOLONG) - err = -ENAMETOOLONG; - else - err = -EIO; + if (err) goto out; - } + INC_IVERSION(dir); - dir->i_ctime = dir->i_mtime = dir->i_atime = current_time(dir); + curtime = current_time(dir); + dir->i_ctime = curtime; + dir->i_mtime = curtime; + dir->i_atime = curtime; if (IS_DIRSYNC(dir)) (void)exfat_sync_inode(dir); else @@ -2389,7 +2257,10 @@ static int exfat_create(struct inode *dir, struct dentry *dentry, umode_t mode, goto out; } INC_IVERSION(inode); - inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; + inode->i_ctime = curtime; /* * timestamp is already written, so mark_inode_dirty() is unnecessary. */ @@ -2522,6 +2393,7 @@ static int exfat_unlink(struct inode *dir, struct dentry *dentry) { struct inode *inode = dentry->d_inode; struct super_block *sb = dir->i_sb; + struct timespec64 curtime; int err; __lock_super(sb); @@ -2531,22 +2403,22 @@ static int exfat_unlink(struct inode *dir, struct dentry *dentry) EXFAT_I(inode)->fid.size = i_size_read(inode); err = ffsRemoveFile(dir, &(EXFAT_I(inode)->fid)); - if (err) { - if (err == FFS_PERMISSIONERR) - err = -EPERM; - else - err = -EIO; + if (err) goto out; - } + INC_IVERSION(dir); - dir->i_mtime = dir->i_atime = current_time(dir); + curtime = current_time(dir); + dir->i_mtime = curtime; + dir->i_atime = curtime; if (IS_DIRSYNC(dir)) (void)exfat_sync_inode(dir); else mark_inode_dirty(dir); clear_nlink(inode); - inode->i_mtime = inode->i_atime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; exfat_detach(inode); remove_inode_hash(inode); @@ -2560,6 +2432,7 @@ static int exfat_symlink(struct inode *dir, struct dentry *dentry, const char *target) { struct super_block *sb = dir->i_sb; + struct timespec64 curtime; struct inode *inode; struct file_id_t fid; loff_t i_pos; @@ -2572,32 +2445,22 @@ static int exfat_symlink(struct inode *dir, struct dentry *dentry, pr_debug("%s entered\n", __func__); err = ffsCreateFile(dir, (u8 *)dentry->d_name.name, FM_SYMLINK, &fid); - if (err) { - if (err == FFS_INVALIDPATH) - err = -EINVAL; - else if (err == FFS_FILEEXIST) - err = -EEXIST; - else if (err == FFS_FULL) - err = -ENOSPC; - else - err = -EIO; + if (err) goto out; - } + err = ffsWriteFile(dir, &fid, (char *)target, len, &ret); if (err) { ffsRemoveFile(dir, &fid); - - if (err == FFS_FULL) - err = -ENOSPC; - else - err = -EIO; goto out; } INC_IVERSION(dir); - dir->i_ctime = dir->i_mtime = dir->i_atime = current_time(dir); + curtime = current_time(dir); + dir->i_ctime = curtime; + dir->i_mtime = curtime; + dir->i_atime = curtime; if (IS_DIRSYNC(dir)) (void)exfat_sync_inode(dir); else @@ -2611,7 +2474,10 @@ static int exfat_symlink(struct inode *dir, struct dentry *dentry, goto out; } INC_IVERSION(inode); - inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; + inode->i_ctime = curtime; /* timestamp is already written, so mark_inode_dirty() is unneeded. */ EXFAT_I(inode)->target = kmemdup(target, len + 1, GFP_KERNEL); @@ -2632,6 +2498,7 @@ out: static int exfat_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) { struct super_block *sb = dir->i_sb; + struct timespec64 curtime; struct inode *inode; struct file_id_t fid; loff_t i_pos; @@ -2642,21 +2509,14 @@ static int exfat_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) pr_debug("%s entered\n", __func__); err = ffsCreateDir(dir, (u8 *)dentry->d_name.name, &fid); - if (err) { - if (err == FFS_INVALIDPATH) - err = -EINVAL; - else if (err == FFS_FILEEXIST) - err = -EEXIST; - else if (err == FFS_FULL) - err = -ENOSPC; - else if (err == FFS_NAMETOOLONG) - err = -ENAMETOOLONG; - else - err = -EIO; + if (err) goto out; - } + INC_IVERSION(dir); - dir->i_ctime = dir->i_mtime = dir->i_atime = current_time(dir); + curtime = current_time(dir); + dir->i_ctime = curtime; + dir->i_mtime = curtime; + dir->i_atime = curtime; if (IS_DIRSYNC(dir)) (void)exfat_sync_inode(dir); else @@ -2671,7 +2531,10 @@ static int exfat_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) goto out; } INC_IVERSION(inode); - inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; + inode->i_ctime = curtime; /* timestamp is already written, so mark_inode_dirty() is unneeded. */ dentry->d_time = GET_IVERSION(dentry->d_parent->d_inode); @@ -2687,6 +2550,7 @@ static int exfat_rmdir(struct inode *dir, struct dentry *dentry) { struct inode *inode = dentry->d_inode; struct super_block *sb = dir->i_sb; + struct timespec64 curtime; int err; __lock_super(sb); @@ -2696,21 +2560,13 @@ static int exfat_rmdir(struct inode *dir, struct dentry *dentry) EXFAT_I(inode)->fid.size = i_size_read(inode); err = ffsRemoveDir(dir, &(EXFAT_I(inode)->fid)); - if (err) { - if (err == FFS_INVALIDPATH) - err = -EINVAL; - else if (err == FFS_FILEEXIST) - err = -ENOTEMPTY; - else if (err == FFS_NOTFOUND) - err = -ENOENT; - else if (err == FFS_DIRBUSY) - err = -EBUSY; - else - err = -EIO; + if (err) goto out; - } + INC_IVERSION(dir); - dir->i_mtime = dir->i_atime = current_time(dir); + curtime = current_time(dir); + dir->i_mtime = curtime; + dir->i_atime = curtime; if (IS_DIRSYNC(dir)) (void)exfat_sync_inode(dir); else @@ -2718,7 +2574,9 @@ static int exfat_rmdir(struct inode *dir, struct dentry *dentry) drop_nlink(dir); clear_nlink(inode); - inode->i_mtime = inode->i_atime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; exfat_detach(inode); remove_inode_hash(inode); @@ -2734,6 +2592,7 @@ static int exfat_rename(struct inode *old_dir, struct dentry *old_dentry, { struct inode *old_inode, *new_inode; struct super_block *sb = old_dir->i_sb; + struct timespec64 curtime; loff_t i_pos; int err; @@ -2751,24 +2610,15 @@ static int exfat_rename(struct inode *old_dir, struct dentry *old_dentry, err = ffsMoveFile(old_dir, &(EXFAT_I(old_inode)->fid), new_dir, new_dentry); - if (err) { - if (err == FFS_PERMISSIONERR) - err = -EPERM; - else if (err == FFS_INVALIDPATH) - err = -EINVAL; - else if (err == FFS_FILEEXIST) - err = -EEXIST; - else if (err == FFS_NOTFOUND) - err = -ENOENT; - else if (err == FFS_FULL) - err = -ENOSPC; - else - err = -EIO; + if (err) goto out; - } + INC_IVERSION(new_dir); - new_dir->i_ctime = new_dir->i_mtime = new_dir->i_atime = - current_time(new_dir); + curtime = current_time(new_dir); + new_dir->i_ctime = curtime; + new_dir->i_mtime = curtime; + new_dir->i_atime = curtime; + if (IS_DIRSYNC(new_dir)) (void)exfat_sync_inode(new_dir); else @@ -2790,7 +2640,9 @@ static int exfat_rename(struct inode *old_dir, struct dentry *old_dentry, inc_nlink(new_dir); } INC_IVERSION(old_dir); - old_dir->i_ctime = old_dir->i_mtime = current_time(old_dir); + curtime = current_time(old_dir); + old_dir->i_ctime = curtime; + old_dir->i_mtime = curtime; if (IS_DIRSYNC(old_dir)) (void)exfat_sync_inode(old_dir); else @@ -2814,13 +2666,16 @@ static int exfat_cont_expand(struct inode *inode, loff_t size) { struct address_space *mapping = inode->i_mapping; loff_t start = i_size_read(inode), count = size - i_size_read(inode); + struct timespec64 curtime; int err, err2; err = generic_cont_expand_simple(inode, size); if (err != 0) return err; - inode->i_ctime = inode->i_mtime = current_time(inode); + curtime = current_time(inode); + inode->i_ctime = curtime; + inode->i_mtime = curtime; mark_inode_dirty(inode); if (IS_SYNC(inode)) { @@ -2895,7 +2750,8 @@ static void exfat_truncate(struct inode *inode, loff_t old_size) { struct super_block *sb = inode->i_sb; struct exfat_sb_info *sbi = EXFAT_SB(sb); - struct fs_info_t *p_fs = &(sbi->fs_info); + struct fs_info_t *p_fs = &sbi->fs_info; + struct timespec64 curtime; int err; __lock_super(sb); @@ -2914,7 +2770,9 @@ static void exfat_truncate(struct inode *inode, loff_t old_size) if (err) goto out; - inode->i_ctime = inode->i_mtime = current_time(inode); + curtime = current_time(inode); + inode->i_ctime = curtime; + inode->i_mtime = curtime; if (IS_DIRSYNC(inode)) (void)exfat_sync_inode(inode); else @@ -2936,8 +2794,8 @@ static int exfat_setattr(struct dentry *dentry, struct iattr *attr) pr_debug("%s entered\n", __func__); - if ((attr->ia_valid & ATTR_SIZE) - && (attr->ia_size > i_size_read(inode))) { + if ((attr->ia_valid & ATTR_SIZE) && + attr->ia_size > i_size_read(inode)) { error = exfat_cont_expand(inode, attr->ia_size); if (error || attr->ia_valid == ATTR_SIZE) return error; @@ -2946,8 +2804,8 @@ static int exfat_setattr(struct dentry *dentry, struct iattr *attr) ia_valid = attr->ia_valid; - if ((ia_valid & (ATTR_MTIME_SET | ATTR_ATIME_SET | ATTR_TIMES_SET)) - && exfat_allow_set_time(sbi, inode)) { + if ((ia_valid & (ATTR_MTIME_SET | ATTR_ATIME_SET | ATTR_TIMES_SET)) && + exfat_allow_set_time(sbi, inode)) { attr->ia_valid &= ~(ATTR_MTIME_SET | ATTR_ATIME_SET | ATTR_TIMES_SET); @@ -3073,8 +2931,7 @@ static int exfat_bmap(struct inode *inode, sector_t sector, sector_t *phys, { struct super_block *sb = inode->i_sb; struct exfat_sb_info *sbi = EXFAT_SB(sb); - struct fs_info_t *p_fs = &(sbi->fs_info); - struct bd_info_t *p_bd = &(sbi->bd_info); + struct fs_info_t *p_fs = &sbi->fs_info; const unsigned long blocksize = sb->s_blocksize; const unsigned char blocksize_bits = sb->s_blocksize_bits; sector_t last_block; @@ -3084,18 +2941,6 @@ static int exfat_bmap(struct inode *inode, sector_t sector, sector_t *phys, *phys = 0; *mapped_blocks = 0; - if ((p_fs->vol_type == FAT12) || (p_fs->vol_type == FAT16)) { - if (inode->i_ino == EXFAT_ROOT_INO) { - if (sector < - (p_fs->dentries_in_root >> - (p_bd->sector_size_bits - DENTRY_SIZE_BITS))) { - *phys = sector + p_fs->root_start_sector; - *mapped_blocks = 1; - } - return 0; - } - } - last_block = (i_size_read(inode) + (blocksize - 1)) >> blocksize_bits; if (sector >= last_block) { if (*create == 0) @@ -3114,12 +2959,7 @@ static int exfat_bmap(struct inode *inode, sector_t sector, sector_t *phys, err = ffsMapCluster(inode, clu_offset, &cluster); - if (err) { - if (err == FFS_FULL) - return -ENOSPC; - else - return -EIO; - } else if (cluster != CLUSTER_32(~0)) { + if (!err && (cluster != CLUSTER_32(~0))) { *phys = START_SECTOR(cluster) + sec_offset; *mapped_blocks = p_fs->sectors_per_clu - sec_offset; } @@ -3215,6 +3055,7 @@ static int exfat_write_end(struct file *file, struct address_space *mapping, { struct inode *inode = mapping->host; struct file_id_t *fid = &(EXFAT_I(inode)->fid); + struct timespec64 curtime; int err; err = generic_write_end(file, mapping, pos, len, copied, pagep, fsdata); @@ -3223,7 +3064,9 @@ static int exfat_write_end(struct file *file, struct address_space *mapping, exfat_write_failed(mapping, pos + len); if (!(err < 0) && !(fid->attr & ATTR_ARCHIVE)) { - inode->i_mtime = inode->i_ctime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_ctime = curtime; fid->attr |= ATTR_ARCHIVE; mark_inode_dirty(inode); } @@ -3302,7 +3145,7 @@ static struct inode *exfat_iget(struct super_block *sb, loff_t i_pos) static int exfat_fill_inode(struct inode *inode, struct file_id_t *fid) { struct exfat_sb_info *sbi = EXFAT_SB(inode->i_sb); - struct fs_info_t *p_fs = &(sbi->fs_info); + struct fs_info_t *p_fs = &sbi->fs_info; struct dir_entry_t info; memcpy(&(EXFAT_I(inode)->fid), fid, sizeof(struct file_id_t)); @@ -3314,7 +3157,7 @@ static int exfat_fill_inode(struct inode *inode, struct file_id_t *fid) inode->i_uid = sbi->options.fs_uid; inode->i_gid = sbi->options.fs_gid; INC_IVERSION(inode); - inode->i_generation = get_seconds(); + inode->i_generation = prandom_u32(); if (info.Attr & ATTR_SUBDIR) { /* directory */ inode->i_generation &= ~1; @@ -3501,7 +3344,7 @@ static int exfat_statfs(struct dentry *dentry, struct kstatfs *buf) struct vol_info_t info; if (p_fs->used_clusters == UINT_MAX) { - if (ffsGetVolInfo(sb, &info) == FFS_MEDIAERR) + if (ffsGetVolInfo(sb, &info) == -EIO) return -EIO; } else { @@ -3674,7 +3517,8 @@ static int parse_options(char *options, int silent, int *debug, opts->fs_uid = current_uid(); opts->fs_gid = current_gid(); - opts->fs_fmask = opts->fs_dmask = current->fs->umask; + opts->fs_fmask = current->fs->umask; + opts->fs_dmask = current->fs->umask; opts->allow_utime = U16_MAX; opts->codepage = exfat_default_codepage; opts->iocharset = exfat_default_iocharset; @@ -3787,7 +3631,8 @@ static int exfat_read_root(struct inode *inode) { struct super_block *sb = inode->i_sb; struct exfat_sb_info *sbi = EXFAT_SB(sb); - struct fs_info_t *p_fs = &(sbi->fs_info); + struct fs_info_t *p_fs = &sbi->fs_info; + struct timespec64 curtime; struct dir_entry_t info; EXFAT_I(inode)->fid.dir.dir = p_fs->root_dir; @@ -3818,7 +3663,10 @@ static int exfat_read_root(struct inode *inode) EXFAT_I(inode)->mmu_private = i_size_read(inode); exfat_save_attr(inode, ATTR_SUBDIR); - inode->i_mtime = inode->i_atime = inode->i_ctime = current_time(inode); + curtime = current_time(inode); + inode->i_mtime = curtime; + inode->i_atime = curtime; + inode->i_ctime = curtime; set_nlink(inode, info.NumSubdirs + 2); return 0; @@ -3838,7 +3686,6 @@ static int exfat_fill_super(struct super_block *sb, void *data, int silent) struct exfat_sb_info *sbi; int debug, ret; long error; - char buf[50]; /* * GFP_KERNEL is ok here, because while we do hold the @@ -3885,17 +3732,6 @@ static int exfat_fill_super(struct super_block *sb, void *data, int silent) * if (FAT_FIRST_ENT(sb, media) != first) */ - /* codepage is not meaningful in exfat */ - if (sbi->fs_info.vol_type != EXFAT) { - error = -EINVAL; - sprintf(buf, "cp%d", sbi->options.codepage); - sbi->nls_disk = load_nls(buf); - if (!sbi->nls_disk) { - pr_err("[EXFAT] Codepage %s not found\n", buf); - goto out_fail2; - } - } - sbi->nls_io = load_nls(sbi->options.iocharset); error = -ENOMEM; @@ -3984,10 +3820,10 @@ static void exfat_debug_kill_sb(struct super_block *sb) * invalidate_bdev drops all device cache include * dirty. We use this to simulate device removal. */ - down(&p_fs->v_sem); - FAT_release_all(sb); - buf_release_all(sb); - up(&p_fs->v_sem); + mutex_lock(&p_fs->v_mutex); + exfat_fat_release_all(sb); + exfat_buf_release_all(sb); + mutex_unlock(&p_fs->v_mutex); invalidate_bdev(bdev); } diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig index cb61c2a772bd..dad1ddcd7b0c 100644 --- a/drivers/staging/fbtft/Kconfig +++ b/drivers/staging/fbtft/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 menuconfig FB_TFT tristate "Support for small TFT LCD display modules" - depends on FB && SPI && OF + depends on FB && SPI depends on GPIOLIB || COMPILE_TEST select FB_SYS_FILLRECT select FB_SYS_COPYAREA @@ -95,8 +95,8 @@ config FB_TFT_PCD8544 Generic Framebuffer support for PCD8544 config FB_TFT_RA8875 - tristate "FB driver for the RA8875 LCD Controller" - depends on FB_TFT + tristate "FB driver for the RA8875 LCD Controller" + depends on FB_TFT help Generic Framebuffer support for RA8875 @@ -112,6 +112,13 @@ config FB_TFT_S6D1121 help Generic Framebuffer support for S6D1121 +config FB_TFT_SEPS525 + tristate "FB driver for the SEPS525 LCD Controller" + depends on FB_TFT + help + Generic Framebuffer support for SEPS525 + Say Y if you have such a display that utilizes this controller. + config FB_TFT_SH1106 tristate "FB driver for the SH1106 OLED Controller" depends on FB_TFT @@ -125,10 +132,10 @@ config FB_TFT_SSD1289 Framebuffer support for SSD1289 config FB_TFT_SSD1305 - tristate "FB driver for the SSD1305 OLED Controller" - depends on FB_TFT - help - Framebuffer support for SSD1305 + tristate "FB driver for the SSD1305 OLED Controller" + depends on FB_TFT + help + Framebuffer support for SSD1305 config FB_TFT_SSD1306 tristate "FB driver for the SSD1306 OLED Controller" diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile index 27af43f32f81..e87193f7df14 100644 --- a/drivers/staging/fbtft/Makefile +++ b/drivers/staging/fbtft/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_FB_TFT_PCD8544) += fb_pcd8544.o obj-$(CONFIG_FB_TFT_RA8875) += fb_ra8875.o obj-$(CONFIG_FB_TFT_S6D02A1) += fb_s6d02a1.o obj-$(CONFIG_FB_TFT_S6D1121) += fb_s6d1121.o +obj-$(CONFIG_FB_TFT_SEPS525) += fb_seps525.o obj-$(CONFIG_FB_TFT_SH1106) += fb_sh1106.o obj-$(CONFIG_FB_TFT_SSD1289) += fb_ssd1289.o obj-$(CONFIG_FB_TFT_SSD1305) += fb_ssd1305.o diff --git a/drivers/staging/fbtft/fb_seps525.c b/drivers/staging/fbtft/fb_seps525.c new file mode 100644 index 000000000000..05882e2cde7f --- /dev/null +++ b/drivers/staging/fbtft/fb_seps525.c @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * FB driver for the NHD-1.69-160128UGC3 (Newhaven Display International, Inc.) + * using the SEPS525 (Syncoam) LCD Controller + * + * Copyright (C) 2016 Analog Devices Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +#include "fbtft.h" + +#define DRVNAME "fb_seps525" +#define WIDTH 160 +#define HEIGHT 128 + +#define SEPS525_INDEX 0x00 +#define SEPS525_STATUS_RD 0x01 +#define SEPS525_OSC_CTL 0x02 +#define SEPS525_IREF 0x80 +#define SEPS525_CLOCK_DIV 0x03 +#define SEPS525_REDUCE_CURRENT 0x04 +#define SEPS525_SOFT_RST 0x05 +#define SEPS525_DISP_ONOFF 0x06 +#define SEPS525_PRECHARGE_TIME_R 0x08 +#define SEPS525_PRECHARGE_TIME_G 0x09 +#define SEPS525_PRECHARGE_TIME_B 0x0A +#define SEPS525_PRECHARGE_CURRENT_R 0x0B +#define SEPS525_PRECHARGE_CURRENT_G 0x0C +#define SEPS525_PRECHARGE_CURRENT_B 0x0D +#define SEPS525_DRIVING_CURRENT_R 0x10 +#define SEPS525_DRIVING_CURRENT_G 0x11 +#define SEPS525_DRIVING_CURRENT_B 0x12 +#define SEPS525_DISPLAYMODE_SET 0x13 +#define SEPS525_RGBIF 0x14 +#define SEPS525_RGB_POL 0x15 +#define SEPS525_MEMORY_WRITEMODE 0x16 +#define SEPS525_MX1_ADDR 0x17 +#define SEPS525_MX2_ADDR 0x18 +#define SEPS525_MY1_ADDR 0x19 +#define SEPS525_MY2_ADDR 0x1A +#define SEPS525_MEMORY_ACCESS_POINTER_X 0x20 +#define SEPS525_MEMORY_ACCESS_POINTER_Y 0x21 +#define SEPS525_DDRAM_DATA_ACCESS_PORT 0x22 +#define SEPS525_GRAY_SCALE_TABLE_INDEX 0x50 +#define SEPS525_GRAY_SCALE_TABLE_DATA 0x51 +#define SEPS525_DUTY 0x28 +#define SEPS525_DSL 0x29 +#define SEPS525_D1_DDRAM_FAC 0x2E +#define SEPS525_D1_DDRAM_FAR 0x2F +#define SEPS525_D2_DDRAM_SAC 0x31 +#define SEPS525_D2_DDRAM_SAR 0x32 +#define SEPS525_SCR1_FX1 0x33 +#define SEPS525_SCR1_FX2 0x34 +#define SEPS525_SCR1_FY1 0x35 +#define SEPS525_SCR1_FY2 0x36 +#define SEPS525_SCR2_SX1 0x37 +#define SEPS525_SCR2_SX2 0x38 +#define SEPS525_SCR2_SY1 0x39 +#define SEPS525_SCR2_SY2 0x3A +#define SEPS525_SCREEN_SAVER_CONTEROL 0x3B +#define SEPS525_SS_SLEEP_TIMER 0x3C +#define SEPS525_SCREEN_SAVER_MODE 0x3D +#define SEPS525_SS_SCR1_FU 0x3E +#define SEPS525_SS_SCR1_MXY 0x3F +#define SEPS525_SS_SCR2_FU 0x40 +#define SEPS525_SS_SCR2_MXY 0x41 +#define SEPS525_MOVING_DIRECTION 0x42 +#define SEPS525_SS_SCR2_SX1 0x47 +#define SEPS525_SS_SCR2_SX2 0x48 +#define SEPS525_SS_SCR2_SY1 0x49 +#define SEPS525_SS_SCR2_SY2 0x4A + +/* SEPS525_DISPLAYMODE_SET */ +#define MODE_SWAP_BGR BIT(7) +#define MODE_SM BIT(6) +#define MODE_RD BIT(5) +#define MODE_CD BIT(4) + +#define seps525_use_window 0 /* FBTFT doesn't really use it today */ + +/* Init sequence taken from: Arduino Library for the Adafruit 2.2" display */ +static int init_display(struct fbtft_par *par) +{ + par->fbtftops.reset(par); + + usleep_range(1000, 5000); + + /* Disable Oscillator Power Down */ + write_reg(par, SEPS525_REDUCE_CURRENT, 0x03); + usleep_range(1000, 5000); + /* Set Normal Driving Current */ + write_reg(par, SEPS525_REDUCE_CURRENT, 0x00); + usleep_range(1000, 5000); + + write_reg(par, SEPS525_SCREEN_SAVER_CONTEROL, 0x00); + /* Set EXPORT1 Pin at Internal Clock */ + write_reg(par, SEPS525_OSC_CTL, 0x01); + /* Set Clock as 120 Frames/Sec */ + write_reg(par, SEPS525_CLOCK_DIV, 0x90); + /* Set Reference Voltage Controlled by External Resister */ + write_reg(par, SEPS525_IREF, 0x01); + + /* precharge time R G B */ + write_reg(par, SEPS525_PRECHARGE_TIME_R, 0x04); + write_reg(par, SEPS525_PRECHARGE_TIME_G, 0x05); + write_reg(par, SEPS525_PRECHARGE_TIME_B, 0x05); + + /* precharge current R G B (uA) */ + write_reg(par, SEPS525_PRECHARGE_CURRENT_R, 0x9D); + write_reg(par, SEPS525_PRECHARGE_CURRENT_G, 0x8C); + write_reg(par, SEPS525_PRECHARGE_CURRENT_B, 0x57); + + /* driving current R G B (uA) */ + write_reg(par, SEPS525_DRIVING_CURRENT_R, 0x56); + write_reg(par, SEPS525_DRIVING_CURRENT_G, 0x4D); + write_reg(par, SEPS525_DRIVING_CURRENT_B, 0x46); + /* Set Color Sequence */ + write_reg(par, SEPS525_DISPLAYMODE_SET, 0xA0); + write_reg(par, SEPS525_RGBIF, 0x01); /* Set MCU Interface Mode */ + /* Set Memory Write Mode */ + write_reg(par, SEPS525_MEMORY_WRITEMODE, 0x66); + write_reg(par, SEPS525_DUTY, 0x7F); /* 1/128 Duty (0x0F~0x7F) */ + /* Set Mapping RAM Display Start Line (0x00~0x7F) */ + write_reg(par, SEPS525_DSL, 0x00); + write_reg(par, SEPS525_DISP_ONOFF, 0x01); /* Display On (0x00/0x01) */ + /* Set All Internal Register Value as Normal Mode */ + write_reg(par, SEPS525_SOFT_RST, 0x00); + /* Set RGB Interface Polarity as Active Low */ + write_reg(par, SEPS525_RGB_POL, 0x00); + + write_reg(par, SEPS525_DDRAM_DATA_ACCESS_PORT); + + return 0; +} + +static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) +{ + if (seps525_use_window) { + /* Set Window Xs,Ys Xe,Ye*/ + write_reg(par, SEPS525_MX1_ADDR, xs); + write_reg(par, SEPS525_MX2_ADDR, xe); + write_reg(par, SEPS525_MY1_ADDR, ys); + write_reg(par, SEPS525_MY2_ADDR, ye); + } + /* start position X,Y */ + write_reg(par, SEPS525_MEMORY_ACCESS_POINTER_X, xs); + write_reg(par, SEPS525_MEMORY_ACCESS_POINTER_Y, ys); + + write_reg(par, SEPS525_DDRAM_DATA_ACCESS_PORT); +} + +static int set_var(struct fbtft_par *par) +{ + u8 val; + + switch (par->info->var.rotate) { + case 0: + val = 0; + break; + case 180: + val = MODE_RD | MODE_CD; + break; + case 90: + case 270: + + default: + return -EINVAL; + } + /* Memory Access Control */ + write_reg(par, SEPS525_DISPLAYMODE_SET, val | + (par->bgr ? MODE_SWAP_BGR : 0)); + + write_reg(par, SEPS525_DDRAM_DATA_ACCESS_PORT); + + return 0; +} + +static struct fbtft_display display = { + .regwidth = 8, + .width = WIDTH, + .height = HEIGHT, + .fbtftops = { + .init_display = init_display, + .set_addr_win = set_addr_win, + .set_var = set_var, + }, +}; + +FBTFT_REGISTER_DRIVER(DRVNAME, "syncoam,seps525", &display); + +MODULE_ALIAS("spi:" DRVNAME); +MODULE_ALIAS("platform:" DRVNAME); +MODULE_ALIAS("spi:seps525"); +MODULE_ALIAS("platform:seps525"); + +MODULE_DESCRIPTION("FB driver for the SEPS525 LCD Controller"); +MODULE_AUTHOR("Michael Hennerich "); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/fbtft/fb_uc1611.c b/drivers/staging/fbtft/fb_uc1611.c index 65681d0fe200..e763205e9e4f 100644 --- a/drivers/staging/fbtft/fb_uc1611.c +++ b/drivers/staging/fbtft/fb_uc1611.c @@ -91,7 +91,7 @@ static int init_display(struct fbtft_par *par) write_reg(par, 0x2C | (pump & 0x03)); /* Set inverse display */ - write_reg(par, 0xA6 | (0x01 & 0x01)); + write_reg(par, 0xA6 | 0x01); /* Set 4-bit grayscale mode */ write_reg(par, 0xD0 | (0x02 & 0x03)); @@ -157,8 +157,8 @@ static int set_var(struct fbtft_par *par) /* Set RAM address control */ write_reg(par, 0x88 | (0x0 & 0x1) << 2 /* Increment positively */ - | (0x1 & 0x1) << 1 /* Increment page first */ - | (0x1 & 0x1)); /* Wrap around (default) */ + | (0x1 << 1) /* Increment page first */ + | 0x1); /* Wrap around (default) */ /* Set LCD mapping */ write_reg(par, 0xC0 @@ -171,11 +171,11 @@ static int set_var(struct fbtft_par *par) write_reg(par, 0x88 | (0x0 & 0x1) << 2 /* Increment positively */ | (0x0 & 0x1) << 1 /* Increment column first */ - | (0x1 & 0x1)); /* Wrap around (default) */ + | 0x1); /* Wrap around (default) */ /* Set LCD mapping */ write_reg(par, 0xC0 - | (0x1 & 0x1) << 2 /* Mirror Y ON */ + | (0x1 << 2) /* Mirror Y ON */ | (0x0 & 0x1) << 1 /* Mirror X OFF */ | (0x0 & 0x1)); /* MS nibble last (default) */ break; @@ -183,13 +183,13 @@ static int set_var(struct fbtft_par *par) /* Set RAM address control */ write_reg(par, 0x88 | (0x0 & 0x1) << 2 /* Increment positively */ - | (0x1 & 0x1) << 1 /* Increment page first */ - | (0x1 & 0x1)); /* Wrap around (default) */ + | (0x1 << 1) /* Increment page first */ + | 0x1); /* Wrap around (default) */ /* Set LCD mapping */ write_reg(par, 0xC0 - | (0x1 & 0x1) << 2 /* Mirror Y ON */ - | (0x1 & 0x1) << 1 /* Mirror X ON */ + | (0x1 << 2) /* Mirror Y ON */ + | (0x1 << 1) /* Mirror X ON */ | (0x0 & 0x1)); /* MS nibble last (default) */ break; default: @@ -197,12 +197,12 @@ static int set_var(struct fbtft_par *par) write_reg(par, 0x88 | (0x0 & 0x1) << 2 /* Increment positively */ | (0x0 & 0x1) << 1 /* Increment column first */ - | (0x1 & 0x1)); /* Wrap around (default) */ + | 0x1); /* Wrap around (default) */ /* Set LCD mapping */ write_reg(par, 0xC0 | (0x0 & 0x1) << 2 /* Mirror Y OFF */ - | (0x1 & 0x1) << 1 /* Mirror X ON */ + | (0x1 << 1) /* Mirror X ON */ | (0x0 & 0x1)); /* MS nibble last (default) */ break; } diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index a0a67aa517f0..ffb84987dd86 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -22,8 +22,9 @@ #include #include #include +#include #include -#include + #include